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Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulation

Bit-level pipelinable general and fixed coefficient digit-se...

引用

IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： O. Gustafsson L. Wanhammar Department of Electrical Engineering Linköping University Linkoping Sweden

In this work, we introduce a novel approach to digit-serial/parallel multiplication. this general class of multipliers is based on shift-accumulation which also makes the approach suitable for implementation of shift-accumulators in distributed arithmetic. As a variable in the design process, the maximal number of cascaded full-adders can be selected. thus, it is possible to, as a special case, obtain a bit-level pipelined multiplier. Both general and fixed coefficient multiplication is considered. the hardware complexity is low compared with other approaches.

关键词： Adders Clocks Arithmetic Pipeline processing Process design Hardware Energy consumption Circuits

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Piecewise linear operations on sigma-delta modulated signals

Piecewise linear operations on sigma-delta modulated signals

引用

IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： Y. Hidaka H. Fujisaka M. Sakamoto M. Morisue Faculty of Information Science Hiroshima City University Hiroshima Japan

Piecewise linear (PWL) circuits operating on sigma-delta (/spl Sigma//spl Delta/) modulated signals are proposed. the proposed circuit library includes an absolute circuit, a min/max selector and a negative resistance. As an application of the PWL circuits, a median filter is presented. It is structured with 23% of logic gates consumed by an equivalent filter with 8-bit parallel signal form. It is expected that application of /spl Sigma//spl Delta/ domain signal processing including proposed PWL operations to other modern information processing and communication systems such as neural networks and chaotic communication systems will reduce their hardware cost.

关键词： Piecewise linear techniques Delta-sigma modulation Circuits Filters Libraries Logic gates Signal processing Information processing Neural networks Chaotic communication

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Hardware implementation of neural network with expansible and reconfigurable architecture

Hardware implementation of neural network with expansible an...

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international conference on Neural Information processing

作者： Seok Bae Yun Young Joo Kim Sung Soo Dong Chong Ho Lee Department of Electrical Engineering Inha University South Korea Department of Digital Electronics & Information Yongin-Songdam College South Korea

ISBN: (纸本)9810475241

In this paper, we propose a new architecture for hardware implementation of digital neural network, called ERNA (expansible and reconfigurable neural network architecture). By adopting flexible ladder-style bus and internal connection network into the digital neural network based on traditional SIMD architecture, the proposed architecture enables fast processing that is based on parallelism and pipelining, while does not abandon the flexibility and expandability of the traditional approach. In the proposed architecture, users can change the network topology by setting configuration registers. Such reconfigurability on hardware allows enough usability like software simulation. We implement the proposed design on real FPGA, and configure the chip to multi-layer perceptron with back propagation learning for alphabet recognition problem. Performance comparison with its software counterpart shows its value in the aspects of performance and flexibility.

关键词： Neural network hardware Neural networks Reconfigurable architectures Computer architecture Pipeline processing Network topology Registers Usability Field programmable gate arrays Multilayer perceptrons

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Shuffled serial adder: an area-latency effective serial adder

Shuffled serial adder: an area-latency effective serial adde...

引用

IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： G.P. Saggese A.G.M. Strollo N. Mazzocca D. De Caro Department of Electronics and Telecommunications Engineering University of Naples-E2809CFederico IIE2809D Napoli Italy Department of Information Engineering Second University of Naples Caserta Italy

the shuffled adder, a novel serial adder with a latency proportional to log/sub 2/N, where N is the operand width, is presented. It is derived from the Kogge-Stone adder, reordering the cells to obtain a slice-based structure that allows an area-time effective serial implementation. It can be fed with parallel inputs and produce parallel outputs, differently from the digit-serial approach that results in the need for a data-formatter to convert a parallel input into digits, and to collect the digits of the output word. A standard-cell VLSI implementation for different values of N is presented: area-time performances are evaluated through circuit simulations, and compared with digit-serial adders with various digit-size, proving the attractiveness of the proposed structure.

关键词： Adders Computer architecture Logic Integrated circuit interconnections Delay Very large scale integration Performance evaluation Circuit simulation Signal processing Time factors

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Glenmore: an interactive activation model of eye movement control in reading

Glenmore: an interactive activation model of eye movement co...

引用

international conference on Neural Information processing

作者： R.G. Reilly R. Radach Department of Computer Science NUI Maynooth Co Kildare Ireland Department of Psychology Technical University of Aachen Germany

this paper describes an interactive activation model of eye movement control in reading, Glenmore, that can account within one mechanism for preview and spillover effects, for regressions, progressions, and refixations. the model decouples the decision about when to move the eyes from the word recognition process. the time course of activity in a "fixate centre" determines the triggering of a saccade. the other main feature of the model is the use of a saliency map that acts as an arena for the interplay of bottom-up visual features of the text, and top-down lexical features. these factors combine to create a pattern of. activation that selects one word as the saccade target. Even within the relatively simple framework proposed here, a coherent account has been provided for a range of eye movement control phenomena that have hitherto proved problematic to reconcile.

关键词： Computational modeling Computer science Psychology Eyes Distributed computing Timing parallel processing

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Low-power high-performance adaptive computing architectures for multimedia processing

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9th international conference on High Performance Computing, HiPC 2002

作者： Sangireddy, Rama Kim, Huesung Somani, Arun K. Dependable Computing and Networking Laboratory Department of Electrical and Computer Engineering Iowa State University AmesIA50011 United States

ISBN: (纸本)3540003037

the demand for higher computing power and thus more onchip computing resources is ever increasing. the size of on-chip cache memory has also been consistently increasing. To efficiently utilize silicon real-estate on the chip, a part of L1 data cache is designed as a Reconfigurable Functional Cache (RFC), that can be configured to perform a selective core function in the media application whenever higher computing capability is required. the idea of Adaptive Balanced Computing architecture was developed, where the RFC module is used as a coprocessor controlled by main processor. Initial results have proved that ABC architecture provides speedups ranging from 1.04x to 5.0x for various media applications. In this paper, we address the impact of RFC on cache access time and energy dissipation. We show that reduced number of cache accesses and lesser utilization of other on-chip resources will result in energy savings of up to 60% for MPEG decoding, and in the range of 10% to 20% for various other multimedia applications. © Springer-Verlag Berlin Heidelberg 2002.

关键词： Cache memory

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Certainty and expertness-based credit assignment for cooperative Q-Learning agents with an AND-type task

Certainty and expertness-based credit assignment for coopera...

引用

international conference on Neural Information processing

作者： A. Harati M.N. Ahmadabadi School of Intelligent Systems Institute of Studies in Theoretical Physics and Mathematics Tehran Iran Control and Intelligent Processing Center of Excellence & AI and Robotics Laboratory Department of Electrical and Computer Engineering University of Tehran Tehran Iran

In multiagent reinforcement learning, inter-agent credit assignment is a fundamental problem, since a single scalar reinforcement signal is the only reliable feedback that teams of learning agents receive. this problem is more critical in groups of independent learners with a joint task. In this research, it is assumed that a critic agent receives the environment feedback and assigns a proper credit to each agent using some measures. three of such measures for a team of cooperative agents with a parallel and AND-type task are introduced. these measures somehow compare the agents' knowledge. One of these criteria, called normal expertness, is a non-relative measure while two other ones (certainty and relative normal expertness) are relative measure. It is experimentally shown that relative measures work better as they contain more information for the critic agent.

关键词： Feedback Intelligent agent Intelligent robots Process control Control systems Intelligent control Artificial intelligence Robot kinematics Physics computing Reliability engineering

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Low-power high-order band-pass active-RC allpole filters using a "lossy" LP-BP transformation

Low-power high-order band-pass active-RC allpole filters usi...

引用

IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： D. Jurisic N. Mijat G.S. Moschytz Department of Electronic Systems and Information Processing University of Zagreb Zagreb Croatia Signal and Information Processing Laboratory (ISI) Swiss Federal Institute of Technology Zurich Switzerland

the design procedure for high-order single amplifier BP filters is presented. A method for the design of 2/sup nd/- and 4/sup th/-order band-pass (BP) active-RC filters using a modified low-pass to band-pass (LP-BP) frequency transformation, has already been presented in previous works. It showed that a BP filter could be realized simply by the substitution of resistors and capacitors of the ladder in a low-pass (LP) prototype filter, by serial and parallel RC circuits. Such a substitution results from a so-called "lossy" LP-BP transformation. In this paper, the design procedure is extended to higher-order BP filters, such as 6th- and 8th-order. the design procedure is simple, and the closed-form design equations are presented. Furthermore, it is shown that "impedance tapering" decreases sensitivities to component tolerances for the LP prototype, as well as for the resulting BP filter. Schoeffler's sensitivity measure is used for the sensitivity analysis.

关键词： Band pass filters Prototypes Design methodology Frequency Resistors Capacitors Low pass filters Circuits Equations Impedance

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Fast software implementation of MPEG advanced audio encoder

Fast software implementation of MPEG advanced audio encoder

引用

international conference on Digital Signal processing (DSP)

作者： I. Dimkoviae D. Milovanoviae Z. Bojkoviae PsyTEL Research Belgrade Serbia Faculty of Elcclrical Engineering Belgrade Serbia

An optimized software implementation of a high quality MPEG AAC-LC (low complexity) audio encoder is presented in this paper. the standard reference encoder is improved by utilizing several algorithmic optimizations (fast psycho-acoustic model, new tonality estimation, new time domain block switching, optimized quantizer and Huffman coder) and very careful code optimizations for PC CPU architectures with SIMD (single-instruction-multiple-data) instruction set. the psychoacoustic model used the MDCT filterbank for energy estimation and peak detection as a measure of tonality. Block size decision is based on local perceptual entropies as well as LPC analysis of the time signal. Algorithmic optimizations in the quantizer include loop control module modification and optimized Huffman search. Code optimization is based on parallel processing by replacing vector algebra and math junctions with their optimized equivalents with Intel/sup /spl reg// Signal processing Library (SPL). the implemented codec outperforms consumer MP3 encoders at 30% less bitrate at the same time achieving encoding times several times faster than real-time.

关键词： Signal processing algorithms Psychoacoustic models Software quality Code standards Psychology Filter bank Energy measurement Entropy Linear predictive coding Signal analysis

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the data-acquisition, processing and control system of a micromirror-based laser-scanning endoscope

The data-acquisition, processing and control system of a mic...

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IEEE international conference on Electronics, Circuits and Systems (ICECS)

作者： P.G. Papageorgas D. Maroulis H. Albrecht B. Wagner G. Anagnostopoulos M. Schurr N.G. theofanous A. Menciassi C. Depeursinge Department of Informatics and Telecommunications Panepistimiopolis University of Athens (NKUA) Athens Greece Laser-and Medical Technology GmbH (LMTB) Berlin Germany Fraunhofer Institute for Silicon Technology Itzehoe Germany Sec. for Minimal Invasive Surgery Eberhard-Karls-University of Tuebingen Tubingen Germany ARTS & MiTech Laboratory Scuola Superiore Sant'' Anna Pisa Italy Institute of Applied Optics Ecole Polytechnique Federale de Lausanne Lausanne Switzerland

A novel endoscope device has been developed based on a new technology of laser scanning using silicon micromirrors for superior resolution and chromatic representation compared with the existing endoscopes. A critical part of this device, that is reported here, is the data-acquisition, control and processing (DACP) system which acquires, processes, displays, stores in real time the collected images and handles the control signals. the software developed uses the multithreading technology for the parallel execution of specific software tasks in the available CPUs of the multiprocessing system employed. In this manner, the necessary computational power is provided for the realization of a high-performance real-time imaging system. First-trial results are also given.

关键词： Optical control Process control Control systems Endoscopes Real time systems Silicon Micromirrors Signal resolution Displays Signal processing

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