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检索条件"任意字段=9th International Conference on Algorithms and Architectures for Parallel Processing"

共 2826 条记录，以下是291-300 订阅

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Design and Implementation of a High-Performance DSP External Memory Controller

Design and Implementation of a High-Performance DSP External...

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international conference on Integrated Circuits and Microsystems (ICICM)

作者： Jialing Jiang Dong Wang School of Physics and Optoelectronics Xiangtan University Hunan GREAT-LEO MICRO Electronics Co. Ltd Xiangtan Hunan

ISBN: (数字)9798331509453

ISBN: (纸本)9798331520243

To meet the need for rapid data transmission between the core of high-performance Digital Signal Processor (DSP) chips and external memory, as well as to manage different types of external memory flexibly, we have designed an External Memory Controller (EMC). this module not only manages multiple peripherals and supports concurrent and parallel access but also provides excellent flexibility and configurability, making it suitable for various system requirements. the EMC includes SDMA, IDMAO, IDMA1, and a dedicated ET debugging DMA channel. the SDMA channel facilitates data transfer between multiple peripherals connected to the DMA Switch Fabric outside the core and the core's internal memory spaces. the IDMA channels support fast data transfer between any two memory locations within the core. the ET dedicated DMA channel is used for JTAG debugging, ensuring the correct operation, superior performance, and reliability of the DSP chip. the EMC operates independently of CPU control, enabling rapid and large-scale data movement. After functional simulation verification and coverage analysis, the designed EMC component has achieved the expected objectives and meets the design requirements.

关键词： Digital signal processors Debugging Switches parallel processing Electromagnetic compatibility Data transfer Registers Multiaccess communication Reliability Protection

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A C++ Library for Memory Layout and Performance Portability of Scientific Applications 28th

A C++ Library for Memory Layout and Performance Portabilit...

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28th international European conference on parallel and Distributed Computing , Euro-Par 2022

作者： Incardona, Pietro Gupta, Aryaman Yaskovets, Serhii Sbalzarini, Ivo F. Technische Universität Dresden Faculty of Computer Science Dresden Germany Max Planck Institute of Molecular Cell Biology and Genetics Dresden Germany Center for Systems Biology Dresden Dresden01307 Germany Center for Scalable Data Analytics and Artificial Intelligence ScaDS.AI Dresden/Leipzig Germany

ISBN: (纸本)9783031312083

We present a C++14 library for performance portability of scientific computing codes across CPU and GPU architectures. Our library combines generic data structures like vectors, multi-dimensional arrays, maps, graphs, and sparse grids with basic, reusable algorithms like convolutions, sorting, prefix sum, reductions, and scan. the memory layout of the data structures is adapted at compile-time using tuples with optional memory mirroring between CPU and GPU. We combine this transparent memory mapping with generic algorithms under two alternative programming interfaces: a CUDA-like kernel interface for multi-core CPUs, Nvidia GPUs, and AMD GPUs, as well as a lambda interface. We validate and benchmark the presented library using micro-benchmarks, showing that the abstractions introduce negligible performance overhead, and we compare performance against the current state of the art. © 2023, the Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Graphics processing unit

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MULTI-GPU TRAINING and parallel CPU COMPUTING for the MACHINE LEARNING EXPERIMENTS USING ARIADNE LIBRARY 9

MULTI-GPU TRAINING and PARALLEL CPU COMPUTING for the MACHIN...

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9th international conference "Distributed Computing and Grid Technologies in Science and Education", GRID 2021

作者： Goncharov, Pavel Nikolskaia, Anastasiia Ososkov, Gennady Rezvaya, Ekaterina Rusov, Daniil Shchavelev, Egor Joint Institute for Nuclear Research 6 Joliot-Curie Street Dubna Moscow region 141980 Russia Saint Petersburg State University 7-9 Universitetskaya emb. Saint Petersburg199034 Russia

Modern machine learning (ML) tasks and neural network (NN) architectures require huge amounts of GPU computational facilities and demand high CPU parallelization for data preprocessing. At the same time, the Ariadne library, which aims to solve complex high-energy physics tracking tasks with the help of deep neural networks, lacks multi-GPU training and efficient parallel data preprocessing on the CPU. In our work, we present our approach for the Multi-GPU training in the Ariadne library. We will present efficient data-caching, parallel CPU data preprocessing, generic ML experiment setup for prototyping, training, and inference deep neural network models. Results in terms of speed-up and performance for the existing neural network approaches are presented with the help of GOVORUN computing resources. Copyright © 2021 for this paper by its authors. Use permitted under Creative Commons License Attribution 4.0 international (CC BY 4.0).

关键词： Graphics processing unit

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

18th International Conference on Algorithms and Architecture...

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

ISBN: (纸本)9783030050535

the proceedings contain 191 papers. the special focus in this conference is on algorithms and architectures for parallel processing. the topics include: Incentivizing multimedia data acquisition for machine learning system;Toward performance prediction for multi-BSP programs in ML;exploiting the table of energy and power leverages;a semantic web based intelligent IoT model;Accelerating CNNs using optimized scheduling strategy;data analysis of blended learning in python programming;APs deployment optimization for indoor fingerprint positioning with adaptive particle swarm algorithm;deployment optimization of indoor positioning signal sources with fireworks algorithm;a study of sleep stages threshold based on multiscale fuzzy entropy;qoS-driven service matching algorithm based on user requirements;Blind estimation algorithm over fast-fading multipath OFDM channels;facial shape and expression transfer via non-rigid image deformation;p-schedule: Erasure coding schedule strategy in big data storage system;Answer aggregation of crowdsourcing employing an improved EM-based approach;a parallel fast fourier transform algorithm for large-scale signal data using apache spark in cloud;task offloading in edge-clouds with budget constraint;motion trajectory sequence-based map matching assisted indoor autonomous mobile robot positioning;towards the independent spanning trees in the line graphs of interconnection networks;POEM: Pricing longer for edge computing in the device cloud;mobility analysis and response for software-defined internet of things;Research on overload classification method for bus images based on image processing and SVM;DStore: A distributed cloud storage system based on smart contracts and blockchain;towards an efficient and real-time scheduling platform for mobile charging vehicles;Streaming ETL in polystore era.

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

18th International Conference on Algorithms and Architecture...

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

ISBN: (纸本)9783030050566

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

18th International Conference on Algorithms and Architecture...

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

ISBN: (纸本)9783030050504

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An Architecture for Deploying Convolutional Neural Network-Based Quality Systems for Use in Production Environments in Additive Manufacturing 5

An Architecture for Deploying Convolutional Neural Network-B...

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5th ASTM international conference on Additive Manufacturing, ICAM 2020

作者： Jones, Oliver Holloway, Adam Young, Joe Morrison, Alex Milne, Katy Rahman, M. Mostafizur Turner, Nathanael The Manufacturing Technology Centre Ltd. Pilot Way Ansty Park CoventryCV7 9JU United Kingdom

ISBN: (纸本)9780803177215

Recent advances in convolutional neural networks have shown promise for a wide range of engineering applications including production quality assessment. this has been enabled in part by the availability of open-source algorithms and techniques such as transfer learning. Despite these factors, deploying these algorithms in production environments remains a challenge. the research presents an architecture for the deployment of convolutional neural network algorithms for the quality assessment of additive manufacturing (AM) build processes. the first iteration of this architecture has been implemented in a preproduction powder bed fusion AM facility at the National Centre for Additive Manufacturing in the UK. By demonstrating the application of this architecture on data generated from in-process monitoring data, the study hopes to reduce barriers faced when taking machine learning models from a laboratory concept to a production facility. By reviewing the latency of predictions, the study highlights that the additional proposed architectures may be viable for processing live production data for detection and control of defects. Finally, the study proposes that AM build machine manufacturers could provide a service-oriented architecture to encourage the implementation of in-process correction strategies. Copyright © 2022 by ASTM international, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959.

关键词： 3D printing

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

18th International Conference on Algorithms and Architecture...

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18th international conference on algorithms and architectures for parallel processing, ICA3PP 2018

ISBN: (纸本)9783030050627

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Privacy-Preserving Big Data Exchange: Models, Issues, Future Research Directions

Privacy-Preserving Big Data Exchange: Models, Issues, Future...

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9th IEEE international conference on Big Data (IEEE BigData)

作者： Cuzzocrea, Alfredo Damiani, Ernesto Univ Calabria iDEA Lab Arcavacata Di Rende Italy LORIA Nancy France Univ Milan Milan Italy Khalifa Univ Abu Dhabi U Arab Emirates

ISBN: (纸本)9781665439022

Big data exchange is an emerging problem in the context of big data management and analytics. In big data exchange, multiple entities exchange big datasets beyond the common data integration or data sharing paradigms, mostly in the context of data federation architectures. How to make big data exchange while ensuring privacy preservation constraints? the latter is a critical research challenge that is gaining momentum on the research community, especially due to the wide family of application scenarios where it plays a critical role (e.g., social networks, bio-informatics tools, smart cities systems and applications, and so forth). Inspired by these considerations, in this paper we provide an overview of models and issues in the context of privacy-preserving big data exchange research, along with a selection of future research directions that will play a critical role in next-generation research.

关键词： Big Data Exchange Privacy-Preserving Big Data Exchange theoretical Problems in Big Data Advanced Tools and Systems for Big Data processing

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Dynamic Path-Sensitive Memory Dependence Prediction

Dynamic Path-Sensitive Memory Dependence Prediction

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international conference on Integrated Circuits and Microsystems (ICICM)

作者： Weiding Liu Lunbo Li College of Computer Science & Engineering Nanjing University of Science and Technology Nanjing China

ISBN: (数字)9798331509453

ISBN: (纸本)9798331520243

Memory dependence prediction is essential in superscalar out-of-order processors as it improves instruction-level parallelism efficiency by predicting dependencies between memory access instructions. However, existing state-of-the-art memory dependence predictors lack the ability to effectively utilize the dynamic execution information of conflicting instructions, leading to an excessive number of false positives and subsequently hindering overall performance. this work proposes Dynamic Path-Sensitive Memory Dependence Prediction (DPMDP), a novel dynamic path-sensitive memory dependence prediction method that dynamically selects the history length for each conflicting load instruction when multiple paths exist. Our key observation is that for load-store pairs with an initial occurrence of a violation if the conflicting store is waiting for an address translation that causes an execution delay, it does not create a dependency in the predictor initially and only creates it upon subsequent occurrences effectively. this observation is proven by running the SPEC CPU 2006 suite on the clock-accurate simulator GEM5. through cycle-accurate simulation of the SPEC CPU 2006 suite, we show that DPMDP achieved an average performance improvement of 1.08% compared to Store Set and 13.06% compared to PHAST.

关键词： Training Out of order Translation Program processors Memory management Prediction methods Performance gain parallel processing Central processing Unit History

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