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检索条件"任意字段=9th International Conference on Algorithms and Architectures for Parallel Processing"

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FPGA based designing Central processing unit of Implantable Cardiac Defibrillators with low energy consumption by using CNN deep neural network 9

FPGA based designing Central processing unit of Implantable ...

引用

9th international conference on Technology and Energy Management, ICTEM 2024

作者： Keyanfar, Alireza Ghaderi, Reza Nazari, Soheila Shahid Beheshti University Faculty of Electrical Engineering Tehran Iran

ISBN: (纸本)9798350329797

the heart is one of the most important organs of the human body. Diagnosis and timely treatment of cardiac arrhythmias are important issues in the construction of medical equipment that protects the heart. It is critical to diagnose and treat cardiac arrhythmias such ventricular fibrillation (VF) and ventricular tachycardia (VT) as soon as they are noticed. An implantable cardioverter-defibrillator (ICD) is a device designed to detect and treat ventricular tachycardia (VT) and ventricular fibrillation (VF). Signal processing and arrhythmia detection of implant defibrillator devices is one of the most important parts of these devices and should be optimal in terms of detection time and detection accuracy. In this paper, an artificial neural network based on deep learning has been designed for use in signal processing and arrhythmia detection sections of ICD defibrillator devices. the designed convolution neural network is in good condition in terms of accuracy and is also in optimal condition in terms of the number of parameters. the optimal number of parameters can increase network speed in signal processing and arrhythmia detection and can also be useful in reducing battery consumption. Finally, the designed CNN network hardware was implemented. zynq chips have the ability to process in parallel and can be useful in increasing the processing speed, so zynq chips were selected for the hardware target. After the hardware implementation stage, it is possible to proceed from the IP Core produced to design other parts of the defibrillator in the Vivado software. © 2024 IEEE.

关键词： Defibrillators

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Subgraph Mapping Optimization Methods for Domain-Specific architectures 25

Subgraph Mapping Optimization Methods for Domain-Specific Ar...

引用

25th IEEE international conferences on High Performance Computing and Communications, 9th international conference on Data Science and Systems, 21st IEEE international conference on Smart City and 9th IEEE international conference on Dependability in Sensor, Cloud and Big Data Systems and Applications, HPCC/DSS/SmartCity/DependSys 2023

作者： Dong, Dong Jiang, Hongxu Beihang University Beijing China

ISBN: (纸本)9798350330014

Because the deep learning model does not require the existence of domain-specific architectures (DSA) operator types or fusion modes corresponding to subgraphs when the code is finally deployed, these subgraphs often cannot be deployed directly on the DSA. If the custom subgraph is directly converted into the inference model on the corresponding hardware without processing, the searched subgraph may be re-split into the pre-recombination structure, resulting in optimization failure. In order to enable the custom subgraph to reason correctly on the hardware and achieve the expected performance, this paper maps the subgraph as an operator in the layer, so that the back-end of the hardware framework will treat the custom sub graph as a whole to perform scheduling optimization when generating code. the method proposed in this paper reorganizes the sub graphs of Faster-rcnn and MobileViT, and deploys the optimized models to Ascend 310 platform, which can improve the overall inference performance by 1.19 x 1.45 x and tuning efficiency by 1.41 x 2.08 x. © 2023 IEEE.

关键词： Mapping

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An efficient compilation of coarse-grained reconfigurable architectures utilizing pre-optimized sub-graph mappings 30

An efficient compilation of coarse-grained reconfigurable ar...

引用

30th Euromicro international conference on parallel, Distributed and Network-Based processing (PDP)

作者： Ohwada, Ayaka Kojima, Takuya Amano, Hideharu Keio Univ Yokohama Kanagawa Japan Univ Tokyo Bunkyo Ku Tokyo Japan

ISBN: (纸本)9781665469586

In recent years, IoT devices have become widespread, and energy-efficient coarse-grained reconfigurable architectures (CGRAs) have attracted attention. CGRAs comprise several processing units called processing elements (PEs) arranged in a two-dimensional array. the operations of PEs and the interconnections between them are adaptively changed depending on a target application, and this contributes to a higher energy efficiency compared to general-purpose processors. the application kernel executed on CGRAs is represented as a data flow graph (DFG), and CGRA compilers are responsible for mapping the DFG onto the PE array. thus, mapping algorithms significantly influence the performance and power efficiency of CGRAs as well as the compile lime. this paper proposes POCOCO, a compiler framework for CGRAs that can use pre-optimized subgraph mappings. this contributes to reducing the compiler optimization task. To leverage the subgraph mappings, we extend an existing mapping method based on a genetic algorithm. Experiments on three architectures demonstrated that the proposed method reduces the optimization lime by 48%, on an average, for the best case of the three architectures.

关键词： Program processors throughput Energy efficiency Libraries Reconfigurable architectures Arrays Task analysis

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Towards Information Sharing Beetle Antennae Search Optimization 24th

Towards Information Sharing Beetle Antennae Search Optimizat...

引用

24th international conference on algorithms and architectures for parallel processing, ICA3PP 2024

作者： Liu, Xuan Wang, Chenyan Liu, Wenjian Zhang, Lefeng Liu, Xianggan Gao, Yutong Key Laboratory of Ethnic Language Intelligent Analysis and Security Governance of MOE Minzu University of China Beijing China Hainan International College of Minzu University of China Li’an International Education Innovation pilot Zone Hainan China City University of Macau China Natural Language Processing and Knowledge Graph Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9789819615278

the study of bioinformatics-based evolutionary computation has long been of significant interest within the scientific community. Beetle antennae search algorithm is widely used because of its lightweight, however, it lacks information sharing due to individual iteration in the algorithm. In this paper, we propose an innovative pheromone-based beetle antennae search algorithm, which evolves from a single iterative individual in BAS algorithm to multiple parallel iterative individuals and incorporates the pheromone sharing mechanism found in ant colony optimization algorithm. Applying the pheromone-based beetle antennae search algorithm to the virtual machine placement problem in cloud computing, we find that pheromone sharing mechanism allows the PB-BAS algorithm to exhibit superior optimization capabilities and effectively avoids convergence to local optimal. To verify the performance of the algorithm, we select other alternative algorithms and conduct a large number of comparative experiments under different experimental setups, the experimental results show the effectiveness and efficiency of our algorithm. © the Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Ant colony optimization

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Big Data Mining of Maritime Shipping Flows Based on Dependency Relationships 9

Big Data Mining of Maritime Shipping Flows Based on Dependen...

引用

9th international conference on Intelligent Computing and Signal processing, ICSP 2024

作者： Fu, Yude Li, Xiang Lu, Xiongyi Yu, Mengjun Huangpeng, Qizi Duan, Xiaojun College of Science National University of Defense Technology Changsha China National Research Center of Parallel Computer Engineering and Technology Beijing China

ISBN: (纸本)9798350376548

this research utilizes higher-order dependency relationships for the modeling of higher-order dependency networks from voluminous maritime flow data and introduces higher-order dependency mining to uncover critical port information in the China-Southeast Asia region as well as the coopetition relationships between ports. Analysis of maritime data from the years 2018 and 2023 indicates that global ports maintain stability and competitiveness through their evolution, with Singapore serving as the central hub connecting China and Southeast Asia. Subsequent analysis employing dependency paths indicates that in recent years, the dependency relationships among ports between China and Southeast Asia have achieved higher orders and greater complexity. © 2024 IEEE.

关键词： competition and cooperation dependency relationships flow data maritime network

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Text-Image Generation Using Visual-Language Transformer parallel Decoding 9

Text-Image Generation Using Visual-Language Transformer Para...

引用

9th international conference on Intelligent Computing and Signal processing, ICSP 2024

作者： Fang, Peng Wang, Fan Chongqing Three Gorges University School of Electronic and Information Engineering Chongqing China

ISBN: (纸本)9798350376548

Autoregressive generative models have shown their superiority in the fields of vision and language, such as high accuracy, high fidelity, and strong stability. Most existing methods are trained around text-guided image generation tasks and image-guided text generation tasks. However, not only can these two generative tasks be trained on the same dataset, but both require the alignment of visual and textual representations in the same semantic space. In order to be able to learn better generalization of image and text representations, we unify these two generation tasks in an autoregressive generative model and enhance the quality of text and image generation through bidirectional generation goals. In order to take the 2D-structure of the image into account. To this end, we propose a visual-linguistic Transformer autoregressive generative model. the visual-language Transformer model adopts a novel decoding strategy that takes the 2D-structure of the image into account without affecting the generation of the 1D sequence structure of the text. through improved training strategies, we can not only generate highly accurate text descriptions, but also enhance the model's image understanding and generate high-quality images. © 2024 IEEE.

关键词： Decoding

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SMVAR: A Novel RNN Accelerator Based on Non-blocking Data Distribution Structure 25

SMVAR: A Novel RNN Accelerator Based on Non-blocking Data Di...

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作者： Xu, Jinwei Jiang, Jingfei Xu, Shiyao Gao, Lei National University of Defense Technology Science and Technology on Parallel and Distributed Laboratory Hunan Changsha China

ISBN: (纸本)9798350330014

Recurrent neural networks (RNNs) have become common models in the field of artificial intelligence to process temporal sequence task, such as speech recognition, text analysis, natural language processing, etc. To speedup RNNs inference, previous research proposed model sparse pruning techniques. However, the pruning rate of existing sparse pruning algorithms will be affected by pruning granularity and hardware friendliness. In order to approximate nonstructured pruning algorithm, this paper proposes Large Region Balanced Sparse (LRBS) pruning method, which does not limit sub-matrix shape and effectively improves pruning rate. Furthermore, we propose Sparse Matrix Vector Multiplication Accelerator for RNNs (SMVAR), which adopt non-blocking data distribution structure to solve the problem of efficient execution of large region irreg-ular matrix multiplication. To further improve the accelerator performance, SMVAR fine-grained adjusts the pipeline between macro-operations to reduce the idle of compute components. In addition, according to the coarse-grained block characteristics of LRBS algorithm, we develop the coarse-grained parallelism of accelerator with multiply compute units(CUs) structure. Experiments show that the pruning rate of our proposed LRBS is 1.25x-2.5x higher than that of the existing pruning algorithms. Compared with the existing work, the execution efficiency is improved by more than 2.02x-35.9x in the same application scenario. © 2023 IEEE.

关键词： Field programmable gate arrays (FPGA)

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the Design of An Intelligent Self-Reconfigurable Single-Module Robot 9

The Design of An Intelligent Self-Reconfigurable Single-Modu...

引用

9th international conference on Electronic Technology and Information Science (ICETIS)

作者： Xing, Zezheng Zheng, Qiuwei Xiong, Lang Xu, Yundou Yanshan Univ Lab Parallel Robot & Mechatron Syst Hebei Prov Qinhuangdao Hebei Peoples R China Yanshan Univ Sch Mech Engn Qinhuangdao Hebei Peoples R China Yanshan Univ Minist Educ China Key Lab Adv Forging & Stamping Technol & Sci Qinhuangdao Hebei Peoples R China

ISBN: (纸本)9798350388350;9798350388343

Self-reconfigurable robot is a typical modular robot, which is composed of a large number of identical modules based on cell design idea. Perform a job by combining it as a whole while working. At present, the carrying capacity of the self-reconfigurable robot is limited and the degree of intelligence is not high, which leads to the limited working ability of the self-reconfigurable robot. therefore, an intelligent single-module self-reconfigurable robot is designed in this paper. Firstly, a high stiffness bidirectional butt locking mechanism is designed for the connection between modules. Secondly, aiming at the task of quick survey of fire rescue environment, the identification and distance detection of ignition point and rescue personnel are designed in the fire environment. the BI_A* algorithm is used to complete the single-module path planning of the selfr-econfigurable robot, and the Multi_BI_A* algorithm is proposed for the optimal path planning of the collection of multimodule self-reconfigurable robots. Finally, the functional verification of the prototype is completed by using a single threeroom model experiment platform.

关键词： intelligence system self-reconfigurable robot docking mechanism visual processing path programming

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Microservices vs Serverless Deployment in AWS: A Case Study with an Image processing Application 15

Microservices vs Serverless Deployment in AWS: A Case Study ...

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IEEE/ACM 15th international conference on Utility and Cloud Computing (UCC) / 9th international conference on Big Data Computing, Applications and Technologies (BDCAT)

作者： Shrestha, Raju Nisha, Beebu Oslo Metropolitan Univ OsloMet Dept Comp Sci Oslo Norway

ISBN: (纸本)9781665460873

Microservices and serverless are two major architectures used today for deploying cloud-native applications. there are ongoing debates concerning which of these two architectures to use for deploying a given application. In this paper, we have done a case study with an image processing application deployed in Amazon AWS. the study showed that serverless perform better in terms of performance, stability, cost, ease of deployment, and security, whereas microservices show superiority with lower memory use, and better controllability and visibility.

关键词： Microservices serverless image processing application cloud deployment Amazon AWS

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Convolutional Neural Network architectures for Modulation Scheme Classification in RF Signals within Cognitive Radio Systems 9

Convolutional Neural Network Architectures for Modulation Sc...

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9th international conference on Signal processing and Communication, ICSC 2023

作者： Maduranga, M.W.P. Lakmal, H.K.I.S. Tilwari, Valmik Department of Computer Engineering Faculty of Computing General Sir John Kotelawala Defence University Ratmalana Sri Lanka Dept. of Mechatronic and Industry Engineering NSBM Green University Homagama Sri Lanka Department of Electronics & Communication Engineering Indian Institute of Information Technology Guwahati India

ISBN: (纸本)9798350383201

Dynamic Spectrum Access (DSA) plays a crucial role in cognitive radio (CR) by effectively utilizing unused spectrum and meeting the escalating traffic demands of advanced cellular networks like 5G and beyond. A significant focus in recent years has been on employing Deep Learning (DL) architectures for Radio Frequency (RF) signal classification in CR-based applications. this paper presents the development of a DL-based framework using Convolutional Neural Network (CNN) architecture to classify various modulation schemes, including Continuous-phase frequency-shift keying (CPFSK), Gaussian Frequency Shift Keying(GFSK), 64 quadrature amplitude modulation (QAM), Binary Phase-shift keying (BPSK), 16QAM, Gaussian Minimum Shift Keying (GMSK), QPSK of a signal received from the base stations in Global System for Mobile communication (GSM) network. the performance evaluation of the proposed CNN architecture will be conducted using real-time GSM signals obtained from nearby base stations. the performance analysis of each network architecture is presented and analyzed. © 2023 IEEE.

关键词： Cognitive radio

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