检索结果-内蒙古大学图书馆

Proceedings of the 6th IEEE/acm/IFIP international conference on hardware/software codesign and system synthesis

作者： Love Singhal Sejong Oh Eli Bozorgzadeh University of California Irvine Irvine CA USA Korea Advanced Institute of Science and Technology Daejeon South Korea

ISBN: (纸本)9781605584706

Configurable multiprocessor system is a promising design alternative because of its high degree of flexibility, short development time, and potentially high performance under constraints and challenges driven by applications. An important design challenge at 45nm for multi-core system is manufacturing process variation. Due to increasing concern of WID variation, designers will have to choose configurations of processing cores that maximize yield of the system while not affecting performance and throughput constraints. Due to interdependency between processor configuration selection and task allocation and its impact on yield and latency constraints, we tackle both problems simultaneously. In this paper, we propose the problem of task allocation and configuration selection for yield optimization. We prove the problem is NP-hard and propose an optimal pseudo-polynomial on Serial-Parallel graphs. We target streaming applications in pipelined reconfigurable multiprocessor systems. We provide a case study of configurable Leon processors as the cores implemented on FPGA. Results show that proposed problem could result in significant improvement of the timing yield of the system by exploiting extra slack on tasks.

关键词： configuration selection process variation delay budgeting within-die variation task allocation timing yield

来源：评论

学校读者我要写书评

暂无评论

Rule-Based Approaches for Equivalence Checking of SpecC Programs

Rule-Based Approaches for Equivalence Checking of SpecC Prog...

引用

acm and IEEE international conference on Formal Methods and Models for Co-Design (MEMOCODE)

作者： Subash Shankar Masahiro Fujita CUNY City University of New York NY USA University of Tokyo Tokyo Japan

This paper describes a rule-based approach for equivalence checking of reactive systems. The approach is based on new types of dependence and flow graphs that are more appropriate for reactive languages than traditional notions intended for transformational languages. Equivalence rules utilizing this static dependence and flow information are derived from language semantics. The rules are then applied in a bottom-up fashion, corresponding to the structures of the programs being checked, until equivalence is shown. A prototype toolset has been implemented, and results indicate speedups of several orders of magnitude over more traditional equivalence checkers. The paper describes our approach and tools, and also outlines how our methods can be used in a general equivalence checking system.

关键词： Prototypes Embedded system software engineering hardware Cities and towns Flow graphs system-level design Control system synthesis system-on-a-chip Pattern recognition

来源：评论

学校读者我要写书评

暂无评论

CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

CODES+ISSS 2006: 4th International Conference on Hardware So...

引用

CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

ISBN: (纸本)1595933700

The proceedings contain 54 papers. The topics discussed include: UML and model-driven development for SoC design;application-specific workload shaping in multimedia-enabled personal mobile devices;efficient computation of buffer capacities for multi-rate real-time systems with back-pressure;design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies;battery discharge aware energy feasibility analysis;a formal approach to robustness maximization of complex heterogeneous embedded systems;automatic run-time extraction of communication graphs from multithreaded applications;automatic generation of transaction level models for rapid design space exploration;accurate yet fast modeling of real-time communication;bounded arbitration algorithm for QoS-supported on-chip communication;automatic phase detection for stochastic on-chip traffic generation;and methodology for attack on a Java-based PDA.

关键词： Codes (symbols)

来源：评论

学校读者我要写书评

暂无评论

Interface Implementation Using Ajax for Web-Based Instruction Set Simulator

Interface Implementation Using Ajax for Web-Based Instructio...

引用

international conference on Advanced Information Networking and Applications Workshops (AINAW)

作者： Hideaki Yanagisawa Minoru Uehara Hideki Mori Computer Science and Electronic Engineering Tokuyama College of Technology Japan Information and Computer Sciences Toyo University Japan

SSC-DASH (Server Side C-like Design Automation Shell) has been developed as a Web-based HW/SW codesign tool for designing processors. SSC-DASH obtains a processor definition file via Web browser and generates a HW (synthesizable Verilog-HDL description) and SWDE (software Development Environment) for the generated processor. The SWDE includes ISS (Instruction Set Simulator), assembler, disassembler and compiler. For the verification of the defined processor, processor developers have to download the generated SWDE, every time, even where changes are small. To improve the usability of this system a Web-based interface for the generated SWDE is implemented using Ajax. Using Ajax, download of the SWDE becomes unnecessary and makes it possible to verify the processor on the server quickly and easily. This greatly improves the usability of the SWDE. In this paper, we describe implementation of Web-based ISS using Ajax.

关键词： hardware design languages Assembly Process design Java Programming Usability Instruction sets Computer architecture Web pages Control system synthesis

来源：评论

学校读者我要写书评

暂无评论

Formal Methods for the Analysis and synthesis of Nanometer-Scale Cellular Arrays

引用

acm JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING systemS 2008年第2期4卷 1–27页

作者： Carmona, Josep Cortadella, Jordi Takada, Yousuke Peper, Ferdinand Univ Politecn Cataluna Software Dept ES-08034 Barcelona Spain Canopus Co Ltd Nishi Ku Kobe Hyogo 6512241 Japan Natl Inst Informat & Commun Technol Nano ICT Grp Nishi Ku Kobe Hyogo 6512492 Japan

Nanometer-scale structures suitable for computing have been investigated by several research groups in recent years. A common feature of these structures is their dynamic evolution through cascaded local interactions embedded on a discrete grid. Finding configurations capable of conducting computations is a task that often requires tedious experiments in laboratories. Formal methods-though used extensively for the specification and verification of software and hardware computing systems-are virtually unexplored with respect to computational structures at atomic scales. This paper presents a systematic approach toward the application of formal methods in this context, using techniques like abstraction, model-checking, and symbolic representations of states to explore and discover computational structures. The proposed techniques are applied to a system of CO molecules on a grid of Copper atoms, resulting in the design of a complete library of combinational logic gates based on this molecular system. The techniques are also applied on (more general) systems of cellular automata that employ an asynchronous mode of timing. The use of formal methods may narrow the gap between Physical Chemistry and Computer Science, allowing the description of interactions of nanometer scale systems on a level of abstraction suitable to devise computing devices.

关键词： Nanocomputing cellular array model checking symbolic techniques

来源：评论

学校读者我要写书评

暂无评论

PeaCE: A hardware-software codesign environment for multimedia embedded systems

引用

acm TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC systemS 2007年第3期12卷 D1-D25页

作者： Ha, Soonhoi Kim, Sungchan Lee, Choonseling Yi, Youngmin Kwon, Seongnam Joo, Young-Pyo Seoul Natl Univ Sch Engn & Comp Sci CAP Lab Seoul 151742 South Korea

Existent hardware-software (HW-SW) codesign tools mainly focus on HW-SW cosimulation to build a virtual prototyping environment that enables software design and system verification without need of making a hardware prototype. Not only HW-SW cosimulation, but also HW-SW codesign methodology involves system specification, functional simulation, design-space exploration, and hardware-software cosynthesis. The PeaCE codesign environment is the first full-fledged HW-SW codesign environment that provides seamless codesign flow from functional simulation to system synthesis. Targeting for multimedia applications with real-time constraints, PeaCE specifies the system behavior with a heterogeneous composition of three models of computation and utilizes features of the formal models maximally during the whole design process. It is also a reconfigurable framework in the sense that third-party design tools can be integrated to build a customized tool chain. Experiments with industry-strength examples prove the viability of the proposed technique.

关键词： design experimentation performance verification hardware-software codesign embedded systems model-based design design-space exploration hardware-software cosimulation

来源：评论

学校读者我要写书评

暂无评论

PeaCE: A hardware-software codesign environment for multimedia embedded systems

PeaCE: A hardware-software codesign environment for multimed...

引用

43rd Design Automation conference

作者： Ha, Soonhoi Kim, Sungchan Lee, Choonseling Yi, Youngmin Kwon, Seongnam Joo, Young-Pyo Seoul Natl Univ Sch Engn & Comp Sci CAP Lab Seoul 151742 South Korea

关键词： design experimentation performance verification hardware-software codesign embedded systems model-based design design-space exploration hardware-software cosimulation

来源：评论

学校读者我要写书评

暂无评论

HW/SW co-design for Esterel processing

HW/SW co-design for Esterel processing

引用

CODES+ISSS 2007: 5th international conference on hardware/software codesign and system synthesis

作者： Gädtke, Sascha Traulsen, Claus Von Hanxleden, Reinhard Real-Time and Embedded Systems Group Dept. of Computer Science Christian-Albrechts-Universität zu Kiel Olshausenstr. 40 D-24098 Kiel Germany

ISBN: (纸本)9781595938244

We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The starting point is a system model written in the synchronous language Esterel, which can be mapped to both hardware and software. Our approach performs the partitioning at the source-code level and preserves the original, strictly synchronous semantics. It is thus platform-independent and allows to use standard simulation and synthesis tools. Furthermore, the source-level partitioning approach presented here should be applicable to non-reactive processing platforms as well. However, the challenge is to partition the program without changing its meaning under any circumstances. In particular, signal scopes and inter-partition signal dependencies must be maintained, which rules out a naive top-level partitioning. We have implemented the co-synthesis approach based on the Columbia Esterel Compiler and have validated it on the Kiel Esterel Processor. As the experimental results confirm, this can significantly reduce execution times and energy consumption per reaction, with minimal additional hardware requirements. Copyright 2007 acm.

关键词： software engineering

来源：评论

学校读者我要写书评

暂无评论

Automating synthesis of asynchronous communication mechanisms

引用

FUNDAMENTA INFORMATICAE 2007年第1期78卷 75-100页

作者： Gorgonio, Kyller Cortadella, Jordi Xia, Fei Yakovlev, Alex Univ Politecn Cataluna Dept Software Barcelona Spain Newcastle Univ Sch Elect Elect & Comp Engn Newcastle Upon Tyne NE1 7RU Tyne & Wear England

Asynchronous data communication mechanisms (acms) have been extensively studied as data connectors between independently timed processes in digital systems. In previous work, systematic acm synthesis methods have been proposed. In this paper, we advance this work by developing algorithms and software tools which automate most of the acm synthesis process. Firstly, an interleaving specification is constructed in the form of a state graph, and secondly, a Petri net model of an "acm-type" is derived using the theory of regions. The method is applied to a number of "standard" writing and reading policies of acms with shared memory and unidirectional control variables.

关键词： asynchronous communication mechanisms Petri nets concurrent and distributed systems embedded systems hardware and software codesign protocols synthesis

来源：评论

学校读者我要写书评

暂无评论

Complex task activation schemes in system level performance analysis

Complex task activation schemes in system level performance ...

引用

CODES+ISSS 2007: 5th international conference on hardware/software codesign and system synthesis

作者： Haid, Wolfgang Thiele, Lothar Zurich Switzerland

ISBN: (纸本)9781595938244

The design and analysis of today's complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applying traditional methods like HW/SW cosimulation is getting increasingly difficult. On the other hand, analytic approaches have proven their usefulness and efficiency for system analysis when end-to-end performance figures like delay, throughput and memory consumption are requested. One of the main drawbacks of these methods is the limited set of systems that can be analyzed with high accuracy: Only simple models for task interaction and task semantics can be used. In this paper, we extend existing methods for analyzing heterogeneous multiprocessor systems such that (a) nonpreemptive scheduling policies, (b) complex activation schemes for tasks and (c) conditional behavior of task executions can be modeled and analyzed. We demonstrate the usefulness of the proposed approach in a case study. Copyright 2007 acm.

关键词： software architecture

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：