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检索条件"任意字段=ACM International Conference on Hardware/software - Codesign and System Synthesis"

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The challenges of embedded system design

The challenges of embedded system design

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Mike Muller ARM Inc.

As complexity grows the importance of system level exploration, design, verification and debug becomes inescapable. However while there has been great progress in process technology, tools and methodologies resulting in ever more sophisticated platforms some of the critical design parameters have been moving in the wrong direction. Power is becoming a critical challenge that will require new solutions for both design and manufacturing if the roller coaster ride is to continue.

关键词： Embedded system Manufacturing Computer architecture Computer science Board of Directors Cities and towns

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Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures

Implementation of dynamic streaming Applications on heteroge...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Pieter Van Der Wolf Jeffrey Kang Tomas Henriksson Philips Research Eindhoven The Netherlands

system design based on static task graphs does not match well with modern consumer electronic devices with dynamic stream processing *** propose the TTL API for task graph reconfiguration services,which can be used to describe the dynamic behaviour of *** demonstrate the efficient implementation of the TTL API on a heterogeneous multi-processor *** is possible to design dynamic streaming applications with reusable reconfiguration-aware tasks and we argue that the TTL API serves as a good starting point for standardization.

关键词： Topology Computer architecture Consumer electronics Standardization TV Decoding Streaming media Embedded system system-level design Application software

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Energy conscious online architecture adaptation for varying latency constraints in sensor network applications

Energy conscious online architecture adaptation for varying ...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Alex Doboli Sankalp Kallakuri ECE Department Stony Brook University New York NY USA

Sensor network applications face continuously changing environments, which impose varying processing loads on the sensor node. This paper presents an online control method which adapts the architecture to minimize energy consumption while satisfying varying latency constraints. The method predicts processing load requirements over a finite time window and accordingly adapts the architecture. The behaviour of the hardware modules over time has been approximated with a Continuous Time Markov Process. Adaptive image processing for vehicle tracking was used as a case study for this approach.

关键词： Delay Computer architecture Vehicles Energy consumption hardware Markov processes Image processing Application software Image sampling Computer networks

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system-level design automation tools for digital microfluidic biochips

System-level design automation tools for digital microfluidi...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Fei Su Krishnendu Chakrabarty Department of Electrical and Computer Engineering Duke University Durham NC USA

Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom design techniques for digital microfluidic biochips do not scale well for increasing levels of system integration. Analogous to classical VLSI synthesis, a top-down system-level design automation approach can shorten the biochip design cycle and reduce human effort. We present here an overview of a system-level design methodology that includes architectural synthesis and physical design. The proposed design automation approach is expected to relieve biochip users from the burden of manual optimization of bioassays, time-consuming hardware design, and costly testing and maintenance procedures.

关键词： system-level design Design automation Microfluidics Biochemical analysis Clinical diagnosis DNA Very large scale integration Humans Design optimization hardware

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Automated data cache placement for embedded VLIW ASIPs

Automated data cache placement for embedded VLIW ASIPs

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Richard Taylor Barry O'Rourke George Bruce Japheth Hossell Paul Morgan Institute for System Level Integration Livingston UK Critical Blue Limited SMC Edinburgh UK

Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficient ASIP data cache solution requires that the cache design be tailored to the target application. Multiple caches or caches with multiple ports allow simultaneous parallel access to data, alleviating the bandwidth problem if data is placed effectively. We present a solution that greatly simplifies the creation of targeted caches and automates the process of explicitly allocating individual memory access to caches and banks. The effectiveness of our solution is demonstrated with experimental results.

关键词： VLIW Application specific processors Bandwidth hardware Computer architecture Application software Performance analysis Algorithm design and analysis Permission Acceleration

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An integer linear programming approach for identifying instruction-set extensions

An integer linear programming approach for identifying instr...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Can Ozturan Gunhan Dundar Kubilay Atasu Department of computer Engineering Bogazici University Turkey Department of Electrical and Electronics Engineering Bogazici University Turkey

This paper presents an Integer Linear Programming (ILP) approach to the instruction-set extension identification problem. An algorithm that iteratively generates and solves a set of ILP problems in order to generate a set of templates is proposed. A selection algorithm that ranks the generated templates based on isomorphism testing and potential evaluation is described. A Trimaran based framework is used to evaluate the quality of the instructions generated by the technique. Speed-up results of up to 7.5 are observed.

关键词： Integer linear programming Computer aided instruction Computer architecture Application specific processors Delay Embedded computing Iterative algorithms Embedded system Application software Costs

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Iterational retiming: maximize iteration-level parallelism for nested loops

Iterational retiming: maximize iteration-level parallelism f...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： Zili Shao Edwin H.-m. Sha Meilin Liu Chun Xue Department of Computer Science University of Texas Dallas USA

Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP)*** is important to study effective and efficient transformation techniques to increase parallelism for nested *** this paper, we propose a novel technique,iterational retiming,that can satisfy any given timing constraint by achieving full parallelism for iterations in a partition. Theorems and efficient algorithms are proposed for iterational retiming. The experimental results show that iterational retiming is a promising technique for parallel embedded *** can achieve 87% improvement over software pipelining and 88%improvement over loop unfolding on average.

关键词： Parallel processing Application software Timing Optimal scheduling Digital signal processing Partitioning algorithms Embedded system Application specific integrated circuits Permission Computer science

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A multicast inter-task communication protocol for embedded multiprocessor systems

A multicast inter-task communication protocol for embedded m...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Wido Kruijtzer Gustavo Marrero Antonio Nunez Tomas Bautista Victor Reyes IUMA Institute for Applied Microelectronics University of Las Palmas Las Palmas Spain Philips Research Laboratories Eindhoven Netherlands

Recently, a new programming model and platform interface for MPSoC design and integration called TTL (Task Transaction Level) has been developed and advocated as a standard. In this paper, a specific implementation of the TTL interface named ITCP (Inter-Task Communication Protocol) is presented. ITCP is well suited for both hardware and software implementations and supports features such as multitasking and multicast communication. A configurable systemC model of the ITCP protocol and its integration in a system-level design methodology is disclosed in this work. Moreover, details of a multi-task ITCP software shell implementation for an ARM9 with eCos RTOS are also given in the paper.

关键词： Multicast protocols Multiprocessing systems hardware Application software system-level design Object oriented modeling Standards development Multitasking Multicast communication Parallel programming

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Key research problems in NoC design: a holistic perspective

Key research problems in NoC design: a holistic perspective

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international conference on hardware/software codesign and system synthesis (CODES)

作者： Radu Marculescu Jingcao Hu Umit Y. Ogras Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh PA USA

Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and architectures makes NoC problem formulation and classification both difficult and obscure. To remedy this situation, we provide a general description for NoC architectures and applications and then enumerate several outstanding research problems (denoted by P1-P8) organized under three topics: communication infrastructure synthesis, communication paradigm selection, and application mapping optimization. Far from being exhaustive, the discussed problems are deemed essential for future NoC research.

关键词： Network-on-a-chip Application software Design automation Design methodology Permission Computer architecture Design optimization Computer applications Algorithm design and analysis Multiprocessor interconnection networks

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Automatic network generation for system-on-chip communication design

Automatic network generation for system-on-chip communicatio...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： Andreas Gerstlauer Daniel D. Gajski Rainer Domer Dongwan Shin Center for Embedded Computer Systems University of California Irvine CA USA

With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary. In this paper, we extend previous work on automatic communication refinement to support non-traditional, network-oriented architectures beyond a single bus. From an abstract description of the desired communication channels, the refinement tools automatically generate executable models and implementations of the system communication at various levels of abstraction. Experimental results show that significant productivity gains can be achieved, demonstrating the effectiveness of the approach for rapid, early communication design space exploration.

关键词： system-on-a-chip Network topology system-level design Permission Message passing Computer networks Embedded computing Computational modeling Computer simulation Time to market

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