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检索条件"任意字段=ACM SIGPLAN 95 Conference on Programming Language Design and Implementation"

共 931 条记录，以下是201-210 订阅

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Java without the coffee breaks: A nonintrusive multiprocessor garbage collector 01

Java without the coffee breaks: A nonintrusive multiprocesso...

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acm sigplan conference on programming language design and implementation (PLDI)

作者： Bacon, DF Attanasio, CR Lee, HB Rajan, VT Smith, S IBM Corp Thomas J Watson Res Ctr Yorktown Hts NY 10598 USA

ISBN: (纸本)9781581134148

The deployment of Java as a concurrent programming language has created a critical need for high-performance, concurrent, and incremental multiprocessor garbage collection. We present the Recycler, a fully concurrent pure reference counting garbage collector that we have implemented in the Jalapeno Java virtual machine running on shared memory multiprocessors. While a variety of multiprocessor collectors have been proposed and some have been implemented, experimental data is limited and there is little quantitative basis for comparison between different algorithms. We present measurements of the Recycler and compare it against a non-concurrent but parallel load-balancing mark-and-sweep collector (that we also implemented in Jalapeno), and evaluate the classical tradeoff between response time and throughput. When processor or memory resources are limited, the Recycler runs at about 90% of the speed of the mark-and-sweep collector. However, with an extra processor to run collection and with a moderate amount of memory headroom, the Recycler is able to operate without ever blocking the mutators and achieves a maximum measured mutator delay of only 2.6 milliseconds for our benchmarks. End-to-end execution time is usually within 5%.

关键词： Java programming language

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Deriving an Efficient FPGA implementation of a Low Density Parity Check Forward Error Corrector 11

Deriving an Efficient FPGA Implementation of a Low Density P...

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16th acm sigplan International conference on Functional programming (ICFP 11)

作者： Gill, Andy Farmer, Andrew Univ Kansas Lawrence KS 66045 USA

ISBN: (纸本)9781450308656

Creating correct hardware is hard. Though there is much talk of using formal and semi-formal methods to develop designs and implementations, in practice most implementations are written without the support of any formal or semi-formal methodology. Having such a methodology brings many benefits, including improved likelihood of a correct implementation, lowering the cost of design exploration and lowering the cost of certification. In this paper, we introduce a semi-formal methodology for connecting executable specifications written in the functional language Haskell to efficient VHDL implementations. The connection is performed by manual edits, using semi-formal equational reasoning facilitated by the worker/wrapper transformation, and directed using commutable functors. We explain our methodology on a full-scale example, an efficient Low-Density Parity Check forward error correcting code, which has been implemented on a Virtex-5 FPGA.

关键词： design Performance Reliability Verification Lava DSL Error Correction LDPC

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Supporting array programming in X10 1

Supporting array programming in X10

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1st acm sigplan International Workshop on Libraries, languages and Compilers for Array programming, ARRAY 2014 - Part of PLDI 2014

作者： Grove, David Milthorpe, Josh Tardieu, Olivier IBM Research Australia Australian National University Australia

ISBN: (纸本)9781450329378

Effective support for array-based programming has long been one of the central design concerns of the X10 programming language. After significant research and exploration, X10 has adopted an approach based on providing arrays via user definable and extensible class libraries. This paper surveys the range of array abstractions available to the programmer in X10 2.4 and describes the key language features and language implementation techniques necessary to make efficient and productive implementations of these abstractions possible.. Copyright © 2014 acm 978-1-4503-2937-8/14/06. 15.00.

关键词： Abstracting

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Experience Report: seL4 Formally Verifying a High-Performance Microkernel

Experience Report: seL4 Formally Verifying a High-Performanc...

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14th acm sigplan International conference on Functional programming

作者： Klein, Gerwin Derrin, Philip Elphinstone, Kevin NICTA University of NSW Australia NICTA Australia

ISBN: (纸本)9781605583327

We report on our experience using Haskell as an executable specification language in the formal verification of the seL4 microkernel. The verification connects an abstract operational specification in the theorem prover Isabelle/HOL to a C implementation of the microkernel. We describe how this project differs from other efforts, and examine the effect of using Haskell in a large-scale formal verification. The kernel comprises 8,700 lines of C code;the verification more than 150,000 lines of proof script.

关键词： Verification design languages Haskell seL4 microkernel Isabelle/HOL

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The design of a virtual machine for Ada 80

The design of a virtual machine for Ada

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1980 acm-sigplan Symposium on Ada programming language, sigplan 1980

作者： Groves, L.J. Rogers, W.J. University of Waikato Hamilton New Zealand

ISBN: (纸本)0897910303

An implementation of Ada should be based on a machine-independent translater generating code for a Virtual Machine, which can be realised on a variety of machines. This approach, which leads to a high degree of compiler portability, has been very successful in a number of recent language implementation projects and is the approach which has been specified by the U.S. Army and Air Force in their requirements for Ada implementations. This paper discusses the rationale, requirements and design of such a Virtual Machine for Ada. The discussion concentrates on a number of fundamental areas in which problems arise: basic Virtual Machine structure, including Storage structure and addressing;data Storage and manipulation;flow of control;subprograms, blocks and exceptions;and task handling. © Proceedings of the 1980 acm conference on LISP and Functional programming, LFP 1980. All rights reserved.

关键词： Virtual machine

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An Efficient Interpreter for Datalog by De-specializing Relations 2021

An Efficient Interpreter for Datalog by De-specializing Rela...

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42nd acm sigplan International conference on programming language design and implementation (PLDI)

作者： Hu, Xiaowen Zhao, David Jordan, Herbert Scholz, Bernhard Univ Sydney Sch Comp Sci Sydney NSW Australia Univ Innsbruck Innsbruck Austria

ISBN: (纸本)9781450383912

Datalog is becoming increasingly popular as a standard tool for a variety of use cases. Modern Datalog engines can achieve high performance by specializing data structures for relational operations. For example, the Datalog engine Souffle achieves high performance with a synthesizer that specializes data structures for relations. However, the synthesizer cannot always be deployed, and a fast interpreter is required. This work introduces the design and implementation of the Souffle Tree Interpreter (STI). Key for the performance of the STI is the support for fast operations on relations. We obtain fast operations by de-specializing data structures so that they can work in a virtual execution environment. Our new interpreter achieves a competitive performance slowdown between 1.32 and 5.67x when compared to synthesized code. If compile time overheads of the synthesizer are also considered, the interpreter can be 6.46x faster on average for the first run.

关键词： Interpreter implementation Datalog Engine Static Data Structure

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The ATOMOσ transactional programming language

The ATOMOσ transactional programming language

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PLDI 2006 - 2006 acm sigplan conference on programming language design and implementation

作者： Carlstrom, Brian D. McDonald, Austen Chafi, Hassan Chung, JaeWoong Minh, Chi Cao Kozyrakis, Christos Olukotun, Kunle Computer Systems Laboratory Stanford University

ISBN: (纸本)1595933204

Atomos is the first programming language with implicit transactions, strong atomicity, and a scalable multiprocessor implementation. Atomos is derived from Java, but replaces its synchronization and conditional wailing constructs with simpler transactional alternatives. The Atomos watch statement allows programmers to specify fine-grained watch sets used with the Atomos retry conditional wailing statement for efficient transactional conflict-driven wakeup even in transactional memory systems with a limited number of transactional contexts. Aloinos supports open-nested transactions, which are necessary for building both scalable application programs and virtual machine implementations. The implementation of the Atomos scheduler demonstrates the use of open nesting within the virtual machine and introduces the concept of transactional memory violation handlers that allow programs to recover from data dependency violations without rolling back. Atomos programming examples are given to demonstrate the usefulness of transactional programming primitives. Atomos and Java are compared through the use of several benchmarks. The results demonstrate both the improvements in parallel programming ease and parallel program performance provided by Atomos. Copyright © 2006 acm.

关键词： Computer programming languages

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FlashExtract: A Framework for Data Extraction by Examples 14

FlashExtract: A Framework for Data Extraction by Examples

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35th acm sigplan conference on programming language design and implementation (PLDI)

作者： Le, Vu Gulwani, Sumit Univ Calif Davis Davis CA 95616 USA Microsoft Res Redmond Redmond WA USA

ISBN: (纸本)9781450327848

Various document types that combine model and view (e. g., text files, webpages, spreadsheets) make it easy to organize (possibly hierarchical) data, but make it difficult to extract raw data for any further manipulation or querying. We present a general framework FlashExtract to extract relevant data from semi-structured documents using examples. It includes: (a) an interaction model that allows end-users to give examples to extract various fields and to relate them in a hierarchical organization using structure and sequence constructs. (b) an inductive synthesis algorithm to synthesize the intended program from few examples in any underlying domain-specific language for data extraction that has been built using our specified algebra of few core operators (map, filter, merge, and pair). We describe instantiation of our framework to three different domains: text files, webpages, and spreadsheets. On our benchmark comprising 75 documents, FlashExtract is able to extract intended data using an average of 2.36 examples in 0.84 seconds per field.

关键词： languages Algorithms Human Factors Program Synthesis End-user programming programming by Examples

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Spatial: A language and Compiler for Application Accelerators 2018

Spatial: A Language and Compiler for Application Accelerator...

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39th acm sigplan conference on programming language design and implementation (PLDI)

作者： Koeplinger, David Feldman, Matthew Prabhakar, Raghu Zhang, Yaqi Hadjis, Stefan Fiszel, Ruben Zhao, Tian Nardi, Luigi Pedram, Ardavan Kozyrakis, Christos Olukotun, Kunle Stanford Univ Stanford CA 94305 USA Ecole Polytech Fed Lausanne Lausanne Switzerland

ISBN: (纸本)9781450356985

Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for improved performance and energy efficiency. Unfortunately, adoption of these architectures has been limited by their programming models. HDLs lack abstractions for productivity and are difficult to target from higher level languages. HLS tools are more productive, but offer an ad-hoc mix of software and hardware abstractions which make performance optimizations difficult. In this work, we describe a new domain-specific language and compiler called Spatial for higher level descriptions of application accelerators. We describe Spatial's hardware-centric abstractions for both programmer productivity and design performance, and summarize the compiler passes required to support these abstractions, including pipeline scheduling, automatic memory banking, and automated design tuning driven by active machine learning. We demonstrate the language's ability to target FPGAs and CGRAs from common source code. We show that applications written in Spatial are, on average, 42% shorter and achieve a mean speedup of 2.9x over SDAccel HLS when targeting a Xilinx UltraScale+ VU9P FPGA on an Amazon EC2 F1 instance.

关键词： domain-specific languages compilers hardware accelerators high-level synthesis reconfigurable architectures FPGAs CGRAs

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VeriML: Typed Computation of Logical Terms inside a language with Effects 10

VeriML: Typed Computation of Logical Terms inside a Language...

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15th acm sigplan International conference on Functional programming

作者： Stampoulis, Antonis Shao, Zhong Yale Univ Dept Comp Sci New Haven CT 06520 USA

ISBN: (纸本)9781605587943

Modern proof assistants such as Coq and Isabelle provide high degrees of expressiveness and assurance because they support formal reasoning in higher-order logic and supply explicit machine-checkable proof objects. Unfortunately, large scale proof development in these proof assistants is still an extremely difficult and time-consuming task. One major weakness of these proof assistants is the lack of a single language where users can develop complex tactics and decision procedures using a rich programming model and in a typeful manner. This limits the scalability of the proof development process, as users avoid developing domain-specific tactics and decision procedures. In this paper, we present VeriML-a novel language design that couples a type-safe effectful computational language with first-class support for manipulating logical terms such as propositions and proofs. The main idea behind our design is to integrate a rich logical framework-similar to the one supported by Coq-inside a computational language inspired by ML. The language design is such that the added features are orthogonal to the rest of the computational language, and also do not require significant additions to the logic language, so soundness is guaranteed. We have built a prototype implementation of VeriML including both its type-checker and an interpreter. We demonstrate the effectiveness of our design by showing a number of type-safe tactics and decision procedures written in VeriML.

关键词： proof assistants type theory dependent types logical frameworks

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