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检索条件"任意字段=ACM SIGPLAN 96 Conference on Programming Language Design and Implementation"

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It's alive! Continuous feedback in UI programming

It's alive! Continuous feedback in UI programming

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34th acm sigplan conference on programming language design and implementation, PLDI 2013

作者： Burckhardt, Sebastian De Halleux, Peli Moskal, Michal Fähndrich, Manuel McDirmid, Sean Tillmann, Nikolai Kato, Jun Microsoft Research United States University of Tokyo Japan

ISBN: (纸本)9781450320146

Live programming allows programmers to edit the code of a running program and immediately see the effect of the code changes. This tightening of the traditional edit-compile-run cycle reduces the cognitive gap between program code and execution, improving the learning experience of beginning programmers while boosting the productivity of seasoned ones. Unfortunately, live programming is difficult to realize in practice as imperative languages lack well-defined abstraction boundaries that make live programming responsive or its feedback comprehensible. This paper enables live programming for user interface programming by cleanly separating the rendering and non-rendering aspects of a UI program, allowing the display to be refreshed on a code change without restarting the program. A type and effect system formalizes this separation and provides an evaluation model that incorporates the code update step. By putting live programming on a more formal footing, we hope to enable critical and technical discussion of live programming systems. Copyright © 2013 acm.

关键词： Graphical user interfaces

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It's Alive! Continuous Feedback in UI programming

It's Alive! Continuous Feedback in UI Programming

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34th acm sigplan conference on programming language design and implementation (PLDI)

作者： Burckhardt, Sebastian Faehndrich, Manuel de Halleux, Peli McDirmid, Sean Moskal, Michal Tillmann, Nikolai Kato, Jun Univ Tokyo Tokyo 1138654 Japan

关键词： languages Human Factors Live programming Graphical User Interface

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SPL^LIFT - Statically Analyzing Software Product Lines in Minutes Instead of Years 13

SPL<SUP>LIFT</SUP> - Statically Analyzing Software Product L...

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34th acm sigplan conference on programming language design and implementation (PLDI)

作者： Bodden, Eric Toledo, Tarsis Ribeiro, Marcio Brabrand, Claus Borba, Paulo Mezini, Mira Tech Univ Darmstadt EC SPRIDE Darmstadt Germany IT Univ Copenhagen Copenhagen Denmark Univ Fed Pernambuco Recife PE Brazil Univ Fed Alagoas Maceio Brazil

ISBN: (纸本)9781450320146

A software product line (SPL) encodes a potentially large variety of software products as variants of some common code base. Up until now, re-using traditional static analyses for SPLs was virtually intractable, as it required programmers to generate and analyze all products individually. In this work, however, we show how an important class of existing inter-procedural static analyses can be transparently lifted to SPLs. Without requiring programmers to change a single line of code, our approach SPLLIFT automatically converts any analysis formulated for traditional programs within the popular IFDS framework for inter-procedural, finite, distributive, subset problems to an SPL-aware analysis formulated in the IDE framework, a well-known extension to IFDS. Using a full implementation based on Heros, Soot, CIDE and JavaBDD, we show that with SPLLIFT one can reuse IFDS-based analyses without changing a single line of code. Through experiments using three static analyses applied to four Java-based product lines, we were able to show that our approach produces correct results and outperforms the traditional approach by several orders of magnitude.

关键词： Software product lines inter-procedural static analysis context sensitive flow sensitive design languages Performance

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CLAP: Recording Local Executions to Reproduce Concurrency Failures

CLAP: Recording Local Executions to Reproduce Concurrency Fa...

引用

34th acm sigplan conference on programming language design and implementation (PLDI)

作者： Huang, Jeff Zhang, Charles Dolby, Julian Hong Kong Univ Sci & Technol Hong Kong Hong Kong Peoples R China

ISBN: (纸本)9781450320146

We present CLAP, a new technique to reproduce concurrency bugs. CLAP has two key steps. First, it logs thread local execution paths at runtime. Second, offline, it computes memory dependencies that accord with the logged execution and are able to reproduce the observed bug. The second step works by combining constraints from the thread paths and constraints based on a memory model, and computing an execution with a constraint solver. CLAP has four major advantages. First, logging purely local execution of each thread is substantially cheaper than logging memory interactions, which enables CLAP to be efficient compared to previous approaches. Second, our logging does not require any synchronization and hence with no added memory barriers or fences;this minimizes perturbation and missed bugs due to extra synchronizations foreclosing certain racy behaviors. Third, since it uses no synchronization, we extend CLAP to work on a range of relaxed memory models, such as TSO and PSO, in addition to sequential consistency. Fourth, CLAP can compute a much simpler execution than the original one, that reveals the bug with minimal thread context switches. To mitigate the scalability issues, we also present an approach to parallelize constraint solving, which theoretically scales our technique to programs with arbitrary execution length. Experimental results on a variety of multithreaded benchmarks and real world concurrent applications validate these advantages by showing that our technique is effective in reproducing concurrency bugs even under relaxed memory models;furthermore, it is significantly more efficient than a state-of-the-art technique that records shared memory dependencies, reducing execution time overhead by 45% and log size by 88% on average.

关键词： Algorithms design Performance Theory Concurrency Bug Reproduction Local Execution Constraint Solving

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Fast RMWs for TSO: Semantics and implementation

Fast RMWs for TSO: Semantics and Implementation

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34th acm sigplan conference on programming language design and implementation (PLDI)

作者： Rajaram, Bhargava Nagarajan, Vijay Sarkar, Susmit Elver, Marco Univ Edinburgh Edinburgh EH8 9YL Midlothian Scotland Univ St Andrews St Andrews KY16 9AJ Fife Scotland

ISBN: (纸本)9781450320146

Read-Modify-Write (RMW) instructions are widely used as the building blocks of a variety of higher level synchronization constructs, including locks, barriers, and lock-free data structures. Unfortunately, they are expensive in architectures such as x86 and SPARC which enforce (variants of) Total-Store-Order (TSO). A key reason is that RMWs in these architectures are ordered like a memory barrier, incurring the cost of a write-buffer drain in the critical path. Such strong ordering semantics are dictated by the requirements of the strict atomicity definition (type-1) that existing TSO RMWs use. Programmers often do not need such strong semantics. Besides, weakening the atomicity definition of TSO RMWs, would also weaken their ordering - thereby leading to more efficient hardware implementations. In this paper we argue for TSO RMWs to use weaker atomicity definitions - we consider two weaker definitions: type-2 and type-3, with different relaxed ordering differences. We formally specify how such weaker RMWs would be ordered, and show that type-2 RMWs, in particular, can seamlessly replace existing type-1 RMWs in common synchronization idioms - except in situations where a type-1 RMW is used as a memory barrier. Recent work has shown that the new C/C++ 11 concurrency model can be realized by generating conventional (type-1) RMWs for C/C++ 11 SC-atomic-writes and/or SC-atomic-reads. We formally prove that this is equally valid using the proposed type-2 RMWs;type-3 RMWs, on the other hand, could be used for SC-atomic-reads (and optionally SC-atomic-writes). We further propose efficient microarchitectural implementations for type-2 (type-3) RMWs - simulation results show that our implementation reduces the cost of an RMW by up to 58.9% (64.3%), which translates into an overall performance improvement of up to 9.0% (9.2%) on a set of parallel programs, including those from the SPLASH-2, PARSEC, and STAMP benchmarks.

关键词： design Performance Experimentation Read-Modify-Write (RMW) Total-Store-Order (TSO) Atomics

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language Support for Dynamic, Hierarchical Data Partitioning 13

Language Support for Dynamic, Hierarchical Data Partitioning

引用

2013 acm sigplan International conference on Object Oriented programming Systems languages

作者： Treichler, Sean Bauer, Michael Aiken, Alex Stanford Univ Stanford CA 94305 USA

ISBN: (纸本)9781450323741

Applications written for distributed-memory parallel architectures must partition their data to enable parallel execution. As memory hierarchies become deeper, it is increasingly necessary that the data partitioning also be hierarchical to match. Current language proposals perform this hierarchical partitioning statically, which excludes many important applications where the appropriate partitioning is itself data dependent and so must be computed dynamically. We describe Legion, a region-based programming system, where each region may be partitioned into subregions. Partitions are computed dynamically and are fully programmable. The division of data need not be disjoint and subregions of a region may overlap, or alias one another. Computations use regions with certain privileges (e.g., expressing that a computation uses a region read-only) and data coherence (e.g., expressing that the computation need only be atomic with respect to other operations on the region), which can be controlled on a per-region (or subregion) basis. We present the novel aspects of the Legion design, in particular the combination of static and dynamic checks used to enforce soundness. We give an extended example illustrating how Legion can express computations with dynamically determined relationships between computations and data partitions. We prove the soundness of Legion's type system, and show Legion type checking improves performance by up to 71% by eliding provably safe memory checks. In particular, we show that the dynamic checks to detect aliasing at runtime at the region granularity have negligible overhead. We report results for three real-world applications running on distributed memory machines, achieving up to 62.5X speedup on 96 GPUs on the Keeneland supercomputer.

关键词： Legion regions type system independence aliasing hierarchical scheduling data partitioning coherence

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Isolation for Nested Task Parallelism 13

Isolation for Nested Task Parallelism

引用

2013 acm sigplan International conference on Object Oriented programming Systems languages

作者： Zhao, Jisheng Lublinerman, Roberto Budimlic, Zoran Chaudhuri, Swarat Sarkar, Vivek Rice Univ Houston TX 77251 USA Google Inc Mountain View CA USA

ISBN: (纸本)9781450323741

Isolation-the property that a task can access shared data without interference from other tasks-is one of the most basic concerns in parallel programming. While there is a large body of past work on isolated task-parallelism, the integration of isolation, task-parallelism, and nesting of tasks has been a difficult and unresolved challenge. In this paper, we present a programming and execution model called Otello where isolation is extended to arbitrarily nested parallel tasks with irregular accesses to heap data. At the same time, no additional burden is imposed on the programmer, who only exposes parallelism by creating and synchronizing parallel tasks, leaving the job of ensuring isolation to the underlying compiler and runtime system. Otello extends our past work on Aida execution model and the delegated isolation mechanism [22] to the setting of nested parallelism. The basic runtime construct in Aida and Otello is an assembly: a task equipped with a region in the shared heap that it owns. When an assembly A conflicts with an assembly B, A transfers-or delegates-its code and owned region to a carefully selected assembly C in a way that will ensure isolation with B, leaving the responsibility of re-executing task A to C. The choice of C depends on the nesting relationship between A and B. We have implemented Otello on top of the Habanero Java (HJ) parallel programming language [8], and used this implementation to evaluate Otello on collections of nested task-parallel benchmarks and non-nested transactional benchmarks from past work. On the nested task-parallel bench-marks, Otello achieves scalability comparable to HJ programs without built-in isolation, and the relative overhead of Otello is lower than that of many published data-race detection algorithms that detect the isolation violations (but do not enforce isolation). For the transactional benchmarks, Otello incurs lower overhead than a state-of-the-art software transactional memory system (Deuce STM).

关键词： languages design Isolation programming abstractions Irregular parallelism Contention

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Exadapt'11 - Proceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era - In Cooperation with the 32nd acm sigplan conference on programming language design and implementation, PLDI 2011

Exadapt'11 - Proceedings of the 1st International Workshop o...

引用

1st acm sigplan International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era, Exadapt 2011 - Co-located with 32nd acm sigplan conference on programming language design and implementation, PLDI 2011 at FCRC 2011

ISBN: (纸本)9781450307086

The proceedings contain 7 papers. The topics discussed include: AARTS: low overhead online adaptive auto-tuning;contentiousness vs. sensitivity: improving contention aware runtime systems on multicore architectures;probabilistic auto-tuning for architectures with complex constraints;efficiently exploring compiler optimization sequences with pair-wise pruning;adapt or become extinct!;loaf: a framework and infrastructure for creating online adaptive solutions;and using a codelet program execution model for exascale machines.

关键词： Software architecture

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Session details: language design 13

Session details: Language design

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Proceedings of the 34th acm sigplan conference on programming language design and implementation

作者： Umut A. Acar Carnegie Mellon University

No abstract available.

ISBN: (纸本)9781450320146

No abstract available.

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Quipper: A Scalable Quantum programming language 13

Quipper: A Scalable Quantum Programming Language

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acm sigplan conference on programming language design and implementation

作者： Alexander S. Green Peter LeFanu Lumsdaine Neil J. Ross Peter Selinger Benoit Valiron Dalhousie University Institute of Advanced Studies University of Pennsylvania

ISBN: (纸本)9781450320146

The field of quantum algorithms is vibrant. Still, there is currently a lack of programming languages for describing quantum computation on a practical scale, i.e., not just at the level of toy problems. We address this issue by introducing Quipper, a scalable, expressive, functional, higher-order quantum programming language. Quipper has been used to program a diverse set of non-trivial quantum algorithms, and can generate quantum gate representations using trillions of gates. It is geared towards a model of computation that uses a classical computer to control a quantum device, but is not dependent on any particular model of quantum hardware. Quipper has proven effective and easy to use, and opens the door towards using formal methods to analyze quantum algorithms.

关键词： Quipper Quantum programming languages

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