检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

774 篇 会议
129 篇 期刊文献

馆藏范围

903 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

801 篇 工学
- 787 篇 软件工程
- 527 篇 计算机科学与技术...
- 22 篇 控制科学与工程
- 11 篇 信息与通信工程
- 7 篇 电气工程
- 5 篇 电子科学与技术（可...
- 4 篇 化学工程与技术
- 2 篇 安全科学与工程
- 1 篇 机械工程
- 1 篇 动力工程及工程热...
- 1 篇 纺织科学与工程
- 1 篇 航空宇航科学与技...
- 1 篇 生物工程
100 篇 理学
- 86 篇 数学
- 10 篇 系统科学
- 9 篇 统计学（可授理学、...
- 4 篇 化学
- 2 篇 物理学
- 2 篇 生物学
- 1 篇 地质学
49 篇 管理学
- 33 篇 管理科学与工程(可...
- 21 篇 工商管理
- 19 篇 图书情报与档案管...
5 篇 经济学
- 5 篇 应用经济学
4 篇 教育学
- 4 篇 教育学
3 篇 法学
- 3 篇 社会学

主题

164 篇 design
155 篇 languages
96 篇 performance
70 篇 computer program...
56 篇 algorithms
43 篇 experimentation
42 篇 computer program...
39 篇 verification
34 篇 reliability
31 篇 object oriented ...
26 篇 java programming...
25 篇 program synthesi...
25 篇 functional progr...
24 篇 probabilistic pr...
22 篇 java
19 篇 theory
19 篇 concurrency
18 篇 type systems
18 篇 domain-specific ...
17 篇 compilers

机构

15 篇 carnegie mellon ...
13 篇 princeton univ p...
11 篇 stanford univ st...
11 篇 univ texas austi...
10 篇 univ michigan an...
10 篇 rice univ housto...
10 篇 purdue univ w la...
10 篇 univ calif berke...
9 篇 univ wisconsin m...
9 篇 harvard univ cam...
9 篇 univ penn philad...
9 篇 univ washington ...
8 篇 yale univ new ha...
8 篇 cornell univ ith...
8 篇 univ chicago il ...
7 篇 mit cambridge ma...
7 篇 northeastern uni...
7 篇 microsoft resear...
6 篇 microsoft res re...
6 篇 microsoft res re...

作者

11 篇 walker david
10 篇 dillig isil
9 篇 aiken alex
9 篇 chlipala adam
8 篇 solar-lezama arm...
8 篇 chaudhuri swarat
7 篇 august david i.
7 篇 shao zhong
7 篇 sarkar vivek
6 篇 wang xinyu
6 篇 grossman dan
6 篇 adl-tabatabai al...
6 篇 foster nate
6 篇 bacon david f.
6 篇 gulwani sumit
6 篇 myers andrew c.
6 篇 mezini mira
6 篇 mahlke scott
6 篇 bodik rastislav
5 篇 mckinley kathryn...

语言

825 篇 英文
77 篇 其他
1 篇 中文

检索条件"任意字段=ACM SIGPLAN 96 Conference on Programming Language Design and Implementation"

共 903 条记录，以下是571-580 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Cloning-based context-sensitive pointer alias analysis using binary decision diagrams

Cloning-based context-sensitive pointer alias analysis using...

引用

Proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Whaley, John Lam, Monica S. Computer Science Department Stanford University Stanford CA 94305 United States

This paper presents the first scalable context-sensitive, inclusion-based pointer alias analysis for Java programs. Our approach to context sensitivity is to create a clone of a method for every context of interest, and run a context-insensitive algorithm over the expanded call graph to get context-sensitive results. For precision, we generate a clone for every acyclic path through a program's call graph, treating methods in a strongly connected component as a single node. Normally, this formulation is hopelessly intractable as a call graph often has 1014 acyclic paths or more. We show that these exponential relations can be computed efficiently using binary decision diagrams (BDDs). Key to the scalability of the technique is a context numbering scheme that exposes the commonalities across contexts. We applied our algorithm to the most popular applications available on Sourceforge, and found that the largest programs, with hundreds of thousands of Java bytecodes, can be analyzed in under 20 minutes. This paper shows that pointer analysis, and many other queries and algorithms, can be described succinctly and declaratively using Datalog, a logic programming language. We have developed a system called bddbddb that automatically translates Datalog programs into highly efficient BDD implementations. We used this approach to develop a variety of context-sensitive algorithms including side effect analysis, type analysis, and escape analysis.

关键词： Java programming language

来源：评论

学校读者我要写书评

暂无评论

Parametric analysis for adaptive computation offloading

Parametric analysis for adaptive computation offloading

引用

conference on programming language design and implementation

作者： Wang, C Li, ZY Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA

Many programs can be invoked under different execution options;input parameters and data files. Such different execution contexts may lead to strikingly different execution instances. The optimal code generation may be sensitive to the execution instances. In this paper, we show how to use parametric program analysis to deal with this issue for the optimization problem of computation offloading. Computation offloading has been shown to be an effective way to improve performance and energy saving on mobile devices. Optimal program partitioning for computation offloading depends on the tradeoff between the computation workload and the communication cost. The computation workload and communication requirement may change with different execution instances. Optimal decisions on program partitioning must be made at run time when sufficient information about workload and communication requirement becomes available. Our cost analysis obtains program computation workload and communication cost expressed as functions of run-time parameters, and our parametric partitioning algorithm finds the optimal program partitioning corresponding to different ranges of run-time parameters. At run time, the transformed program self-schedules its tasks on either the mobile device or the server, based on the optimal program partitioning that corresponds to the current values of run-time parameters. Experimental results on an HP IPAQ handheld device show that different run-time parameters can lead to quite different program partitioning decisions.

关键词： algorithms design experimentation measurement performance program partitioning program analysis program transformation computation offloading program profiling handheld devices adaptive optimization distributed system

来源：评论

学校读者我要写书评

暂无评论

Min-cut program decomposition for thread-level speculation

Min-cut program decomposition for thread-level speculation

引用

Proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Johnson, Troy A. Eigenmann, Rudolf Vijaykumar, T.N. Sch. of Elec. and Comp. Engineering Purdue University West Lafayette IN 47907 United States

With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, allowing the compiler to improve performance by speculating on ambiguous dependences without absolute guarantees of independence. The compiler is responsible for decomposing a sequential program into speculatively parallel threads, while considering multiple performance overheads related to data dependence, load imbalance, and thread prediction. Although the decomposition problem lends itself to a min-cut-based approach, the over-heads depend on the thread size, requiring the edge weights to be changed as the algorithm progresses. The changing weights make our approach different from graph-theoretic solutions to the general problem of task scheduling. One recent work uses a set of heuristics, each targeting a specific overhead in isolation, and gives precedence to thread prediction, without comparing the performance of the threads resulting from each heuristic. By contrast, our method uses a sequence of balanced min-cuts that give equal consideration to all the overheads, and adjusts the edge weights after every cut. This method achieves an (geometric) average speedup of 74% for floating-point programs and 23% for integer programs on a four-processor chip, improving on the 52% and 13% achieved by the previous heuristics.

关键词： Computer programming

来源：评论

学校读者我要写书评

暂无评论

The liberty structural specification language: A high-level modeling language for component reuse

The liberty structural specification language: A high-level ...

引用

conference on programming language design and implementation

作者： Vachharajani, M Vachharajani, N August, DI Princeton Univ Dept Comp Sci & Elect Engn Princeton NJ 08544 USA

Rapid exploration of the design space with simulation models is essential for quality hardware systems research and development. Despite striking commonalities across hardware systems, designers routinely fail to achieve high levels of reuse across models constructed in existing general-purpose and domain-specific languages. This lack of reuse adversely impacts hardware system design by slowing the rate at which ideas are evaluated. This paper presents an examination of existing languages to reveal their fundamental limitations regarding reuse in hardware modeling. With this understanding, a solution is described in the context of the design and implementation of the Liberty Structural Specification language (LSS), the input language for a publicly available high-level digital-hardware modeling tool called the Liberty Simulation Environment. LSS is the first language to enable low-overhead reuse by simultaneously supporting static inference based on hardware structure and flexibility via parameterizable structure. Through LSS, this paper also introduces a new type inference algorithm and a new programming language technique, called use-based specialization, which. in a manner analogous to type inference, customizes reusable components by statically inferring structural properties that otherwise would have had to have been specified manually.

关键词： Liberty Simulation Environment (LSE) Liberty Structural Specification (LSS) component reuse simulator construction structural modeling type inference use-based specialization

来源：评论

学校读者我要写书评

暂无评论

Concrete syntax for objects - Domain-specific language embedding and assimilation without restrictions

Concrete syntax for objects - Domain-specific language embed...

引用

19th conference on Object-Oriented programming, Systems, languages, and Applications

作者： Bravenboer, M Visser, E Univ Utrecht Inst Comp & Informat Sci NL-3508 TB Utrecht Netherlands

ISBN: (纸本)1581138318

Application programmer's interfaces give access to domain knowledge encapsulated in class libraries without providing the appropriate notation for expressing domain composition. Since object-oriented languages are designed for extensibility and reuse, the language constructs are often sufficient for expressing domain abstractions at the semantic level. However, they do not provide the right abstractions at the syntactic level. In this paper we describe META BORG, a method for providing concrete syntax for domain abstractions to application programmers. The method consists of embedding domain-specific languages in a general purpose host language and assimilating the embedded domain code into the surrounding host code. Instead of extending the implementation of the host language, the assimilation phase implements domain abstractions in terms of existing APIs leaving the host language undisturbed. Indeed, META-BORG can be considered a method for promoting APIs to the language level. The method is supported by proven and available technology, i.e. the syntax definition formalism SDF and the program transformation language and toolset Stratego/XT. We illustrate the method with applications in three domains: code generation, XML generation, and user-interface construction.

关键词： languages design METABORG stratego SDF embedded languages syntax extension extensible syntax domain-specific languages rewriting meta programming concrete object syntax

来源：评论

学校读者我要写书评

暂无评论

Practical predicate dispatch 04

Practical predicate dispatch

引用

19th conference on Object-Oriented programming, Systems, languages, and Applications

作者： Millstein, T Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

ISBN: (纸本)9781581138313

Predicate dispatch is an object-oriented (OO) language mechanism for determining the method implementation to be invoked upon a message send. With predicate dispatch, each method implementation includes a predicate guard specifying the conditions under which the method should be invoked, and logical implication of predicates determines the method overriding relation. Predicate dispatch naturally unifies and generalizes several common forms of dynamic dispatch, including traditional OO dispatch, multimethod dispatch, and functional-style pattern matching. Unfortunately, prior languages supporting predicate dispatch have had several deficiencies that limit its utility in practice. We introduce JPred, a backward-compatible extension to Java supporting predicate dispatch. While prior languages with predicate dispatch have been extensions to toy or non-mainstream languages, we show how predicate dispatch can be naturally added to a traditional OO language. While prior languages with predicate dispatch have required the whole program to be available for type-checking and compilation, JPred retains Java's modular type-checking and compilation strategies. While prior languages with predicate dispatch have included special-purpose algorithms for reasoning about predicates, JPred employs general-purpose, off-the-shelf decision procedures. As a result, JPred's type system is more flexible, allowing several useful programming idioms that are spuriously rejected by those other languages. After describing the JPred language and type system, we present a case study illustrating the utility of JPred in a real-world application, including its use in the detection of several errors.

关键词： design languages predicate dispatch dynamic dispatch modular typechecking

来源：评论

学校读者我要写书评

暂无评论

Scalable lock-free dynamic memory allocation

Scalable lock-free dynamic memory allocation

引用

Proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Michael, Maged M. IBM Thomas J. Watson Research Center P.O. Box 218 Yorktown Heights NY 10598 United States

Dynamic memory allocators (malloc/free) rely on mutual exclusion locks for protecting the consistency of their shared data structures under multithreading. The use of locking has many disadvantages with respect to performance, availability, robustness, and programming flexibility. A lock-free memory allocator guarantees progress regardless of whether some threads are delayed or even killed and regardless of scheduling policies. This paper presents a completely lock-free memory allocator. It uses only widely-available operating system support and hardware atomic instructions. It offers guaranteed availability even under arbitrary thread termination and crash-failure, and it is immune to dead-lock regardless of scheduling policies, and hence it can be used even in interrupt handlers and real-time applications without requiring special scheduler support. Also, by leveraging some high-level structures from Hoard, our allocator is highly scalable, limits space blowup to a constant factor, and is capable of avoiding false sharing. In addition, our allocator allows finer concurrency and much lower latency than Hoard. We use PowerPC shared memory multiprocessor systems to compare the performance of our allocator with the default AIX 5.1 libc malloc, and two widely-used multithread allocators, Hoard and Ptmalloc. Our allocator outperforms the other allocators in virtually all cases and often by substantial margins, under various levels of parallelism and allocation patterns. Furthermore, our allocator also offers the lowest contention-free latency among the allocators by significant margins.

关键词： Computer programming

来源：评论

学校读者我要写书评

暂无评论

A formal concurrency model based architecture description language for synthesis of software development tools 04

A formal concurrency model based architecture description la...

引用

conference on languages, Compilers and Tools for Embedded Systems

作者： Qin, W Rajagopalan, S Malik, S Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)9781581138061

Rapidly increasing design and manufacturing non-recurring engineering (NRE) costs are prompting a shift in electronic design from hardwired application specific integrated circuits (ASICs) to the use of software on programmable platforms. However, in order to minimize the power and performance overhead of such processors, we are seeing the introduction of domain or application specific processors such as network and communication processors. The design of such specialized processors requires software development tools such as simulators and compilers. In order to quickly develop these tools for multiple design points under consideration, it is highly desirable to have them synthesized from formal processor descriptions written in Architecture Description languages (ADLs). In this paper, we present the Mescal Architecture Description language (MADL). MADL features a two-layer structure, a core layer and an annotation layer. The core layer is based on a formal and flexible microprocessor model-the operation state machine (OSM), which enables MADL to express the concurrency at the operation execution level for a wide range of architectures. We address the challenges faced in designing the core layer to combine the OSM model with techniques for achieving compact processor descriptions. The annotation layer features a generic syntax that allows creating annotation schemes to specify implementation dependent or tool specific information. To show the effectiveness of MADL, we present an MADL-based simulator synthesis framework that has been used to generate efficient cycle accurate simulators and instruction set simulators with very low development effort. We also describe our annotation schemes that enable the extraction of architecture properties for use in instruction scheduling and integer-linear-programming based register allocation. Our experimental results demonstrate the efficacy of MADL as a practical and promising language for the development of programmable plat

关键词： design languages verification

来源：评论

学校读者我要写书评

暂无评论

Prefetch injection based on hardware monitoring and object metadata

Prefetch injection based on hardware monitoring and object m...

引用

Proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Adl-Tabatabai, Ali-Reza Hudson, Richard L. Serrano, Mauricio J. Subramoney, Sreenivas Programming Systems Laboratory Microprocessor Technology Laboratory Intel Corporation Santa Clara CA United States

Cache miss stalls hurt performance because of the large gap between memory and processor speeds - for example, the popular server benchmark SPEC JBB2000 spends 45% of its cycles stalled waiting for memory requests on the Itanium® 2 processor. Traversing linked data structures causes a large portion of these stalls. Prefetching for linked data structures remains a major challenge because serial data dependencies between elements in a linked data structure preclude the timely materialization of prefetch addresses. This paper presents Mississippi Delta (MS Delta), a novel technique for prefetching linked data structures that closely integrates the hardware performance monitor (HPM), the garbage collector's global view of heap and object layout, the type-level metadata inherent in type-safe programs, and JIT compiler analysis. The garbage collector uses the HPM's data cache miss information to identify cache miss intensive traversal paths through linked data structures, and then discovers regular distances (deltas) between these linked objects. JIT compiler analysis injects prefetch instructions using deltas to materialize prefetch addresses. We have implemented MS Delta in a fully dynamic profile-guided optimization system: the StarJIT dynamic compiler and the ORP Java virtual machine, We demonstrate a 28-29% reduction in stall cycles attributable to the high-latency cache misses targeted by MS Delta and a speedup of 11-14% on the cache miss intensive SPEC JBB2000 benchmark.

关键词： Cache memory

来源：评论

学校读者我要写书评

暂无评论

A cost-driven compilation framework for speculative parallelization of sequential programs

A cost-driven compilation framework for speculative parallel...

引用

Proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Du, Zhao-Hui Yang, Chen Lim, Chu-Cheow Zhao, Qingyu Li, Xiao-Feng Ngai, Tin-Fook Intel China Research Center Intel China Ltd. Beijing China Programming Systems Lab Intel Corporation Santa Clara California United States

The emerging hardware support for thread-level speculation opens new opportunities to parallelize sequential programs beyond the traditional limits. By speculating that many data dependences are unlikely during runtime, consecutive iterations of a sequential loop can be executed speculatively in parallel. Runtime parallelism is obtained when the speculation is correct. To take full advantage of this new execution model, a program needs to be programmed or compiled in such a way that it exhibits high degree of speculative thread-level parallelism. We propose a comprehensive cost-driven compilation framework to perform speculative parallelization. Based on a misspeculation cost model, the compiler aggressively transforms loops into optimal speculative parallel loops and selects only those loops whose speculative parallel execution is likely to improve program performance. The framework also supports and uses enabling techniques such as loop unrolling, software value prediction and dependence profiling to expose more speculative parallelism. The proposed framework was implemented on the ORC compiler. Our evaluation showed that the cost-driven speculative parallelization was effective. Our compiler was able to generate good speculative parallel loops in ten Spec2000Int benchmarks, which currently achieve an average 8% speedup. We anticipate an average 15.6% speedup when all enabling techniques are in place.

关键词： Parallel processing systems

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共91页 << < 54 55 56 57 58 59 60 61 62 63 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：