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12th International conference on Architectural Support for programming languages and Operating Systems

作者： Damron, Peter Fedorova, Alexandra Lev, Yossi Luchangco, Victor Moir, Mark Nussbaum, Daniel Sun Microsyst Santa Clara CA 95054 USA Harvard Univ Cambridge MA 02138 USA Brown Univ Providence RI 02912 USA

Transactional memory (TM) promises to substantially reduce the difficulty of writing correct, efficient, and scalable concurrent programs. But "bounded" and "best-effort" hardware TM proposals impose unreasonable constraints on programmers, while more flexible software TM implementations are considered too slow. Proposals for supporting "unbounded" transactions in hardware entail significantly higher complexity and risk than best-effort designs. We introduce Hybrid Transactional Memory (HyTM), an approach to implementing TM in software so that it can use best-effort hardware TM (HTM) to boost performance but does not depend on HTM. Thus programmers can develop and test transactional programs in existing systems today, and can enjoy the performance benefits of HTM support when it becomes available. We describe our prototype HyTM system, comprising a compiler and a library. The compiler allows a transaction to be attempted using best-effort HTM, and retried using the software library if it fails. We have used our prototype to "transactify" part of the Berkeley DB system, as well as several benchmarks. By disabling the optional use of HTM, we can run all of these tests on existing systems. Furthermore, by using a simulated multiprocessor with HTM support, we demonstrate the viability of the HyTM approach: it can provide performance and scalability approaching that of an unbounded HTM implementation, without the need to support all transactions with complicated HTM support.

关键词： algorithms design transactional memory

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Supporting nested transactional memory in LogTM

Supporting nested transactional memory in LogTM

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12th International conference on Architectural Support for programming languages and Operating Systems

作者： Moravan, Michelle J. Bobba, Jayaram Moore, Kevin E. Yen, Luke Hill, Mark D. Liblit, Ben Swift, Michael M. Wood, David A. Univ Wisconsin Dept Comp Sci Madison WI 53706 USA

Nested transactional memory (TM) facilitates software composition by letting one module invoke another without either knowing whether the other uses transactions. Closed nested transactions extend isolation of an inner transaction until the top-level transaction commits. implementations may flatten nested transactions into the top-level one, resulting in a complete abort on conflict, or allow partial abort of inner transactions. Open nested transactions allow a committing inner transaction to immediately release isolation, which increases parallelism and expressiveness at the cost of both software and hardware complexity. This paper extends the recently-proposed flat Log-based Transactional Memory (LogTM) with nested transactions. Flat LogTM saves pre-transaction values in a log, detects conflicts with read (R) and write (W) bits per cache block, and, on abort, invokes a software handler to unroll the log. Nested LogTM supports nesting by segmenting the log into a stack of activation records and modestly replicating R/W bits. To facilitate composition with non-transactional code, such as language runtime and operating system services, we propose escape actions that allow trusted code to run outside the confines of the transactional memory system.

关键词： design languages transactional memory nesting LogTM

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Complete Information Flow Tracking from the Gates Up

Complete Information Flow Tracking from the Gates Up

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14th International conference on Architectural Support for programming languages and Operating Systems

作者： Tiwari, Mohit Wassel, Hassan M. G. Mazloom, Bita Mysore, Shashidhar Chong, Frederic T. Sherwood, Timothy Univ Calif Santa Barbara Dept Comp Sci Santa Barbara CA 93106 USA

For many mission-critical tasks, tight guarantees on the flow of information are desirable, for example, when handling important cryptographic keys or sensitive financial data. We present a novel architecture capable of tracking all information flow within the machine, including all explicit data transfers and all implicit flows (those subtly devious flows caused by not performing conditional operations). While the problem is impossible to solve in the general case, we have created a machine that avoids the general-purpose programmability that leads to this impossibility result, yet is still programmable enough to handle a variety of critical operations such as public-key encryption and authentication. Through the application of our novel gate-level information flow tracking method, we show how all flows of information can be precisely tracked. From this foundation, we then describe how a class of architectures can be constructed, from the gates up, to completely capture all information flows and we measure the impact of doing so on the hardware implementation, the ISA, and the programmer.

关键词： design Security

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Proceedings of the conference on TRI-Ada 1991: Today's Accomplishments;Tomorrow's Expectations, TRI-Ada 1991

Proceedings of the Conference on TRI-Ada 1991: Today's Accom...

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1991 conference on TRI-Ada: Today's Accomplishments;Tomorrow's Expectations, TRI-Ada 1991

ISBN: (纸本)0897914457

The proceedings contain 57 papers. The topics discussed include: CAPS as a requirements engineering tool;Ada and CMS-2 cohabitation a transition method for U.S. Navy realtime tactical systems;experiences in developing an Ada cross compiler;Ada semantic interface specification (ASIS);debugging of optimized ADA code;Adam, an Ada simulation library;vaijdating the adarts software design method for real-time systems;Ada-based support for abstraction, encapsulation and unit hierarchy;SA-2-Ada : a methodology for deriving Ada designs from structured analysis specifications;a microprocessor with ADA real time support;SDL: a standard language for Ada real -time applications;pilot command center testbed development environment: a better way to develop C3systems;dynamic software replacement model and its Ada implementation;design and implementation of a multi-tool ADA front end;a three level ADA interface to a commercial database;efficient loop-level parallelism in Ada;building distributed Ada applications from specifications and functional components;distribution of Ada tasks onto a heterogeneous environment;and supporting packed decimal in Ada.

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Classifying Java Class Transformations for Pervasive Virtualized Access

Classifying Java Class Transformations for Pervasive Virtual...

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8th International conference on Generative programming and Component Engineering

作者： McGachey, Phil Hosking, Antony L. Moss, J. Eliot B. Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA Univ Massachusetts Dept Comp Sci Amherst MA 01003 USA

The indirection of object accesses is a common theme for target domains as diverse as transparent distribution, persistence, and program instrumentation. Virtualizing accesses to fields and methods (by redirecting calls through accessor and indirection methods) allows interposition of arbitrary code, extending the functionality of an application beyond that intended by the original developer. We present class modifications performed by our RuggedJ transparent distribution platform for standard Java virtual machines. RuggedJ abstracts over the location of objects by implementing a single object model for local and remote objects. However the implementation of this model is complicated by the presence of native and system code;classes loaded by Java's bootstrap class loader can be rewritten only in a limited manner, and so cannot be modified to conform to RuggedJ's complex object model. We observe that system code comprises the majority of a given Java application: an average of 76% in the applications we study. We consider the constraints imposed upon pervasive class transformation within Java, and present a framework for systematically rewriting arbitrary applications. Our system accommodates all system classes, allowing both user and system classes alike to be referenced using a single object model.

关键词： design languages Measurement Program transformation Java Object model

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Bidirectionalization transformation based on automatic derivation of view complement functions

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acm sigplan NOTICES 2007年第9期42卷 47-58页

作者： Matsuda, Kazutaka Hu, Zhenjiang Nakano, Keisuke Hamana, Makoto Takeichi, Masato Univ Tokyo Tokyo Japan Gunma Univ Gunma Japan

Bidirectional transformation is a pair of transformations: a view function and a backward transformation. A view function maps one data structure called source onto another called view. The corresponding backward transformation reflects changes in the view to the source. Its practically useful applications include replicated data synchronization, presentation-oriented editor development, tracing software development, and view updating in the database community. However, developing a bidirectional transformation is hard, because one has to give two mappings that satisfy the bidirectional properties for system consistency. In this paper, we propose a new framework for bidirectionalization that can automatically generate a useful backward transformation from a view function while guaranteeing that the two transformations satisfy the bidirectional properties. Our framework is based on two known approaches to bidirectionalization, namely the constant complement approach from the database community and the combinator approach from the programming language community, but it has three new features: ( 1) unlike the constant complement approach, it can deal with transformations between algebraic data structures rather than just tables;( 2) unlike the combinator approach, in which primitive bidirectional transformations have to be explicitly given, it can derive them automatically;( 3) it generates a view update checker to validate updates on views, which has not been well addressed so far. The new framework has been implemented and the experimental results show that our framework has promise.

关键词： languages design bidirectional transformation view updating program transformation automatic program generation program inversion

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Modeling usable & reusable transactors in SystemVerilog

Modeling usable & reusable transactors in SystemVerilog

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18th International conference on VLSI design: Power Aware design of VLSI Systems

作者： Bergeron, Janick Synopsys Synopsys's Verification Group

This paper describes how to properly use the object-oriented features of SystemVerilog to model transactions and transactors that execute them. designers, used to a procedural programming model, will learn how to approach a transactor modeling problem using the object-oriented approach. Software engineers, used to a traditional object-oriented programming model, will learn how to adapt their methods to the special requirements of constrained-random verification. This paper will present clear and concise guidelines that can be followed to create effective, easy-to-use and reusable transactor models. Summary: Transactors ? also known as bus-functional models ? have traditionally been modeled using a procedural interface (API). Commands were provided to use every feature available in the transactor. Several commands were often necessary to configure the transactor or to execute the simplest transaction. If the transactor did not provide a feature required by a particular device under test (DUT) or testcase, it had to be modified or rewritten. By using an object-oriented approach for configuration and interfacing, transactors can easily be used out-of-the-box. A few lines are all that is necessary to create valid random stimulus to a DUT or report observed response to a scoreboard. The use of callback methods eliminates the need for a complex and ever-evolving API. Instead of creating yet-another programming language, it leverages the power of SystemVerilog to extend the functionality of a transactor in ways the original author may not have conceived. Without modification, a ransactor can thus be used and reused effectively. Transactors can also be modeled in an extensible fashion. Extensible transactors allow users to define entirely new transactions and commands, should the ones provided by the original implementation prove insufficient. Usability and reusability of transactors does not happen by accident. With careful design and consistent use model, transactors can

关键词： Object oriented programming

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Analyzing the Performance of Code-copying Virtual Machines

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acm sigplan NOTICES 2008年第10期43卷 403-422页

作者： Prokopski, Gregory B. Verbrugge, Clark McGill Univ Sch Comp Sci Montreal PQ H3A 2T5 Canada

Many popular programming languages use interpreter-based execution for portability, supporting dynamic or reflective properties, and ease of implementation. Code-copying is an optimization technique for interpreters that reduces the performance gap between interpretation and JIT compilation, offering significant speedups over direct-threading interpretation. Due to varying language features and virtual machine design, however, not all languages benefit from codecopying to the same extent. We consider here properties of interpreted languages, and in particular bytecode and virtual machine construction that enhance or reduce the impact of code-copying. We implemented code-copying and compared performance with the original direct-threading virtual machines for three languages, Java (SableVM), OCaml, and Ruby (Yarv), examining performance on three different architectures, ia32 (Pentium 4), x86_64 (AMD64) and PowerPC (G5). Best speedups are achieved on ia32 by OCaml (maximum 4.88 times, 2.81 times on average), where a small and simple bytecode design facilitates improvements to branch prediction brought by code-copying. Yarv only slightly improves over direct-threading;large working sizes of bytecodes, and a relatively small fraction of time spent in the actual interpreter loop both limit the application of codecopying and its overall net effect. We are able to show that simple ahead of time analysis of VM and execution properties can help determine the suitability of code-copying for a particular VM before an implementation of code-copying is even attempted.

关键词： Performance design languages virtual machines compiler optimization code-copying branch prediction performance dynamic analysis

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A formal enforcement framework for role-based access control using aspect-oriented programming 05

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8th International conference on Model Driven Engineering languages and Systems

作者： Pavlich-Mariscal, J Michel, L Demurjian, S Univ Connecticut Dept Comp Sci & Engn U2155 Storrs CT 06269 USA

ISBN: (纸本)3540290109

Many of today's software applications require a high-level of security, defined by a detailed policy and attained via mechanisms such as role-based access control (RBAC), mandatory access control, digital signatures, etc. The integration of the design/implementation processes of access-control policies with runtime enforcement mechanisms is crucial to achieve an acceptable level of security for a software application. Our prior research focused on formalizing the concept of a role slice, which is a unified modeling language (UML) artifact that captures RBAC security requirements by defining permissions in the form of allowable or prohibited methods, and by specifying roles as specialized class diagrams that contain those methods. This paper augments this effort by introducing a formal framework for the security of software applications that supports the automatic translation of a role-slice access-control policy (RBAC requirements) into aspect-oriented programming (AOP) enforcement code that is seamlessly integrated with the application. The formal framework provides the necessary underpinnings to automate the integration of security policies into software. A prototyping effort based on Borland's UML tool Together Control Center for defining role-slice diagrams and the associated AOP code generator is under development.

关键词： Object oriented programming

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Development of object oriented frameworks for spatio-temporal information systems 99

Development of object oriented frameworks for spatio-tempora...

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Proceedings of the 21st international conference on Software engineering

作者： Anita Jacob Nansen Environmental and Remote Sensing Center Edvard Griegs Vei 3A 5059 Bergen Norway

No abstract available.

ISBN: (纸本)9781581130744

No abstract available.

关键词： design patterns

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