It is not uncommon for remote sensing systems to produce in excess of 100 Mbytes/sec. Los Alamos National Laboratory designed a reconfigurable computer to tackle the signal and image processing challenges of high band...
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It is not uncommon for remote sensing systems to produce in excess of 100 Mbytes/sec. Los Alamos National Laboratory designed a reconfigurable computer to tackle the signal and image processing challenges of high bandwidth sensors. Reconfigurable computing, based on field programmable gate arrays, offers ten to one hundred times the performance of traditional microprocessors for certain algorithms. This paper discusses the architecture of the computer and the source of performance gains, as well as an example application. The calculation of multiple matched filters applied to multispectral imagery, showing a performance advantage of forty-five over Pentium ii (450 MHz), is presented as an exemplar of algorithms appropriate for this technology.
The idea is (i) to use a variable energy allocation per signaling symbol and (ii) to pseudorandomize the order in which signaling symbols are transmitted. This strategy will allow the most important part of the sensor...
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The idea is (i) to use a variable energy allocation per signaling symbol and (ii) to pseudorandomize the order in which signaling symbols are transmitted. This strategy will allow the most important part of the sensor data to be (i) decorrelated against periodic unequal power interfering noise and specifically (ii) where that noise is purposely tailored or allocated in an attempt to provide maximum disruption of information transport as in 'smart' jamming. In a very real sense, perfect compression followed by this method leads to a genre of spread spectrum known as Time Hopping (TH).
Investigating a number of different integral transforms uncovers distinct patterns in the type of scale-based convolution theorems afforded by each. It is shown that scaling convolutions behave in quite a similar fash...
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Investigating a number of different integral transforms uncovers distinct patterns in the type of scale-based convolution theorems afforded by each. It is shown that scaling convolutions behave in quite a similar fashion to translational convolution in the transform domain, such that the many diverse transforms have only a few different forms for convolution theorems. The hypothesis is put forth that the space of integral transforms is partitionable based on these forms.
Scheduling and retiming are important techniques used in the design of hardware and software implementations of digital signalprocessingalgorithms. In this paper, techniques are developed for generating all scheduli...
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Scheduling and retiming are important techniques used in the design of hardware and software implementations of digital signalprocessingalgorithms. In this paper, techniques are developed for generating all scheduling and retiming solutions for a strongly connected data-flow graph, allowing a designer to explore the space of possible implementations. Formulations are developed for two scheduling problems. The first scheduling problem assumes a bit-parallel target architecture. The formulation for this problem is general because it considers retiming the dataflow graph as part of scheduling, and this formulation reduces to the retiming formulation as a special case. The second scheduling problem assumes a bit-serial target architecture. Based on these formulations, the conditions for a legal scheduling solution are derived, and a systematic technique is presented for exhaustively generating all legal scheduling solutions for a strongly connected data-flow graph. Since retiming is a special case of scheduling, this systematic technique can also be used for exhaustively generating all legal retiming solutions. A technique is also developed for exhaustively generating only those bit-parallel schedules which satisfy a given set of resource constraints, The techniques for exhaustively generating scheduling and retiming solutions are demonstrated for several filters. For example, we show that a simple filter such as the biquad has 224 possible retiming solutions for a latency of one time unit. We also show that a fifth-order wave digital elliptic filter has 4.7 million and 580 million scheduling solutions for iteration periods of 17 and 18, respectively.
This brief presents efficient single-rate architectures for the one-dimensional orthonormal discrete wavelet transform (DWT). This brief makes two contributions, First, we show that architectures that are based on the...
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This brief presents efficient single-rate architectures for the one-dimensional orthonormal discrete wavelet transform (DWT). This brief makes two contributions, First, we show that architectures that are based on the quadrature mirror filter (QMF) lattice structure require approximately half the number of multipliers and adders than corresponding direct-form structures. Second, we present techniques for mapping the 1-D orthonormal DWT to folded and digit-serial architectures which are based on the QMF lattice structure. For folded architectures, we discuss two techniques for mapping the QMF lattice structure to hardware. For digit-serial architectures, we show that any two-channel subband system can be implemented using digit-serial processing techniques by utilizing the polyphase decomposition Using this result, we describe an orthonormal DWT architecture which uses the QMF lattice structure and digit-serial processing techniques, The proposed folded and digit-serial QMF lattice structures are attractive choices for implementations of the orthonormal DWT which require low area and low power dissipation.
Digital signal Processors (DSPs) have become key components for the implementation of digital signalprocessing systems. With DSPs moving into new application domains and the increasing complexity of modern DSP archit...
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ISBN:
(纸本)0818679204
Digital signal Processors (DSPs) have become key components for the implementation of digital signalprocessing systems. With DSPs moving into new application domains and the increasing complexity of modern DSP architectures, efficient programming support receives major interest. Therefore, an optimizing compiler becomes a must for future DSP-architectures. Todays DSP compilers result in significant overheads both in memory consumption and program execution time compared to hand-written assembly code. This is mainly due to an inefficient compiler support of the DSP specific architectural features, such as the modulo-addressing capability which is an enabling feature for a large class of DSP algorithms. Within this paper we analyze why existing compilers fail short in supporting the module-addressing mode and present a compiler concept that allows the efficient utilization of this feature. We describe how an advanced compiler optimization strategy allows a near optimum support of the module-addressing mode, and point out why this concept is favorable to DSP-specific language extensions.
A hypothesis H is parametric if every distribution from the process defined by H belongs to a family of distributions characterized by a finite number of parameters; on the other hand, if the distribution can not be d...
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ISBN:
(纸本)0819422347
A hypothesis H is parametric if every distribution from the process defined by H belongs to a family of distributions characterized by a finite number of parameters; on the other hand, if the distribution can not be defined by a finite number of parameters, the hypothesis is nonparametric. In this paper, we analyze a detector based on the optimum permutation test, applied to nonparametric radar detection which provide good performances without a large computational work, and we compare it with the parametric test and rank test in the Neyman-Pearson sense. The computational complexity of the detector is high and its implementation in real time is difficult, due to the number of operations increase with the factorial of the number of samples. Also, we present an algorithm that reduces the computational work required. We also present the detectability characteristic of the optimum permutation test against rank test and parametric test under Gaussian noise environments and different types of target models (nonfluctuating, Swerling I and Swerling ii). The detection probability versus signal-to-noise ratio is estimated by Monte-Carlo simulations for different parameter values (N pulse, M reference samples and false alarm probability Pfa).
The Volume contains 44 Conference papers. The topic covered include Toeplitz matrices, time-frequency distribution and nonstationary signals, bit-level systolic arrays and computer arithmetic, radar signalprocessing,...
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ISBN:
(纸本)0819406945
The Volume contains 44 Conference papers. The topic covered include Toeplitz matrices, time-frequency distribution and nonstationary signals, bit-level systolic arrays and computer arithmetic, radar signalprocessing, signal estimation, array processing and beamforming.
In this paper we describe aspects of an ongoing program of work aimed at the practical realization of systolic array structures to implement digital adaptive beam-forming algorithms.
ISBN:
(纸本)0819406945
In this paper we describe aspects of an ongoing program of work aimed at the practical realization of systolic array structures to implement digital adaptive beam-forming algorithms.
A new derivation of the QR-based fast recursive least squares algorithms for Toeplitz matrices is presented. algorithms for computing Q and R in the QR decomposition of the data matrix are proposed. These algorithms c...
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ISBN:
(纸本)0819406945
A new derivation of the QR-based fast recursive least squares algorithms for Toeplitz matrices is presented. algorithms for computing Q and R in the QR decomposition of the data matrix are proposed. These algorithms can be efficiently incorporated with the fast recursive least squares algorithm and can be performed only when they are needed.
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