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Redundant arithmetic, algorithms and implementations

INTEGRATION-THE vLSI JOURNAL 2000年第1期30卷 13-53页

作者： González, AF Mazumder, P Univ Michigan Dept Elect Engn & Comp Sci Ann Arbor MI 48109 USA

Performance in many very-large-scale-integrated (vLSI) systems such as digital signal processing (DSP) chips, is predominantly determined by the speed of arithmetic modules like adders and multipliers. Even though redundant arithmetic algorithms produce significant improvements in performance through the elimination of carry propagation, efficient circuit implementations of these algorithms have been traditionally difficult to obtain. This work presents a survey of circuit implementations of redundant arithmetic algorithms. The described implementations are divided into three main groups: (1) conventional binary logic circuits, which encode the multivalued digits of redundant arithmetic into two or more binary digital signals;(2) current-mode multiple-valued logic circuits, which directly represent multivalued redundant digits using non-binary digital current signals;and (3) heterostructure and quantum electronic circuits. intended for very compact designs capable of operating at extremely high speeds. For each of the circuits, the operating principle is described and the main advantages and disadvantages of the approach are discussed and compared. (C) 2000 Published by Elsevier Science B.v.

关键词： redundant number systems redundant binary logic current-mode logic multiple-valued logic quantum electronic circuits

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Discrete time processing of linear scale invariant signals and systems

Discrete time processing of linear scale invariant signals a...

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Conference on advanced signal processing algorithms, architectures, and implementations X

作者： Izzetoglu, M Onaral, B Chitrapu, P Bilgutay, N Drexel Univ Dept Elect & Comp Engn Philadelphia PA 19104 USA

ISBN: (纸本)0819437611

In this paper, we formulate a framework for discrete-time processing of Linear Scale Invariant (LSI) systems which are invariant to scale changes in time. Continuous-time LSI systems can be processed by Mellin and Modified Scale Transforms analogous to the use of the Laplace and Fourier Transforms in the continuous-time processing of LTI systems. In this work, we present the geometric sampling theorem to prevent aliasing in the scale domain. We also derive the perfect reconstruction filter in time domain, the discrete-time convolution sum, the Discrete Time Modified Scale Transform (DTMST) and the Discrete Modified Scale Transform (DMST) for geometrically sampled signals.

关键词： Transform theory Fourier transforms Convolution Electronic filtering signal processing Statistical analysis Toxic industrial chemicals Biomedical optics Computing systems Telecommunications

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Novel volterra predictor based on state-space equilibrium of nonlinear single- or multi-fractal signals

Novel volterra predictor based on state-space equilibrium of...

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Conference on advanced signal processing algorithms, architectures, and implementations X

作者： Sabry-Rizk, M Zgallai, W City Univ London Dept Elect Elect & Informat Engn London EC1V 0HB England

ISBN: (纸本)0819437611

It has been quite common in the analysis of single- or multi-fractal signals originating from complex nonlinear systems to make a time-delayed construction of the state space attractor in which the dynamics can be qualitatively viewed. This involves the calculations of the embedding dimension and an appropriate time delay based on the signal nonlinear correlation behavioral pattern. This is usually followed by a sub-optimal short-term linear prediction in the signal time/subspace domain instead of the optimal nonlinear prediction in the time/frequency domain. In this paper, we propose to alleviate the sub-optimality problem and exploit the nonlinear signal dynamics embedded in the attractor and integrate them in the design of a new family of temporal multiple-step volterra predictors. Essentially, this is done by including relevant past information preserved in the signal up to a time t(d) = the embedded dimension X embedded time delay, and sampled at instances coincident with the embedded time delays, to predict one-step ahead adaptively, using the LMS criteria. The results obtained using several nonlinear (chaotic or non-chaotic) synthetic and measured biomedical signals and performing the novel quadratic- and cubic-volterra predictions show superior MSE performance, of as much as 30 dB, over those obtained using an optimized conventional one-step volterra predictor of the same order, particularly in the case of electrocardiogram signals. This is not achieved at the expense of any increase in the CPU time as the algorithm is designed to cater for new parallel volterra structures, with progressive delayed inputs.

关键词： state-space attractor nonlinear correlation multiple-step nonlinear quadratic- and cubic-volterra predictions

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Rijndael FPGA implementations utilising look-up tables

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Journal of vLSI signal processing Systems for signal, Image, and video Technology 2003年第3期34卷 261-275页

作者： McLoone, Máire McCanny, John v. DSiPtrade Laboratories Sch. of Elec. and Electronic Eng. Queen's University of Belfast Belfast United Kingdom

This paper presents single-chip FPGA Rijndael algorithm implementations of the advanced Encryption Standard (AES) algorithm, Rijndael. In particular, the designs utilise look-up tables to implement the entire Rijndael Round function. A comparison is provided between these designs and similar existing implementations. Hardware implementations of encryption algorithms prove much faster than equivalent software implementations and since there is a need to perform encryption on data in real time, speed is very important. In particular, Field Programmable Gate Arrays (FPGAs) are well suited to encryption implementations due to their flexibility and an architecture, which can be exploited to accommodate typical encryption transformations. In this paper, a Look-Up Table (LUT) methodology is introduced where complex and slow operations are replaced by simple LUTs. A LUT-based fully pipelined Rijndael implementation is described which has a pre-placement performance of 12 Gbits/sec, which is a factor 1.2 times faster than an alternative design in which look-up tables are utilised to implement only one of the Round function transformations, and 6 times faster than other previous single-chip implementations. Iterative Rijndael implementations based on the Look-Up-Table design approach are also discussed and prove faster than typical iterative implementations.

关键词： algorithms

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Architecture of a complex arithmetic processor for communication signal processing

Architecture of a complex arithmetic processor for communica...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Gilfeather, Susan L. Gehman Jr., John B. Harrison, Calvin Motorola Government and Systems Technology Group Scottsdale AZ USA

ISBN: (纸本)0819416207

The Complex Arithmetic Processor (CAP) is a high performance, single chip Digital signal Processor optimized for communication signal processing operations. The CAP vLSI provides the communication system building block necessary to meet the increased signal processing requirements of complex modulation types, voice and image compression while maintaining the requirement for small, low power implementations. The chip is intended for high speed, low power digital communication system applications such as hand held spread spectrum communications systems. The CAP architecture has been developed specifically for the complex arithmetic functions required in communication signal processing. The CAP is a software programmable, highly integrated parallel array of processors containing the arithmetic resources, memories, address generation, bit manipulation and logic functions necessary to support the sophisticated processing required in advanced communication equipment. The CAP executes a 1024 point complex Fast Fourier Transform in 131 microseconds.

关键词： Digital integrated circuits

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ADAPTIvE LATTICE FILTER implementations ON PIPELINED MULTIPROCESSOR architectures.

ADAPTIVE LATTICE FILTER IMPLEMENTATIONS ON PIPELINED MULTIPR...

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ICASSP '88: 1988 International Conference on Acoustics, Speech, and signal processing. v 1, Speech processing;v 2, Multidimensional signal processing;v 3, Digital signal processing;v 4, vLSI Spectral Estimation;v 5, Audio & Electroacoustics

作者： Meyer, Martin D. Agrawal, Dharma P. North Carolina State Univ Raleigh NC USA North Carolina State Univ Raleigh NC USA

Three pipelined multiprocessor implmentations of adaptive lattice filters are examined. The three multiprocessor architectures, which can be characterized as a serial pipeline, a ladder-connected dual pipeline, and a ring pipeline, are derived directly from the computational and data-transfer requirements of adaptive lattice algorithms. The order-recursive nature of the adaptive lattice structure results in architectures which use pipelining extensively. A performance analysis is done for each multiprocessor system, with respect to two different adaptive lattice algorithms. Expressions for approximate computations time and speedup are derived for each combination of architecture and algorithm.

关键词： signal FILTERING AND PREDICTION

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CORDIC processor architectures

CORDIC processor architectures

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advanced signal processing algorithms, architectures, and implementations II

作者： Boehme, Johann F. Timmermann, D. Hahn, H. Hosticka, Bedrich J. Ruhr Univ. Bochum Bochum Federal Republic of Germany

ISBN: (纸本)0819406945

As CORDIC algorithms receive more and more attention in elementary function evaluation and signal processing applications, the problem of their vLSI realization has attracted considerable interest. In this work we review the CORDIC fundamentals covering algorithm, architecture, and implementation issues. various aspects of the CORDIC algorithm are investigated such as efficient scale factor compensation, redundant and non-redundant addition schemes, and convergence domain. Several CORDIC processor architectures and implementation examples are discussed.

关键词： signal processing

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Regression in sensor networks: Training distributively with alternating projections

Regression in sensor networks: Training distributively with ...

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advanced signal processing algorithms, architectures, and implementations Xv

作者： Predd, Joel B. Kulkarni, Sanjeev R. vincent Poor, H. Department of Electrical Engineering Princeton University Princeton NJ United States

Wireless sensor networks (WSNs) have attracted considerable attention in recent years and motivate a host of new challenges for distributed signal processing. The problem of distributed or decentralized estimation has often been considered in the context of parametric models. However, the success of parametric methods is limited by the appropriateness of the strong statistical assumptions made by the models. In this paper, a more flexible nonparametric model for distributed regression is considered that is applicable in a variety of WSN applications including field estimation. Here, starting with the standard regularized kernel least-squares estimator, a message-passing algorithm for distributed estimation in WSNs is derived. The algorithm can be viewed as an instantiation of the successive orthogonal projection (SOP) algorithm. various practical aspects of the algorithm are discussed and several numerical simulations validate the potential of the approach.

关键词： signal processing

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Non-linear signal processing using index calculus DBNS arithmetic

Non-linear signal processing using index calculus DBNS arith...

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Conference on advanced signal processing algorithms, architectures, and implementations X

作者： Muscedere, R Jullien, GA Dimitrov, vS Miller, WC Univ Windsor VLSI Res Grp Windsor ON N9B 3P4 Canada

ISBN: (纸本)0819437611

This paper discusses the use of a recently introduced index calculus Double-Base Number System (IDBNS) for representing and processing numbers for non-linear digital signal processing;the target application is a digital hearing aid processor. The IDBNS representation uses 2 orthogonal bases (2 and 3) to represent real numbers with arbitrary precision. By restricting the number of digits to one or two, it is possible to efficiently represent the real number using the indices of the bases rather than the distribution of the digits. In this paper we discuss the use of the two-digit form of this representation (2-IDBNS) to efficiently perform arithmetic associated with the non-linear processing required to correct the usual forms of hearing loss in a digital hearing aid. The non-linear processing takes the form of dynamic range compression as a function of frequency band. Currently developed digital hearing instrument processors require large dynamic range representations (20-24 bits) in order to accurately generate the dynamic range compression associated with typical hearing loss. We show that the natural non-linear representation afforded by the IDBNS provides both a more efficient signal representation and a more efficient technique for processing the dynamic range compression. We pay particular attention to a novel technique of converting from a linear binary input directly to the 2-IDBNS representation using an observation of partial cyclic repetition in the indices along with near unity approximants.

关键词： computer arithmetic non-linear number representation double-base number system hearing loss

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Color characterization for image indexing and machine vision

Color characterization for image indexing and machine vision

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Conference on advanced signal processing algorithms, architectures, and implementations X

作者： Lin, SM Nair, D Natl Instruments Austin TX 78759 USA

ISBN: (纸本)0819437611

Color representation and comparison based on the histogram has proved to be very efficient for image indexing in content-based image retrieval and machine vision applications. However, the issues of color constancy and accurate color similarity measures remain unsolved. This paper presents a new algorithm for intensity-insensitive color characterization for image retrieval and machine vision applications. The color characterization algorithm divides the HSI (hue, saturation and intensity) color space into a given number of bins in such a way that the color characterization represents all the colors in the hue/saturation plane as well as black, white and gray colors. The color distribution in these bins of the HSI space is represented in the form of a one-dimensional vector called Color Spectrum vector (CSv). The color information that is stored in the CSv is insensitive to changes in the luminance. A weighted version of CSv called WCSv is introduced to take the similarity of the neighboring bins into account A Fuzzy Color Spectrum vector (FCSv) color representation vector that takes into account the human uncertainty in color classification process is also introduced here. The accuracy and speed of the algorithm is demonstrated in this paper through a series of experiments on image indexing and machine vision applications.

关键词： color comparison pattern matching clustering algorithm fuzzy set theory image indexing machine vision image processing

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