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Conference on advanced signal processing - algorithms, architectures, and implementations vII

作者： Brovko, TTN Whang, YE Hughes Aircraft Co. (United States)

ISBN: (纸本)0819425842

The primary basis for adaptive radar algorithm design is that (1) a Binary Hypothesis formulation with unknown parameters is an adequate test and (2) that radar interference is composed of combinations of thermal noise, self induced clutter, and extraneous noise. This is the typical generalized likelihood formulation that yield the CFAR characteristic for the assumed conditions. implementations have shown that such formulations yield inadequate performance in complex clutter environments. As compensation measure, a secondary CFAR process then addresses the potential violation of this assumption by large ''target-like'' interference such as large Clutter discretes or a large number of targets interfering with each other. In order to detect small targets, an approach based on the Likelihood Statistic provides a technique for optimally suppressing the neighboring large signals. Performance is characterized as a function of a generalized distance and relative signal power ratios in the Joint Space-Time domain.

关键词： Target detection signal detection Doppler effect Distortion Radar Modulation Electronic filtering signal processing Interference (communication) signal to noise ratio

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An algorithm for weighted least squares positive time-frequency distributions

An algorithm for weighted least squares positive time-freque...

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Conference on advanced signal processing - algorithms, architectures, and implementations vII

作者： Pitton, JW MathSoft Seattle WA 98109 1700 Westlake Ave N United States

ISBN: (纸本)0819425842

An algorithm for computing positive time-frequency distributions (TFDs) for nonstationary signals is presented. This work extends the earlier work of the author and his colleagues in computing positive TFDs [11, 15]. A general approach to the problem of computing these signal-dependent distributions is derived. The method is based on an evolutionary spectrum formulation of positive TFDs. Following earlier work [15], a relationship is derived between positive TFDs and the ambiguity function of the observed signal. In particular, it is shown that the TFD is approximately equal to the two-dimensional Fourier transform of the ambiguity function. A method for computing the positive TFD is then presented based on minimizing the squared error in this approximation subject to the TFD being positive and satisfying the time and frequency marginals. The squared error may be weighted non-uniformly, resulting in a constrained weighted least-squares optimization problem. A solution to this optimization problem based on an alternating projections framework is presented, and an example is provided. The resulting TFD provides excellent time-frequency resolution while maintaining positivity and satisfying the marginals.

关键词： signal processing time-frequency analysis time-varying signals optimization alternating projections

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Optimum microphone placement for array sound capture

Optimum microphone placement for array sound capture

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Conference on advanced signal processing - algorithms, architectures, and implementations vII

作者： Rabinkin, Dv Renomeron, RJ French, JC Flanagan, JL Rutgers Univ. (United States)

ISBN: (纸本)0819425842

Microphone arrays can be used for high-quality sound pick up in reverberant and noisy environments. The beamforming capabilities of microphone array systems allow highly directional sound capture, providing superior signal-to-noise ratio (SNR) when compared to single microphone performance. There are two aspects in microphone array system performance: The ability of the system to locate and track sound sources, and its ability to selectively capture sound from those sources. Both aspects of system performance are strongly affected by the spatial placement of microphone sensors. A method is needed to optimize sensor placement based on geometry of the environment and assumed sound source behavior. The objective of the optimization is to obtain the greatest average system SNR using a specified number of sensors. A method is derived to evaluate array performance for a given array configuration defined by the above mentioned metrics. An overall performance function is described based on these metrics. A framework for optimum placement of sensors under the practical considerations of possible sensor placement and potential location of sound sources is also characterized.

关键词： signal to noise ratio Sensors Error analysis Interference (communication) Acoustics Monte Carlo methods signal attenuation Statistical analysis Environmental sensing signal processing

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Progressive image decoding based on the inverse discrete cosine transform

Progressive image decoding based on the inverse discrete cos...

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Conference on advanced signal processing - algorithms, architectures, and implementations vII

作者： Winograd, JM Nawab, SH Boston Univ. (United States)

ISBN: (纸本)0819425842

A new architecture is presented for incremental computation of the two-dimensional inverse discrete cosine transform (2D-IDCT) in the context of progressive image decoding. This architecture offers advantages over existing DCT inversion techniques for systems used in conjunction with progressive image coding schemes or those that must operate in environments with severe and/or time-varying resource constraints (e.g. real-time and low-power systems). The use of a bit-serial distributed arithmetic approach comprised of parallel input-pruned 2D-IDCT processing elements enables low-quality image reconstructions to be quickly and efficiently obtained using only a subset of the DCT coefficient bit stream. Initial approximate reconstructions can be improved in subsequent stages of incremental refinement according to the availability of processing resources or DCT coefficient data. Analysis is presented of image degradation at successive stages, illustrating uniform improvement according to quantitative and perceptual criteria.

关键词： progressive image decoding discrete cosine transform incremental refinement approximate processing

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Optimizing time-frequency distributions for automatic classification

Optimizing time-frequency distributions for automatic classi...

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Conference on advanced signal processing - algorithms, architectures, and implementations vII

作者： Atlas, L Droppo, J McLaughlin, J Univ. of Washington (United States) MIT Lincoln Lab. (United States)

ISBN: (纸本)0819425842

An entirely new set of criteria for the design of kernels (generating functions) for time-frequency representations (TFRs) is presented. These criteria aim only to produce kernels (and thus, TFRs) which will enable more accurate classification. We refer to these kernels, which are optimized to discriminate among several classes of signals, as signal class dependent kernels, or simply class dependent kernels. The genesis of the class dependent kernel is to be found in the area of operator theory, which we use to establish a direct link between a discrete-time, discrete-frequency TFR and its corresponding discrete signal. We see that many similarities, but also some important differences, exist between the results of the continuous-time operator approach and our discrete one. The differences between the continuous representations and discrete ones may not be the simple sampling relationship which has often been assumed. From this work, we obtain a very concise, matrix-based expression for a discrete-time/discrete-frequency TFR which is simply the product of the kernel with another matrix. This simple expression opens up the possibility to optimize the kernel in a number of ways. We focus, of course, on optimizations most suitable for classification, and ultimately wind up with the class dependent kernel. When applied to simulated sonar transient signals, we find that our approach does a good job of discriminating within very similar classes of transients and is especially sensitive to differences in time variation across classes.

关键词： Time-frequency analysis Matrices Fourier transforms Convolution Detection theory Distance measurement signal generators signal processing Silicon Stochastic processes

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Modulo-addressing utilization in automatic software synthesis for digital signal processors

Modulo-addressing utilization in automatic software synthesi...

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1997 IEEE International Conference on Acoustics, Speech, and signal processing (ICASSP 97)

作者： Willems, M Keding, H Zivojnovic, v Meyr, H Aachen Univ of Technology Aachen Germany

ISBN: (纸本)0818679204

Digital signal Processors (DSPs) have become key components for the implementation of digital signal processing systems. With DSPs moving into new application domains and the increasing complexity of modern DSP architectures, efficient programming support receives major interest. Therefore, an optimizing compiler becomes a must for future DSP-architectures. Todays DSP compilers result in significant overheads both in memory consumption and program execution time compared to hand-written assembly code. This is mainly due to an inefficient compiler support of the DSP specific architectural features, such as the modulo-addressing capability which is an enabling feature for a large class of DSP algorithms. Within this paper we analyze why existing compilers fail short in supporting the module-addressing mode and present a compiler concept that allows the efficient utilization of this feature. We describe how an advanced compiler optimization strategy allows a near optimum support of the module-addressing mode, and point out why this concept is favorable to DSP-specific language extensions.

关键词： Program compilers

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A generic approach to parallelizing and developing control algorithms for heterogeneous architectures

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INTERNATIONAL JOURNAL OF ADAPTIvE CONTROL AND signal processing 1997年第5期11卷 443-460页

作者： Baxter, MJ Tokhi, MO Fleming, PJ Dept. of Automat. Ctrl. Engineering University of Sheffield Sheffield United Kingdom

System developers have found that exploiting parallel architectures for control systems is challenging and often the resulting implementations do not provide the expected performance advantages over traditional uniprocessor solutions. This paper presents a generic method and a suite of design tools for the implementation of control algorithms on parallel architectures. These tools allow a developer to translate a control system algorithm into efficient executable code, via a highly automated route, for a class of advanced parallel architectures. The tools are demonstrated and discussed by developing several case-study algorithms to full implementations with an emphasis on the problematic areas leading to performance degradation common to parallel systems.

关键词： heterogeneous architectures parallel processing computer-aided control system design and real-time computer systems

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System level fixed-point design based on an interpolative approach 97

System level fixed-point design based on an interpolative ap...

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34th Design Automation Conference

作者： Willems, M Bursgens, v Keding, H Grotker, T Meyr, H Institute for Integrated Systems in Signal Processing Aachen University of Technology Templergraben 55 52056-Aachen Germany

ISBN: (纸本)0897919203

The design process for fixed-point implementations either in software or in hardware requires a bit-true specification of the algorithm in order to analyze quantization effects on an algorithmical level, abstracting from implementational details. On the other hand, system design starts from a floating-point description, so that a transformation of a floating-point description into a fixed-point description becomes necessary. Within this paper we present a tool that allows an automated, interactive transformation from floating-point ANSI-C into a bit-true specification based on a new data type fixed that is introduced as an extension to ANSI-C. The concept is rooted in a sophisticated data dependency analysis that allows to handle control structures as well as pointers. It is part of the fixed-point design environment FRIDGE (1) which includes an advanced simulator that covers the extended ANSI-C syntax as well as target specific compilers which allow to generate efficient fixed-point implementations either for HW or for SW, starting from the bit-true algorithm specification.

关键词： algorithms

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Modulo-addressing utilization in automatic software synthesis for digital signal processors

Modulo-addressing utilization in automatic software synthesi...

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International Conference on Acoustics, Speech, and signal processing (ICASSP)

作者： M. Willems H. Keding v. Zivojnovic H. Meyr Inst. for Integrated Syst. in Signal Process. Aachen Univ. of Technol. Germany Institute for Integrated Systems in Signal Processing RWTH Aachen University of Technology Aachen Germany

Digital signal Processors (DSPs) have become key components for the implementation of digital signal processing systems. With DSPs moving into new application domains and the increasing complexity of modern DSP architectures, efficient programming support receives major interest. Therefore, an optimizing compiler becomes a must for future DSP-architectures. Todays DSP compilers result in significant overheads both in memory consumption and program execution time compared to hand-written assembly code. This is mainly due to an inefficient compiler support of the DSP specific architectural features, such as the modulo-addressing capability which is an enabling feature for a large class of DSP algorithms. Within this paper we analyze why existing compilers fail short in supporting the modulo-addressing mode and present a compiler concept that allows the efficient utilization of this feature. We describe how an advanced compiler optimization strategy allows a near optimum support of the modulo-addressing mode, and point out why this concept is favorable to DSP-specific language extensions.

关键词： Digital signal processing Optimizing compilers signal synthesis Digital signal processors Application software Computer architecture Program processors Assembly signal processing algorithms Failure analysis

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A low power based partitioning and binding technique for single chip application specific DSP architectures

A low power based partitioning and binding technique for sin...

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IEEE International Conference on Innovative Systems in Silicon

作者： R.v. Cherabuddi M.A. Bayoumi The Center for Advanced Computer Studies University of Southwestern Louisiana Lafayette LA USA

In this paper, we present a low power targeted high-level synthesis framework for the synthesis of single chip Application Specific DSP (Digital signal processing) architectures. This new framework is based on minimizing the switching activity on the functional units as well as the global buses. The main focus of the developed method is minimizing the power during partitioning and binding phases of high-level synthesis. A Stochastic Evolution based technique has been used for partitioning the given data flow graph describing the DSP algorithm. Experimental results were highly encouraging with power reduction of up to 60% on certain benchmark designs.

关键词： Digital signal processing chips High level synthesis signal synthesis Partitioning algorithms variable speed drives Communication switching Data flow computing Application software Computer architecture Minimization

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