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检索条件"任意字段=Advanced Signal Processing: Algorithms, Architectures, and Implementations V"

共 470 条记录，以下是311-320 订阅

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Regularization approach for signal extrapolation with wavelets

Regularization approach for signal extrapolation with wavele...

引用

advanced signal processing: algorithms, architectures, and implementations v

作者： Lin, Li-Chien Kuo, C.-C.J. Univ. of Southern California Taichung Taiwan

ISBN: (纸本)0819416207

We propose a scale-limited signal model based on wavelet representation and study the reconstructability of scale-limited signals via extrapolation in this research. In analogy with the band-limited case, we define a scale-limited time-concentrated operator, and examine various vector spaces associated with such an operator. It is proved that the scale-limited signal space can be decomposed into the direct sum of two subspaces and only the component in one subspace can be exactly reconstructed, where the reconstructable subspace can be interpreted as a space consisting of scale/time-limited signals. Due to the ill-posedness of scale-limited extrapolation, a regularization process is introduced for noisy data extrapolation.

关键词： signal processing

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Direction-of-arrival estimation in unknown correlated noise using MUSIC and higher order statistics

Direction-of-arrival estimation in unknown correlated noise ...

引用

advanced signal processing: algorithms, architectures, and implementations v

作者： Hung, Hsien-Sen Chen, Keshi Iowa State Univ. Ames IA USA

ISBN: (纸本)0819416207

In this paper we consider the direction-of-arrival (DOA) estimation of Gaussian signals in non- Gaussian noise of unknown spatial correlations. The proposed method involves two primary steps. Firstly, the third-order cumulant function of the random wavefield received by an array of sensors is estimated and then projected onto the correlation domain to exploit the correlations of noise across the sensors in an array. Secondly, the estimated noise correlation matrix is then utilized in a correlation-based eigenstructure method, such as MUSIC, for DOA estimation. As expected, the proposed method improves the performance of MUSIC which requires the knowledge of noise correlation. Numerical simulation results for both the MUSIC and proposed algorithms are presented and compared.

关键词： signal processing

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Highly scalable hardware accelerator for digital signal processing

Highly scalable hardware accelerator for digital signal proc...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Chi, Chi-Hung Lau, Siu-Chung Chinese Univ. of Hong Kong Shatin NT Hong Kong

ISBN: (纸本)0819416207

In this paper, a highly scalable hardware accelerator design for digital signal processing is presented. The key features of this accelerator are minimum I/O operations, highly scalable massive parallelism, easy programming, and modularity and regularity. With a very large register file (> 1000) per processing element, the reuse factor per datum in this accelerator can be increased significantly (as compared to traditional DSP architectures). System performance is improved because the amount of data transfer between the on-chip cache and the off-chip cache/memory is reduced by the same factor. Since the basic building block of this accelerator is simply a vLSI chip with several processing elements, scalable massive parallelism can be achieved by connecting multiple chips together in a SIMD `vector- like' fashion. Finally, programming of this accelerometer is not difficult because it is operated under the SIMD `vector-like' mode. With the expected vLSI technology in the next few years, the throughput of one single accelerator chip can approach GFLOPs performance. Hence, the high computing power needed by digital signal processing applications can be provided by just connecting a small number of this chip together.

关键词： Computer hardware

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Fast computation of critically sampled time frequency signal representations

Fast computation of critically sampled time frequency signal...

引用

advanced signal processing: algorithms, architectures, and implementations v

作者： Marinovich, Nenad M. CUNY/City Coll. and Graduate Sch. New York NY USA

ISBN: (纸本)0819416207

An algorithm is proposed to compute samples of any bilinear joint time-frequency representation of the Cohen's class. The computation is performed on a decimated sampling grid, mapping N = 3BD signal samples into N = K × L critical samples of the joint representation in the time-frequency domain. This is in contrast with the usual approaches that perform the computation on a much denser grid, mapping N signal samples into N × N samples in the time-frequency plane. The algorithm is based on the discrete Zak transform and represents an extension of the work by Auslander et al. on fast computation of the ambiguity function. For a number of popular representations, the algorithm is shown to have computational complexity about the same as an ordinary FFT.

关键词： signal processing

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Adaptive algorithms for bilinear filtering

Adaptive algorithms for bilinear filtering

引用

advanced signal processing: algorithms, architectures, and implementations v

作者： Mathews, v.John Lee, Junghsi Univ. of Utah Salt Lake City UT USA

ISBN: (纸本)0819416207

This paper presents an overview of adaptive nonlinear filters equipped with bilinear system models. Bilinear filters are recursive nonlinear systems that belong to the class of polynomial systems. Because of the feedback structure, such models are able to represent many nonlinear systems efficiently. The paper first describe stochastic gradient adaptive bilinear filters. The class of recursive least-squares adaptive bilinear filters are discussed next. Stability issues associated with bilinear system models and adaptive bilinear filters are also discussed in the paper. The paper concludes with an experimental comparison of the performance of linear, truncated second-order volterra, and bilinear system models in a nonlinear channel equalization problem.

关键词： Adaptive filtering

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Algorithm-based fault tolerance for noncomputationally intensive applications

Algorithm-based fault tolerance for noncomputationally inten...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Nair, v.S. venkatesan, S. Southern Methodist Univ. Dallas TX USA

ISBN: (纸本)0819416207

Algorithm-based fault tolerance (ABFT) has been proposed as a cost-effective approach to concurrent error detection. So far, the application of ABFT has been limited to computationally intensive applications that lend easily to high-level fault modeling. In this paper we extend the application of ABFT to non-computationally intensive applications. To that end, we first develop a fault model for such systems. Based on the fault model, we develop ABFT schemes for a set of graph theoretic as well as set theoretic problems. Application of the new schemes is illustrated with examples.

关键词： Fault tolerant computer systems

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Second- and higher-order cyclostationary processing using acousto-optics

Second- and higher-order cyclostationary processing using ac...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Sadler, Brian M. Army Research Lab. Adelphi MD USA

ISBN: (纸本)0819416207

In this paper we consider cyclostationary signal processing techniques implemented via acousto-optics (AO). Cyclic processing methods are reviewed and motivated, including the cyclic correlation and the cyclic spectrum. We show how a 1D AO spectrum analyzer can be used to detect the presence, and estimate the value, of cycle frequencies. The cyclic correlation can then be computed at cycle frequencies of interest using a 1D time-integrating correlator. Next we consider the problem of computing the (2D) cyclic correlation for all cycle frequencies and lags simultaneously. This is accomplished via an AO triple-product processor, configured in a manner similar to that used for ambiguity function generation. The cyclic spectrum can be obtained in a post-processing step by Fourier transforming the cyclic correlation in one dimension. We then consider higher order extensions of the cyclic correlation and show how a 2D slice of the 3D cyclic triple-correlation can be computed using an AO four-product processor.

关键词： signal processing

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Blind channel estimation and deconvolution in colored noise using higher-order cumulants

Blind channel estimation and deconvolution in colored noise ...

引用

advanced signal processing: algorithms, architectures, and implementations v

作者： Tugnait, Jitendra K. Gummadavelli, Uma Auburn Univ. Auburn AL USA

ISBN: (纸本)0819416207

Existing approaches to blind channel estimation and deconvolution (equalization) focus exclusively on channel or inverse-channel impulse response estimation. It is well-known that the quality of the deconvolved output depends crucially upon the noise statistics also. Typically it is assumed that the noise is white and the signal-to-noise ratio is known. In this paper we remove these restrictions. Both the channel impulse response and the noise model are estimated from the higher-order (fourth, e.g.) cumulant function and the (second-order) correlation function of the received data via a least-squares cumulant/correlation matching criterion. It is assumed that the noise higher-order cumulant function vanishes (e.g., Gaussian noise, as is the case for digital communications). Consistency of the proposed approach is established under certain mild sufficient conditions. The approach is illustrated via simulation examples involving blind equalization of digital communications signals.

关键词： signal processing

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Compilation time analysis to minimize run-time overhead in preemptive scheduling on multiprocessors

Compilation time analysis to minimize run-time overhead in p...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Wauters, Piet Lauwereins, Rudy Peperstraete, J. Katholieke Univ. Leuven Heverlee Belg

ISBN: (纸本)0819416207

This paper describes a scheduling method for hard real-time Digital signal processing (DSP) applications, implemented on a multi-processor. Due to the very high operating frequencies of DSP applications (typically hundreds of kHz) runtime overhead should be kept as small as possible. Because static scheduling introduces very little run-time overhead it is used as much as possible. Dynamic pre-emption of tasks is allowed if and only if it leads to better performance in spite of the extra run-time overhead. We essentially combine static scheduling with dynamic pre-emption using static priorities. Since we are dealing with hard real-time applications we must be able to guarantee at compile-time that all timing requirements will be satisfied at run-time. We will show that our method performs at least as good as any static scheduling method. It also reduces the total amount of dynamic pre-emptions compared with run time methods like deadline monotonic scheduling.

关键词： Digital signal processing

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Pipelining multiple singular value decomposition (SvDs) on a single processor array

Pipelining multiple singular value decomposition (SVDs) on a...

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advanced signal processing: algorithms, architectures, and implementations v

作者： Kota, Kishore Cavallaro, Joseph R. Rice Univ. Houston TX USA

ISBN: (纸本)0819416207

We present a new family of architectures for processor arrays to implement Jacobi SvD which allow systolic loading and unloading of input and result matrices. Unlike most of the previous SvD arrays in the literature, our architectures do not require special handling of external I/O and hence are closer to the traditional concept of systolic architectures. The boundary processors communicate with the host the same way any of the interior processors communicate with their neighbors. The arrays are surprisingly uniform and simple. The various architectures in the family represent different throughput-hardware tradeoffs corresponding to the degree to which the multiple sweeps have been unrolled and determine the number of independent SvDs which may be pipelined on the array. We achieved systolic loading by using the flexibility provided by the cyclic Jacobi method on the order in which pivot pairs may be chosen. The array operates on the matrix data even as it is being loaded. Once the pipeline is full, the ordering is very similar to odd-even ordering. Our ordering is equivalent to cyclic-by-rows ordering and hence the algorithm is guaranteed to converge. Our systolic loading scheme is very important in an I/O limited system, since it allows more communication to occur in parallel, where the communication includes the loading and unloading operations. The array with the highest throughput in our family of architectures, which implement one-sided Jacobi (either Hestenes' method or Eberlein and Park's method), is a linear array of processors with unidirectional links between neighbors. The architectures with lower throughput require fewer processors connected in a ring, allowing data to recirculate among the processors. The input matrix is loaded one column at a time from the left and the results stream out one column at a time from the right.

关键词： Pipeline processing systems

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