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An Image processing Application: Design of vLSI based Bilateral Filter using Distance Matrix Method

An Image Processing Application: Design of VLSI based Bilate...

advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE), International Conference on

作者： C Saranya M v. vijayananth S Mouleeshwaran D Kaviyarasu Department of ECE K.S.Rangasamy College of Technology Tiruchengode India

ISBN: (纸本)9781665493970

The entire design structure is being impacted by advancements in electronic technology, which is posing a number of challenges for digital systems. In the fields of communications, image processing, and multimedia, vLSI-based image filter architectures are essential. Numerous applications based on vLSI architecture experience problems with significant size components that result in a filter design error during the floating-point arithmetic stages. The increased complexity of the filter design's component list is the issue encountered in the vLSI architecture. Noise removal often involves using the image filtering technique. There is a greater need for performance-based hardware sorting algorithms for low power embedded real-time image filtering applications. Noise often taints an image while being transmitted from one location to another. The purpose of the denoising technique is to reduce noise while keeping any potential signal features that may be significant. Compare to the prior method, the usage of multipliers can be reduced based on the techniques of distance matrix and hardware resource sharing. The speed of the proposed vLSI architecture for the bilateral filter can be faster than the existing approach.

关键词： Noise reduction very large scale integration Filtering algorithms Image filtering Hardware Real-time systems Resource management

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A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection

A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hard...

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Euromicro Symposium on Digital System Design

作者： viktor Herrmann Justin Knapheide Fritjof Steinert Benno Stabernack Fraunhofer Institute for Telecommunications Heinrich Hertz Institute Berlin Germany University of Potsdam Embedded Systems Architectures for Signal Processing Potsdam Germany

ISBN: (数字)9781665474047

ISBN: (纸本)9781665474054

With the recent advances in the fields of machine learning, neural networks and deep-learning algorithms have become a prevalent subject of computer vision. Especially for tasks like object classification and detection Convolutional Neu-ronal Networks (CNNs) have surpassed the previous traditional approaches. In addition to these applications, CNNs can recently also be found in other applications. For example the parametrization of video encoding algorithms as used in our example is quite a new application domain. Especially CNN's high recognition rate makes them particularly suitable for finding Regions of Interest (ROIs) in video sequences, which can be used for adapting the data rate of the compressed video stream accordingly. On the downside, these CNN require an immense amount of processing power and memory bandwidth. Object detection networks such as You Only Look Once (YOLO) try to balance processing speed and accuracy but still rely on power-hungry GPUs to meet real-time requirements. Specialized hardware like Field Programmable Gate Array (FPGA) implementations proved to strongly reduce this problem while still providing sufficient computational power. In this paper we propose a flexible architecture for object detection hardware acceleration based on the YOLO v3-tiny model. The reconfigurable accelerator comprises a high throughput convolution engine, custom blocks for all additional CNN operations and a programmable control unit to manage on-chip execution. The model can be deployed without significant changes based on 32-bit floating point values and without further methods that would reduce the model accuracy. Experimental results show a high capability of the design to accelerate the object detection task with a processing time of 27.5 ms per frame. It is thus real-time-capable for 30 FPS applications at frequency of 200 MHz.

关键词： Computational modeling video sequences Object detection Throughput Real-time systems Classification algorithms Convolutional neural networks

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Singular value decomposition utilizing parallel algorithms on graphical processors

Singular value decomposition utilizing parallel algorithms o...

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OCEANS

作者： Charlotte Kotas Jacob Barhen Center of Engineering Science Advanced Research Oak Ridge National Laboratory Oak Ridge TN USA

One of the current challenges in underwater acoustic array signal processing is the detection of quiet targets in the presence of noise. In order to enable robust detection, one of the key processing steps requires data and replica whitening. This, in turn, involves the eigen-decomposition of the sample spectral matrix, C x = 1/K Σ x K X(k)X H (k) where X(k) denotes a single frequency snapshot with an element for each element of the array. By employing the singular value decomposition (SvD) method, the eigenvectors and eigenvalues can be determined directly from the data without computing the sample covariance matrix, reducing the computational requirements for a given level of accuracy (van Trees, Optimum Array processing). (Recall that the SvD of a complex matrix A involves determining v, Σ, and U such that A = UΣv H where U and v are orthonormal and Σ is a positive, real, diagonal matrix containing the singular values of A. U and v are the eigenvectors of AA H and A H A, respectively, while the singular values are the square roots of the eigenvalues of AA H .) Because it is desirable to be able to compute these quantities in real time, an efficient technique for computing the SvD is vital. In addition, emerging multicore processors like graphical processing units (GPUs) are bringing parallel processing capabilities to an ever increasing number of users. Since the computational tasks involved in array signal processing are well suited for parallelization, it is expected that these computations will be implemented using GPUs as soon as users have the necessary computational tools available to them. Thus, it is important to have an SvD algorithm that is suitable for these processors. This work explores the effectiveness of two different parallel SvD implementations on an NvIDIA Tesla C2050 GPU (14 multiprocessors, 32 cores per multiprocessor, 1.15 GHz clock speed). The first algorithm is based on a two-step algorithm which bidiagonalizes the matrix using Househo

关键词： Graphics processing unit Jacobian matrices Arrays Instruction sets vectors Matrix decomposition Libraries

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Reinforcement Learning-Based Trajectory Planning For UAv-aided vehicular Communications

Reinforcement Learning-Based Trajectory Planning For UAV-aid...

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European signal processing Conference (EUSIPCO)

作者： Riccardo Marini Leonardo Spampinato Silvia Mignardi Roberto verdone Chiara Buratti WiLab CNIT / DEI University of Bologna Bologna Italy

ISBN: (数字)9789082797091

ISBN: (纸本)9781665467995

It is widely expected that 6G networks will rely on Unmanned Aerial vehicles (UAvs) acting as flying Base Stations (BSs) to provide a wide range of services that current networks cannot handle. One of the major trends deals with vehicle-To-Everything (v2X) communications, where vehicles must be connected to the network to offer applications such as advanced driving and extended sensing. In this context, vehicles could deeply count on flying BS to increase the throughput or reduce the experienced latency, thus satisfying such services constraints. Consequently, path planning must be designed so that UAvs can keep stable links with moving vehicles. In this sense, Reinforcement Learning (RL) techniques are becoming the main enabler for solving such problem, since they offer the possibility to learn how to act in an environment with little prior information, given that full knowledge of the scenario is usually not available. In this paper, we present a RL-based approach to solve the path planning problem in a vehicular scenario, where UAvs, exploiting beamforming, are required to follow as long as possible moving cars. Different RL architectures, as well as a benchmark solution not using RL, are compared to select the best strategy maximising the sum throughput.

关键词： Target tracking Q-learning Array signal processing Trajectory planning signal processing algorithms Throughput Market research

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Can surgical simulation be used to train detection and classification of neural networks?

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HEALTHCARE TECHNOLOGY LETTERS 2017年第5期4卷 216-222页

作者： Zisimopoulos, Odysseas Flouty, Evangello Stacey, Mark Muscroft, Sam Giataganas, Petros Nehme, Jean Chow, Andre Stoyanov, Danail Kinosis Ltd Touch Surg 230 City Rd London EC1V 2QY England UCL Comp Sci London WC1E 6BT England

Computer-assisted interventions (CAI) aim to increase the effectiveness, precision and repeatability of procedures to improve surgical outcomes. The presence and motion of surgical tools is a key information input for CAI surgical phase recognition algorithms. vision-based tool detection and recognition approaches are an attractive solution and can be designed to take advantage of the powerful deep learning paradigm that is rapidly advancing image recognition and classification. The challenge for such algorithms is the availability and quality of labelled data used for training. In this Letter, surgical simulation is used to train tool detection and segmentation based on deep convolutional neural networks and generative adversarial networks. The authors experiment with two network architectures for image segmentation in tool classes commonly encountered during cataract surgery. A commercially-available simulator is used to create a simulated cataract dataset for training models prior to performing transfer learning on real surgical data. To the best of authors' knowledge, this is the first attempt to train deep learning models for surgical instrument detection on simulated data while demonstrating promising results to generalise on real data. Results indicate that simulated data does have some potential for training advanced classification methods for CAI systems.

关键词： surgery neural nets learning (artificial intelligence) image recognition image classification image segmentation biomedical optical imaging video signal processing medical image processing surgical simulation computer-assisted interventions CAI surgical phase recognition algorithms vision20 based tool detection deep learning image recognition image classification tool detection tool segmentation deep convolutional neural networks generative adversarial networks image segmentation cataract surgery

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Integrated memory/network architectures for cluster-organized, parallel DSP architectures

Integrated memory/network architectures for cluster-organize...

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IEEE Symposium on IC/Package Design Integration

作者： S.K. Tewksbury v. Gandakota K. Devabattini P. Adabala West Virginia University Morgantown WV USA

The capabilities of switched networks for parallel and distributed computers are evolving rapidly towards networks with various forms of intelligence in support of parallel execution of programs. This paper presents a perspective on intelligent networks, including reconfiguration of the network to adapt to the needs of successive computational algorithms being performed as part of an overall problem, for clusters containing a modest number of digital signal processors (DSPs). Scalability of the overall parallel DSP-based computer is achieved by adding these cluster nodes. It is suggested that there are many operating system functions which might be directly integrated into such an intelligent network, including adapting those operating system functions according to the needs of the specific tasks being performed. The viewpoint presented here is based on a reconfigurable system using FPGAs and being constructed for image processing applications to study opportunities for integration of such intelligent networks into future silicon vLSI components, including advanced packaging such as multichip modules (MCMs). The packaging limitations present the greatest barrier to aggressive development of such networks, with active substrate MCM implementation of the network function providing the greatest flexibility and performance.

关键词： Memory architecture Intelligent networks Computer networks Concurrent computing Operating systems Packaging Computer architecture Distributed computing Computational intelligence Clustering algorithms

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Hardware implementation of a nonlinear processor

Hardware implementation of a nonlinear processor

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： v.K. Jain S. Shrivastava A.D. Snider D. Damerow D. Chester University of South Florida Tampa FL USA Harris Semiconductor Company Palm Bay FL USA

Several advanced DSP algorithms, arising in applications such as wireless communications, computer graphics, computerized tomography, and speech compression, require extensive use of nonlinear functions. We discuss a new hardware approach to high-speed computation of nonlinear functions. With this approach all of the functions needed can be regularized into a single efficient algorithm. Further, highly reduced cycle implementations can be achieved. Specifically, for real arguments, a new result can be produced every cycle-in a pipelined mode. The underlying principle which has made the combined goals of high-speed and multi-functionality possible is significance-based polynomial interpolation of very small ROM tables. Considered are the following seven functions: arctangent, cosine, logarithm, reciprocal, reciprocal-square-root, sine, and square-root. Also presented is a theoretical development for error prediction, a tool for the selection of architectural parameters. Finally, the paper presents a novel technique, named here as 'microshaping', for avoiding overflows, thereby eliminating exception handling.

关键词： Hardware Digital signal processing Application software Wireless communication Computer graphics Computed tomography Speech Polynomials Interpolation Read only memory

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F5: advanced optical communication: From devices, circuits, and architectures to algorithms

F5: Advanced optical communication: From devices, circuits, ...

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IEEE International Conference on Solid-State Circuits (ISSCC)

作者： Bo Zhang Frederic Gianesello Simone Erba Mounir Meghelli Azita Emami Takayuki Shibasaki Broadcom Irvine CA STMicroelectronics Crolles France STMicroelectronics Pavia Italy IBM Thomas J Watson Research Center Yorktown Heights NY California Institute of Technology Pasadena CA Fujitsu Laboratories Kawasaki Japan

ISBN: (纸本)9781538622278;9781509049400

Since the invention of optical fiber in the 1970's, optical communication has been changing the landscape of telecommunication and data communication worldwide with its ultra-broad bandwidth and long haul transmission capabilities. It connects people around the world through submarine inter-continent optical cables, is the backbone of metro area networks, and is essential for data center network connectivity. Today, cost effective 100Gb/s optical links on a single fiber, using either III-v based optical devices or silicon photonics, are readily available for few meters to few kilometers connectivity solutions inside the data center and between data centers, while next generation links are poised to reach 400Gb/s. In this forum, the current state-of-the-art of optical communications will be reviewed, including advances in long-haul transport, progress in silicon photonics covering transceivers, packaging, assembly and test, progress in high order modulation schemes and signal processing, description of 56Gb/s and beyond electrical serial interfaces, and closing with a presentation on optical backplane technology.

关键词： Optical fibers High-speed optical techniques Integrated optics Optical fiber communication Optical signal processing Photonics

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A generic approach to parallelizing and developing control algorithms for heterogeneous architectures

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International Journal of Adaptive Control and signal processing 1998年第5期11卷

作者： M. J. Baxter M. O. Tokhi P. J. Fleming Department of Automatic Control and Systems Engineering The University of Sheffield Sheffield U.K.

System developers have found that exploiting parallel architectures for control systems is challenging and often the resulting implementations do not provide the expected performance advantages over traditional uniprocessor solutions. This paper presents a generic method and a suite of design tools for the implementation of control algorithms on parallel architectures. These tools allow a developer to translate a control system algorithm into efficient executable code, via a highly automated route, for a class of advanced parallel architectures. The tools are demonstrated and discussed by developing several case-study algorithms to full implementations with an emphasis on the problematic areas leading to performance degradation common to parallel systems. © 1997 John Wiley & Sons, Ltd.

关键词： Heterogeneous architectures parallel processing computer-aided control system design and real-time computer systems

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E-discover State-of-the-art Research Trends of Deep Learning for Computer vision

E-discover State-of-the-art Research Trends of Deep Learning...

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IEEE International Conference on Systems, Man and Cybernetics

作者： Annie A. S. Li Amy J. C. Trappey Charles v. Trappey C. Y. Fan Department of Industrial Engineering and Engineering Management National Tsing Hua University Hsinchu Taiwan Distinguished Professor in the Department of Industrial Engineering and Engineering Management National Tsing Hua University Hsinchu Taiwan Department of Management Science National Chiao Chiao Tung Tung University Hsinchu Taiwan Science and Technology Policy and Information Center National Applied Research Laboratory Taipei Taiwan

Computer vision (Cv) attempts to mimic human eyes for image processing and identifications of detailed visual information, such as object positions, features of appearances, and even human emotions and behaviors. In this research, more than one hundred literatures, relating to applying deep learning (DL) methodologies in advanced computer visions (2010~2018), are reviewed and analyzed. The objective is to discover the state-of-the-art DL methods, topics, and trends for Cv and their practical applications. DL algorithms aim at representing multi-levels of distributed neural networks. Because of the enhancement of high speed computational power, DL modeling, based on accumulated big data analytics, has found practical applications for non-supervised intelligent decision supports, such as detection of product defects and prognosis of machine malfunctions based on real-time signal or feature data analyses. There are a vast number of literature, describing DL related researches, developments, and implementations for problem solving. For the comprehensive mining of the related literature, we integrate Latent Dirichlet Allocation (LDA), K-means (Clustering), and normalized term frequency-inverse document frequency (NTF-IDF) approaches to discover, or called technology mining, of the major trends in DL for computer visions, specifically for key applications in object detection, semantic segmentation, image retrieval, and human pose estimation.

关键词： Machine learning Computer vision Market research Text mining Resource management Radio spectrum management

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