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Conference on advanced signal processing algorithms, architectures and implementations Xii

作者： Williams, WJ Quantum Signal LLC Ann Arbor MI USA

ISBN: (纸本)0819445584

Time-frequency distributions (TFDs) of Cohen's class often dramatically reveal complex structures that are not evident in the raw signal. Standard linear filters are often not able to separate the underlying signal from background clutter and noise. The essense of the signal can often be extracted from the TFD by evaluating strategic slices through the TFD for a series of frequencies. However, TFDs are often computationally intense compared to other methods. This paper demonstrates that quadratic filters may be designed to capture the same information as is available in the specific slices through the TFD at a considerably lower computational cost. The outputs of these filters can be combined to provide a robust impulse-like response to the chosen signal. This is particularly useful when the exact time series representation of the signal is unknown, due to variations and background clutter and noise. It is also noted that Teager's method is closely related to TFDs and are an example of a quadratic filter. Results using an ideal matched filter and the TFD motivated quadratic filter are compared to give insight into their relative responses.

关键词： time-frequency Teager speech quadratic filter reduced interference distributions

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Design tradeoffs using truncated multipliers in FIR filter implementations

Design tradeoffs using truncated multipliers in FIR filter i...

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Conference on advanced signal processing algorithms, architectures and implementations Xii

作者： Walters, EG Schulte, MJ Lehigh Univ Comp Sci & Engn Dept Comp Architecture & Arithmet Lab Bethlehem PA 18015 USA

ISBN: (纸本)0819445584

This paper presents a general FIR filter architecture utilizing truncated tree multipliers for computation. The average error, maximum error, and variance of error due to truncation are derived for the proposed architecture. A novel technique that reduces the average error of the filter is presented, along with equations for computing the signal-to-noise ratio of the truncation error. A software tool written in Java is described that automatically generates structural VHDL models for specific filters based on this architecture, given parameters such as the number of taps, operand lengths, number of multipliers, and number of truncated columns. We show that a 22.5 % reduction in area can be achieved for a 24-tap filter with 16-bit operands, 4 parallel multipliers, and 12 truncated columns. For this implementation, the average reduction error is only 9.18 x 10(-5) ulps, and the reduction error SNR is only 2.4 dB less than the roundoff SNR of an equivalent filter without truncation.

关键词： FIR filters truncated multipliers automatic VHDL generation computer arithmetic application-specific designs

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TIME-RECURSIVE COMPUTATION AND REAL-TIME PARALLEL architectures, WITH APPLICATION ON THE MODULATED LAPPED TRANSFORM 4

TIME-RECURSIVE COMPUTATION AND REAL-TIME PARALLEL ARCHITECTU...

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： FRANTZESKAKIS, E BARAS, JS LIU, KJR Univ. of Maryland/College Park (United States)

ISBN: (纸本)0819412767

In this paper, we establish an architectural framework for parallel time-recursive computation. We consider a class of linear operators that consists of the discrete time, time invariant, compactly supported, but otherwise arbitrary kernel functions. We specify the properties of the linear operators that can be implemented efficiently in a time-recursive way. Based on these properties, we develop a routine that produces a time-recursive architectural implementation for a given operator. This routine is instructive for the design of a CAD tool that will facilitate the architecture derivation. Using this background, we design an architecture for the Modulated Lapped Transform (commonly called Modified Discrete Cosine Transform), which has linear cost in operator counts.

关键词： Modulation Computer aided design Computer architecture Fourier transforms Convolution Digital filtering Very large scale integration Radar Video Video processing

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Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA

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INTEGRATION-THE VLSI JOURNAL 2014年第2期47卷 261-271页

作者： Genovese, Mariangela Napoli, Ettore De Caro, Davide Petra, Nicola Strollo, Antonio G. M. Univ Naples Federico II Dept Elect Engn & Informat Technol Naples Italy

The Direct Digital Frequency Synthesizer (DDFS) is a critical component routinely implemented in communication or signal processing systems. The recent literature proposes various DDFS implementation techniques that, implemented by using state of the art Application Specific Integrated Circuits (ASIC) technologies, provide ever improving performances in terms of speed, power dissipation and silicon area occupation. The performance trend provided by the advanced designs that target ASIC technologies is not guaranteed to remain the same when the target technology is a commercially available Field Programmable Gate Array (FPGA) device. This paper presents the FPGA implementation of the best performing DDFS architectures proposed to date. DDFS performance trends are compared with the ASIC implementations. Further, the state of the art DDFS circuits are modified in order to better suit the FPGA technology and compared against the DDFS implementations obtained using Intellectual Properties (IPs) included in the design suites of the FPGA manufacturers. The comparison is conducted considering as implementation target various (both low end, middle range, and high end) FPGA devices produced by different vendors. Considered performance parameters are the maximum working frequency, the dynamic power dissipation, the logic resource occupation, and the precision of the DDFS measured in terms of Spurious Free Dynamic Range (SFDR). The analysis shows that when dealing with FPGA implementations, it is important that the implemented architectures adapt to the internal logic resources of the FPGA. For low SFDR values the best performing architectures are the straightforward ROM based ones that optimally fit in the very fast Block RAM of the FPGA. When the required SFDR increases more advanced architectures are required. The optimal architectures also depend on the design choice of privileging high working frequency or reduced power dissipation. (C) 2013 Elsevier B.V. All rights reserv

关键词： Direct digital frequency synthesizer Field programmable gate arrays Application specific integrated circuits

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Two-dimensional signal classification by multiscale wavelet representation

Two-dimensional signal classification by multiscale wavelet ...

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advanced signal processing algorithms, architectures, and implementations iiI

作者： Sari-Sarraf, Hamed Brzakovic, Dragana Univ. of Tennessee/Knoxville Knoxville TN USA

ISBN: (纸本)081940943X

This paper describes a technique for classification of 2-D discrete signals. It consists of four modules, namely the partition, representation, measurement, and the classification modules. The first of these either passes the observed signal as a whole or divides it into subregions which may or may not overlap. The representation module first computes the shift-invariant multiscale wavelet representations (MSWAR) of the reference and the observed signals and then generates a corresponding set of 1-D signatures. The measurement module extracts those vital signal features to which the decision rules of the classification module are applied. The paper presents the design and implementation of each of these modules, emphasizing theoretical background behind the design and efficiency of their implementation. Also some preliminary results have been included that demonstrate the ability of this technique to classify observed signals that are corrupted by different types of deformities.

关键词： Digital signal processing

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signal exploitation by time and frequency correlation

Signal exploitation by time and frequency correlation

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Conference on advanced signal processing algorithms, architectures, and implementations XI

作者： Nelson, DJ Tempkin, JA US Dept Def Ft George G Meade MD 20755 USA

ISBN: (纸本)0819441880

We address two classical problems relating to harmonic signals. The first of these is the blind recovery of the carrier of a single sideband-AM communication signal, and the second is the isolation and blind estimation of the fundamental of a time-varying harmonic signal. The methods are based on cross-spectra estimated from the short time Fourier transform, a generalization of the Chinese remainder theorem and joint Fourier and autocorrelation representations of the signal spectrum. These tools are developed, and their utility is demonstrated in the solutions of the the two problems. By an additional application of a frequency-lag autocorrelation function, it is demonstrated that the harmonic fundamental can be recovered, even if it is not present in the original spectrum.

关键词： single sideband AM autocorrelation signal estimation phase spectrum Chinese remainder theorem

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ENHANCED INTERPROCESSOR COMMUNICATION STRATEGIES FOR PARALLEL TMS320C40 DIGITAL signal PROCESSOR SYSTEMS 4

ENHANCED INTERPROCESSOR COMMUNICATION STRATEGIES FOR PARALLE...

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： HARTLEY, DA HARVEY, DM Liverpool John Moores Univ. (United Kingdom)

ISBN: (纸本)0819412767

The Texas Instruments' TMS320C40 digital signal processor contains communication hardware which enables processors to be connected together to form multiprocessing systems. Analysis of the devices communication channels suggests that it would be beneficial to use additional communication hardware to maximize system performance. The use of mesh routing chips in conjunction with the processors has been investigated. The two devices are interfaced using two TMS320C40 communication channels. Lower message latencies can be achieved by using TMS320C40 communication channels to perform nearest neighbor communications while using the routing chips to perform all other message routing. However, the use of additional TMS320C40 channels can degrade the rate at which packets are injected and consumed from the network, resulting in under utilization of the network bandwidth.

关键词： Telecommunications signal processing Data communications Digital signal processing Systems modeling Computer simulations Data processing Switches Computing systems Data modeling

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Efficient implementations of pipelined CORDIC based iiR digital filters using fast orthonormal μ-rotations

Efficient implementations of pipelined CORDIC based IIR digi...

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SPIE Conference on advanced signal processing algorithms, architectures, and implementations ViiI

作者： Ma, J Parhi, KK Hekstra, GJ Deprettere, EF Univ Minnesota Dept ECE Minneapolis MN 55455 USA

ISBN: (纸本)0819429163

CORDIC based iiR digital filters are orthogonal filters whose internal computations consist of orthogonal transformations. These filters possess desirable properties for VLSI implementations such as regularity, local connection, low sensitivity to finite word-length implementation, and elimination of limit cycles. Recently, fine-grain pipelined CORDIC based iiR digital filter architectures which can perform the filtering operations at arbitrarily high sample rates at the cost of linear increase in hardware complexity have been developed. These pipelined architectures consist of only Givens rotations and a few additions which can be mapped onto CORDIC arithmetic based processors. However, in practical applications, implementations of Givens rotations using traditional CORDIC arithmetic are quite expensive. For example, for 16 bit accuracy, using floating point data format with 16 bit mantissa and 5 bit exponent, it will require approximately 20 pairs of shift-add operations for one Givens rotation. In this paper, we propose an efficient implementation of pipelined CORDIC based iiR digital filters based on fast orthonormal mu-rotations. Using this method, the Givens rotations are approximated by angles corresponding to orthonormal mu-rotations, which are based on the idea of CORDIC and can perform rotation with minimal number of shift-add operations. We present various methods of construction for such orthonormal mu-rotations. A significant reduction (over 76%) of the number of required shift-add operations is achieved. All types of fast rotations can be implemented as a cascade of only four basic types of shift-add stages. These stages can be executed on a modified floating-point CORDIC architecture, making the pipelined filter highly suitable for VLSI implementations.

关键词： orthogonal iiR digital filters pipelining approximate rotations orthonormal mu-rotations CORDIC architecture

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Time-frequency analysis for the study of phase synchrony in the brain

Time-frequency analysis for the study of phase synchrony in ...

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Conference on advanced signal processing algorithms, architectures, and Implementantions XViiI

作者： Aviyente, Selin Evans, Westley Michigan State Univ E Lansing MI 48824 USA

ISBN: (纸本)9780819472946

The quantification of synchrony is important for the study of large-scale interactions in the brain. Current synchrony measures depend on the energy of the signals rather than the phase, and cannot be reliably used as measures of neural synchrony. Moreover, the current methods are insufficient since they are limited to pairs of signals. These approaches cannot quantify the synchrony across a group of electrodes and over time-varying frequency regions. In this paper, we propose two new measures for quantifying the synchrony between both pairs and groups of electrodes using time-frequency analysis. The proposed measures are applied to electroencephalogram (EEG) data to quantify neural synchrony.

关键词： Phase measurement Time-frequency analysis Brain Electrodes Electroencephalography Mode locking Wavelets Iterated function systems signal analyzers Wavelet transforms

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WAVELETS, TOMOGRAPHY, AND LINE SEGMENT IMAGE REPRESENTATIONS

WAVELETS, TOMOGRAPHY, AND LINE SEGMENT IMAGE REPRESENTATIONS

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CONF ON advanced signal-processing algorithms, architectures, AND implementations

作者： ALTES, RA Chirp Corp. (United States)

ISBN: (纸本)0819404098

Conventional scale dependent wavelet analysis represents a signal or iniage as a superposition of translated differently scaled versions of the same basis function. When the basis function for time series analysis is a chirp with linear frequency modulation a scale dependent wavelet representation is equivalent to a sequence of projections of the signal timefrequency distribution along differently rotated lines and reconstruction of the signal from its chirped wavelet representation is analogous to tomographic reconstruction from time frequency projections. The same analogy applies in two dimensions if scaled basis functions are replaced by rotated ones such that an image is represented by a superposition of translated differently rotated versions of the same basis function. For rotation dependent wavelet analysis basis functions consisting of very long line segments yield a tomographic representation while shorter line segments yield a line segment image representation as in the primate visual cortex. Applications include binocular robot vision and synthetic aperture radar.

关键词： Wavelets Tomography Image segmentation Superposition Frequency modulation Robot vision signal analyzers Synthetic aperture radar Time series analysis Visual cortex

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