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Proceedings of the 35th Asilomar Conference on signals, Systems & Computers

Proceedings of the 35th Asilomar Conference on Signals, Syst...

引用

35th Asilomar Conference on signals, Systems and Computers

This Volume 2 of 2 of the conference proceedings contains 160 papers. Topics discussed include wireless communication and signal processing, algorithms for MIMO links, modulation and detection techniques, signal detection and classification, adaptive communications and arrays, image segmentation and frequency domain processing, multiple user/multiple access techniques, digital signal processing architectures, hyperspectral processing and multisignals or data fusion, computer arithmetic implementations and FPGA designs, radar and sonar processing, equalization and synchronization techniques, higher order statistical signal processing for communications, adaptive signal processing in communication, speech coding and processing, wireless systems, special arithmetic techniques, biomedical imaging and advanced modulation and channel estimation.

关键词： signal processing

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Highly scalable hardware accelerator for digital signal processing

Highly scalable hardware accelerator for digital signal proc...

引用

advanced signal processing: algorithms, architectures, and implementations V

作者： Chi, Chi-Hung Lau, Siu-Chung Chinese Univ. of Hong Kong Shatin NT Hong Kong

ISBN: (纸本)0819416207

In this paper, a highly scalable hardware accelerator design for digital signal processing is presented. The key features of this accelerator are minimum I/O operations, highly scalable massive parallelism, easy programming, and modularity and regularity. With a very large register file (> 1000) per processing element, the reuse factor per datum in this accelerator can be increased significantly (as compared to traditional DSP architectures). System performance is improved because the amount of data transfer between the on-chip cache and the off-chip cache/memory is reduced by the same factor. Since the basic building block of this accelerator is simply a VLSI chip with several processing elements, scalable massive parallelism can be achieved by connecting multiple chips together in a SIMD `vector- like' fashion. Finally, programming of this accelerometer is not difficult because it is operated under the SIMD `vector-like' mode. With the expected VLSI technology in the next few years, the throughput of one single accelerator chip can approach GFLOPs performance. Hence, the high computing power needed by digital signal processing applications can be provided by just connecting a small number of this chip together.

关键词： Computer hardware

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Modified Gram-Schmidt based downdating technique for ULV decompositions with applications to recursive TLS problems

Modified Gram-Schmidt based downdating technique for ULV dec...

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Proceedings of the 1999 advanced signal processing algorithms, architectures, and implementations IX

作者： Barlow, Jesse L. Erbay, Hasan Zhang, Zhenyue Pennsylvania State Univ University Park United States

The ULV decomposition (ULVD) is an important member of a class of rank-revealing two-sided orthogonal decompositions used to approximate the singular value decomposition (SVD). The ULVD can be updated and downdated much faster than the SVD, hence its utility in the solution of recursive total least squares (TLS) problems. However, the robust implementation of ULVD after the addition and deletion of rows (called updating and downdating respectively) is not altogether straightforward. When updating or downdating the ULVD, the accurate computation of the subspaces necessary to solve the TLS problem is of great importance. In this paper, algorithms are given to compute simple parameters that can often show when good subspaces have been computed.

关键词： signal processing

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Error analysis in unnormalized floating point arithmetic

Error analysis in unnormalized floating point arithmetic

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advanced signal processing algorithms, architectures, and implementations II

作者： Barlow, Jesse L. Zaccone, Richard J. The Pennsylvania State Univ. University Park PA USA

ISBN: (纸本)0819406945

The need to construct architectures in VLSI has focused attention on unnormalized floating point arithmetic. Certain unnormalized arithmetics allow one to 'pipe on digits,' thus producing significant speed up in computation and making the input problems of special purpose devices such as systolic arrays easier to solve. We consider the error analysis implications of using unnormalized arithmetic in numerical algorithms. We also give specifications for its implementation. Our discussion centers on the example of Gaussian elimination. We show that the use of unnormalized arithmetic requires change in the analysis of this algorithm. We will show that only for certain classes of matrices that include diagonally dominant matrices (either row or column), Gaussian elimination is as stable in unnormalized arithmetic as in normalized arithmetic. However, if the diagonal elements of the upper triangular matrix are post normalized, then Gaussian elimination is as stable in unnormalized arithmetic as in normalized arithmetic for all matrices.

关键词： signal processing

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Modulo-addressing utilization in automatic software synthesis for digital signal processors

Modulo-addressing utilization in automatic software synthesi...

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1997 IEEE International Conference on Acoustics, Speech, and signal processing (ICASSP 97)

作者： Willems, M Keding, H Zivojnovic, V Meyr, H Aachen Univ of Technology Aachen Germany

ISBN: (纸本)0818679204

Digital signal Processors (DSPs) have become key components for the implementation of digital signal processing systems. With DSPs moving into new application domains and the increasing complexity of modern DSP architectures, efficient programming support receives major interest. Therefore, an optimizing compiler becomes a must for future DSP-architectures. Todays DSP compilers result in significant overheads both in memory consumption and program execution time compared to hand-written assembly code. This is mainly due to an inefficient compiler support of the DSP specific architectural features, such as the modulo-addressing capability which is an enabling feature for a large class of DSP algorithms. Within this paper we analyze why existing compilers fail short in supporting the module-addressing mode and present a compiler concept that allows the efficient utilization of this feature. We describe how an advanced compiler optimization strategy allows a near optimum support of the module-addressing mode, and point out why this concept is favorable to DSP-specific language extensions.

关键词： Program compilers

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Modular implementations of linearly constrained beamformers

Modular implementations of linearly constrained beamformers

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advanced signal processing algorithms, architectures, and implementations II

作者： Liu, Tsung-Ching Van Veen, Barry D. Univ. of Wisconsin Madison WI USA

ISBN: (纸本)0819406945

This paper describes a cascade decomposition of the generalized sidelobe canceller (GSC) implementation for linearly constrained minimum variance beamformers. The GSC is initially separated into an adaptive interference cancellation module followed by a non-adaptive beamformer. We prove that the adaptive interference cancellation module can be decomposed into a cascade of first (or higher) order adaptive interference cancellation modules, where the order corresponds to the number of adaptive degrees of freedom represented in the module. This distributes the computational burden associated with determining the adaptive weights over several lower order problems and facilitates simultaneous implementation of beamformers with differing numbers of adaptive degrees of freedom.

关键词： signal Interference

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Direction-of-arrival estimation in unknown correlated noise using MUSIC and higher order statistics

Direction-of-arrival estimation in unknown correlated noise ...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Hung, Hsien-Sen Chen, Keshi Iowa State Univ. Ames IA USA

ISBN: (纸本)0819416207

In this paper we consider the direction-of-arrival (DOA) estimation of Gaussian signals in non- Gaussian noise of unknown spatial correlations. The proposed method involves two primary steps. Firstly, the third-order cumulant function of the random wavefield received by an array of sensors is estimated and then projected onto the correlation domain to exploit the correlations of noise across the sensors in an array. Secondly, the estimated noise correlation matrix is then utilized in a correlation-based eigenstructure method, such as MUSIC, for DOA estimation. As expected, the proposed method improves the performance of MUSIC which requires the knowledge of noise correlation. Numerical simulation results for both the MUSIC and proposed algorithms are presented and compared.

关键词： signal processing

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Discrete implementations of scale transform

Discrete implementations of scale transform

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Proceedings of the 1999 advanced signal processing algorithms, architectures, and implementations IX

作者： Djurdjanovic, Dragan Williams, William J. Koh, Christopher K.H. Nanyang Technological Univ Singapore

Scale as a physical quantity is a recently developed concept. The scale transform can be viewed as a special case of the more general Mellin transform and its mathematical properties are very applicable in the analysis and interpretation of the signals subject to scale changes. A number of single-dimensional applications of scale concept have been made in speech analysis, processing of biological signals, machine vibration analysis and other areas. Recently, the scale transform was also applied in multi-dimensional signal processing and used for image filtering and denoising. Discrete implementation of the scale transform can be carried out using logarithmic sampling and the well-known fast Fourier transform. Nevertheless, in the case of the uniformly sampled signals, this implementation involves resampling. An algorithm not involving resampling of the uniformly sampled signals has been derived too. In this paper, a modification of the later algorithm for discrete implementation of the direct scale transform is presented. In addition, similar concept was used to improve a recently introduced discrete implementation of the inverse scale transform. Estimation of the absolute discretisation errors showed that the modified algorithms have a desirable property of yielding a smaller region of possible error magnitudes. Experimental results are obtained using artificial signals as well as signals evoked from the temporomandibular joint. In addition, discrete implementations for the separable two-dimensional direct and inverse scale transforms are derived. Experiments with image restoration and scaling through two-dimensional scale domain using the novel implementation of the separable two-dimensional scale transform pair are presented.

关键词： signal processing

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SCALABLE PARALLEL implementations OF PERCEPTUAL GROUPING ON CONNECTION MACHINE CM-5 12

SCALABLE PARALLEL IMPLEMENTATIONS OF PERCEPTUAL GROUPING ON ...

引用

Conference C on signal processing and Conference D on Parallel Computing, at the 12th IAPR International Conference on Pattern Recognition

作者： PRASANNA, VK WANG, CL UNIV SO CALIF DEPT EE SYSTLOS ANGELESCA 90089

ISBN: (纸本)0818662751

Perceptual grouping is a key step in vision to organize image data into structural hypotheses to be used for high level analysis. In this paper, we propose data allocation and load balancing strategies which reduce the communication cost and evenly distribute the grouping operations among the processors. These techniques result in scalable algorithms for performing perceptual grouping on CM-5. The performance of our algorithms depends only on the total grouping operations generated by the image data and is independent of the distribution of the data among the processors. Our implementations show that given a 1K × 1K input image, extraction of line segments and several perceptual grouping steps can be performed in 5.0 seconds using a partition of CM-5 having 32 processing nodes. A serial implementation of these steps on a Sun Sparc 400 takes more than 2 minutes. © 1994 IEEE.

关键词： Parallel processing systems

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Massively parallel signal processing architecture based on response of retina cells

Massively parallel signal processing architecture based on r...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Wilkins, Nathan A. Abushagur, Mustafa A. Caulfield, H.John COLSA Corp. Ft. Payne AL USA

ISBN: (纸本)0819416207

A massively parallel signal and image processing architecture is considered. The architecture is comprised of 2D arrays of cells that simulate the response of retina neurons. The results of simulations are compared to previously published experimental results and the system is applied to detection of spatio-temporal features in sequences of images representative of pulse- doppler radar images. By arranging the output layer so that the cells respond to various key input features an array of feature extraction cells can be obtained. The system is characterized by developing an image space to feature space mapping.

关键词： Computer vision

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