检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,503 篇 会议
108 篇 期刊文献

馆藏范围

1,611 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,171 篇 工学
- 1,114 篇 计算机科学与技术...
- 557 篇 软件工程
- 118 篇 电气工程
- 75 篇 信息与通信工程
- 46 篇 控制科学与工程
- 37 篇 电子科学与技术（可...
- 13 篇 材料科学与工程（可...
- 13 篇 农业工程
- 11 篇 机械工程
- 11 篇 光学工程
- 8 篇 化学工程与技术
- 8 篇 生物工程
- 7 篇 建筑学
- 7 篇 生物医学工程（可授...
- 6 篇 动力工程及工程热...
- 5 篇 土木工程
- 3 篇 力学（可授工学、理...
582 篇 理学
- 560 篇 数学
- 55 篇 统计学（可授理学、...
- 16 篇 物理学
- 9 篇 生物学
- 9 篇 系统科学
- 8 篇 化学
73 篇 管理学
- 64 篇 管理科学与工程(可...
- 40 篇 工商管理
- 10 篇 图书情报与档案管...
16 篇 农学
- 16 篇 作物学
6 篇 经济学
- 6 篇 应用经济学
3 篇 法学
- 3 篇 社会学
3 篇 教育学
- 3 篇 教育学
2 篇 医学
1 篇 文学
1 篇 军事学

主题

237 篇 parallel algorit...
173 篇 parallel process...
80 篇 computer archite...
73 篇 parallel process...
57 篇 algorithms
57 篇 parallel program...
47 篇 parallel archite...
41 篇 hardware
30 篇 scheduling
27 篇 computer program...
21 篇 graph algorithms
20 篇 computer systems...
18 篇 approximation al...
18 篇 processor schedu...
18 篇 computational mo...
18 篇 field programmab...
17 篇 parallel computi...
16 篇 computer science
16 篇 performance
16 篇 delay

机构

32 篇 carnegie mellon ...
15 篇 swiss fed inst t...
15 篇 carnegie mellon ...
11 篇 univ maryland de...
11 篇 stanford univ st...
10 篇 univ maryland co...
10 篇 mit 77 massachus...
10 篇 univ calif berke...
8 篇 eth zurich
7 篇 georgetown univ ...
7 篇 mit cambridge ma...
7 篇 univ texas austi...
6 篇 penn state univ ...
6 篇 mit csail cambri...
6 篇 carnegie mellon ...
5 篇 univ calif river...
5 篇 princeton univer...
5 篇 university of ma...
5 篇 microsoft res re...
5 篇 carnegie mellon ...

作者

38 篇 blelloch guy e.
20 篇 gu yan
18 篇 gibbons phillip ...
18 篇 shun julian
18 篇 goodrich michael...
16 篇 fineman jeremy t...
15 篇 sun yihan
14 篇 dhulipala laxman
13 篇 vishkin uzi
12 篇 agrawal kunal
11 篇 leiserson charle...
10 篇 ballard grey
10 篇 hoefler torsten
10 篇 anon
10 篇 miller gary l.
10 篇 harris david g.
9 篇 ghaffari mohsen
9 篇 tangwongsan kana...
9 篇 reif john h.
9 篇 demmel james

语言

1,571 篇 英文
40 篇 其他

检索条件"任意字段=Annual ACM Symposium on Parallel Algorithms and Architectures"

共 1611 条记录，以下是1551-1560 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

A tight upper bound on the probabilistic embedding of series-parallel graphs 06

A tight upper bound on the probabilistic embedding of series...

引用

Proceedings of the seventeenth annual acm-SIAM symposium on Discrete algorithm

作者： Yuval Emek David Peleg The Weizmann Institute of Science Rehovot Israel

ISBN: (纸本)9780898716054

In [6] it is shown that every graph can be probabilistically embedded into a distribution over its spanning trees with expected distortion O(log2 n log log n), narrowing the gap left by [1], where a lower bound of Ω(log n) is established. This lower bound holds even for the class of series-parallel graphs as proved in [8]. In this paper we close this gap for series-parallel graphs, namely we prove that every n-vertex series-parallel graph can be probabilistically embedded into a distribution over its spanning trees with expected stretch O(log n) for every two vertices. We gain our upper bound by presenting a polynomial time probabilistic algorithm that constructs spanning trees with low expected stretch. This probabilistic algorithm can be derandomized to yield a deterministic polynomial time algorithm for constructing a spanning tree of a given series-parallel graph G, whose communication cost is at most O(log n) times larger than that of G.

关键词：

来源：评论

学校读者我要写书评

暂无评论

parallel monotonicity reconstruction 08

Parallel monotonicity reconstruction

引用

Proceedings of the nineteenth annual acm-SIAM symposium on Discrete algorithms

作者： Michael Saks C. Seshadhri Rutgers University Princeton University

We investigate the problem of monotonicity reconstruction, as defined in [3], in a parallel setting. We have oracle access to a nonnegative real-valued function f defined on domain [n]d = {1,…,n}d. We would like to closely approximate f by a monotone function g. This should be done by a procedure (a filter) that given as input a point x ∈ [n]d outputs the value of g(x), and runs in time that is highly sublinear in n. The procedure can (indeed must) be randomized, but we require that all of the randomness be specified in advance by a single short random seed. We construct such an implementation where the the time and space per query is (log n)O(1) and the size of the seed is polynomial in log n and d. Furthermore the distance of the approximating function g from f is at most a constant multiple of the minimum distance of any monotone function from *** implementation allows for parallelization: one can initialize many copies of the filter with the same short random seed, and they can autonomously handle queries, while producing outputs that are consistent with the same approximating function g.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Superblock formation using static program analysis 26

Superblock formation using static program analysis

引用

IEEE/acm International symposium on Microarchitecture (MICRO)

作者： Richard E. Hank Scott A. Mahlke Roger A. Bringmann John C. Gyllenhaal Wen-mei W. Hwu School of Business Administration Hebrew University of Jerusalem Jerusalem Israel Department of Industrial Engineering Ben-Gurion University of the Negev Beersheba Israel Department of Computer Science Tsinghua University Beijing China Department of Computer Science The College of Staten Island City University of New York Staten Island NY USA

ISBN: (纸本)9780818652806

To achieve higher instruction-level parallelism, the constraint imposed by a single control flow must be relaxed. Control operations should execute in parallel just like data operations. We present a new software pipelining method called GPMB (Global Pipelining with Multiple Branches) which is based on architectures supporting multi-way branching and multiple control flows. Preliminary experimental results show that, for IFless loops, GPMB performs as well as modulo scheduling, and for branch-intensive loops, GPMB performs much better than software pipelining assuming the constraint of one two-way branch per cycle.< >

关键词： Pipeline processing Computer architecture Software performance Computer science Switches Cost function Educational institutions parallel processing Size measurement VLIW

来源：评论

学校读者我要写书评

暂无评论

Four terminal planar Delta-Wye reducibility via rooted K2;4 minors 15

Four terminal planar Delta-Wye reducibility via rooted K2;4 ...

引用

annual acm-Society for Industrial and Applied Mathmatics symposium on Discrete algorithms

作者： Lino Demasi Bojan Mohar Department of Mathematics Simon Fraser University

ISBN: (纸本)9781510813311

A graph with four special vertices (called terminals) is wye-delta reducible if we can obtain a graph on four vertices by a sequence of wye-delta and delta-wye operations and series-parallel reductions, none of which is allowed to remove any of the terminals. A good characterization of wye-delta reducible 3-connected planar graphs with four terminals is given. The proofs yield an O(n~2) time algorithm that either exhibits an obstruction to the 4-terminal reducibility or returns a sequence of wye-delta operations and series-parallel reductions that reduce the input graph to a subgraph of K4 whose vertices are the terminals. We also discuss terminal wye-delta reducibility when a mixture of vertices and faces are treated as terminals. It is also shown that a sufficiently connected cubic graph is wye-delta reducible if and only if it does not contain the Petersen graph as a minor. The main ingredient in the proofs is a good characterization of planar graphs with four terminals that do not admit a rooted K_(2,4) minor with the four terminals corresponding to the roots on the large side of the bipartition of K_(2,4). Up to small connectivity reductions, cases without the rooted minor fall into five structural cases that lead to a polynomial-time algorithm for recognition of these graphs and construction of rooted K_(2,4) minors. This result is of independent interest in structural graph theory.

关键词： four-terminal Device Terminal Minors Graph theory Line graph vertex head Proof Planar series-parallel

来源：评论

学校读者我要写书评

暂无评论

PyPIM: Integrating Digital Processing-in-Memory from Microarchitectural Design to Python Tensors

PyPIM: Integrating Digital Processing-in-Memory from Microar...

引用

IEEE/acm International symposium on Microarchitecture (MICRO)

作者： Orian Leitersdorf Ronny Ronen Shahar Kvatinsky Viterbi Faculty of Electrical and Computer Engineering Technion – Israel Institute of Technology Haifa Israel

ISBN: (数字)9798350350579

ISBN: (纸本)9798350350586

Digital processing-in-memory (PIM) architectures mitigate the memory wall problem by facilitating parallel bitwise operations directly within the memory. Recent works have demonstrated their algorithmic potential for accelerating data-intensive applications; however, there remains a significant gap in the programming model and microarchitectural design. This is further exacerbated by aspects unique to memristive PIM such as partitions and operations across both directions of the memory array. To address this gap, this paper provides an end-to-end architectural integration of digital memristive PIM from a high-level Python library for tensor operations (similar to NumPy and PyTorch) to the low-level microarchitectural design. We begin by proposing an efficient microarchitecture and instruction set architecture (ISA) that bridge the gap between the low-level control periphery and an abstraction of PIM parallelism. We subsequently propose a PIM development library that converts high-level Python to ISA instructions and a PIM driver that translates ISA instructions into PIM micro-operations. We evaluate PyPIM via a cycle-accurate simulator on a wide variety of benchmarks that both demonstrate the versatility of the Python library and the performance compared to theoretical PIM bounds. Overall, PyPIM drastically simplifies the development of PIM applications and enables the conversion of existing tensor-oriented Python programs to PIM with ease.

关键词： Microarchitecture Tensors Instruction sets Computational modeling Memory architecture Programming parallel processing Libraries Partitioning algorithms Python

来源：评论

学校读者我要写书评

暂无评论

GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar architectures

GaaS-X: Graph Analytics Accelerator Supporting Sparse Data R...

引用

annual International symposium on Computer Architecture, ISCA

作者： Nagadastagiri Challapalle Sahithi Rampalli Linghao Song Nandhini Chandramoorthy Karthik Swaminathan John Sampson Yiran Chen Vijaykrishnan Narayanan The Pennsylvania State University Duke University IBM T.J. Watson Research Center

ISBN: (数字)9781728146614

ISBN: (纸本)9781728146621

Graph analytics applications are ubiquitous in this era of a connected world. These applications have very low compute to byte-transferred ratios and exhibit poor locality, which limits their computational efficiency on general purpose computing systems. Conventional hardware accelerators employ custom dataflow and memory hierarchy organization to overcome these challenges. Processing-in-memory (PIM) accelerators leverage massively parallel compute capable memory arrays to perform the in-situ operations on graph data or employ custom compute elements near the memory to leverage larger internal bandwidths. In this work, we present GaaS-X, a graph analytics accelerator that inherently supports the sparse graph data representations using an in-situ compute-enabled crossbar memory architectures. We alleviate the overheads of redundant writes, sparse to dense conversions, and redundant computations on the invalid edges that are present in the state of the art crossbar-based PIM accelerators. GaaS-X achieves 7.7× and 2.4× performance and 22× and 5.7×, energy savings, respectively, over two state-of-the-art crossbar accelerators and offers orders of magnitude improvements over GPU and CPU solutions.

关键词：

来源：评论

学校读者我要写书评

暂无评论

FlexGibbs: Reconfigurable parallel Gibbs Sampling Accelerator for Structured Graphs

FlexGibbs: Reconfigurable Parallel Gibbs Sampling Accelerato...

引用

annual IEEE symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Glenn G. Ko Yuji Chai Rob A. Rutenbar David Brooks Gu-Yeon Wei Harvard University Cambridge USA University of Illinois at Urbana-Champaign Urbana USA University of Pittsburgh Pittsburgh USA

Many consider one of the key components to the success of deep learning as its compatibility with existing accelerators, mainly GPU. While GPUs are great at handling linear algebra kernels commonly found in deep learning, they are not the optimal architecture for handling unsupervised learning methods such as Bayesian models and inference. As a step towards, achieving better understanding of architectures for probabilistic models, Gibbs sampling, one of the most commonly used algorithms for Bayesian inference, is studied with a focus on parallelism that converges to the target distribution and parameterized components. We propose FlexGibbs, a reconfigurable parallel Gibbs sampling inference accelerator for structured graphs. We designed an architecture optimal for solving Markov Random Field tasks using an array of parallel Gibbs samplers, enabled by chromatic scheduling. We show that for sound source separation application, FlexGibbs configured on the FPGA fabric of Xilinx Zync CPU-FPGA SoC achieved Gibbs sampling inference speedup of 1048x and 99.85% reduction in energy over running it on ARM Cortex-A53.

关键词： Bayes methods Markov processes Source separation Hardware Acceleration Deep learning

来源：评论

学校读者我要写书评

暂无评论

Boosting Memory Performance of Many-Core FPGA Device through Dynamic Precedence Graph

Boosting Memory Performance of Many-Core FPGA Device through...

引用

annual IEEE symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Yu Bai Abigail Fuentes Michael Riera Mohammed Alawad Mingjie Lin Department of Electrical Engineering and Computer Science University of Central Florida Orlando FL USA

Emerging FPGA device, integrated with abundant RAM blocks and high-performance processor cores, offers an unprecedented opportunity to effectively implement single-chip distributed logic-memory (DLM) architectures [1]. Being “memory-centric”, the DLM architecture can significantly improve the overall performance and energy efficiency of many memory-intensive embedded applications, especially those that exhibit irregular array data access patterns at algorithmic level. However, implementing DLM architecture poses unique challenges to an FPGA designer in terms of 1) organizing and partitioning diverse on-chip memory resources, and 2) orchestrating effective data transmission between on-chip and off-chip memory. In this paper, we offer our solutions to both of these challenges. Specifically, 1) we propose a stochastic memory partitioning scheme based on the well-known simulated annealing algorithm. It obtains memory partitioning solutions that promote parallelized memory accesses by exploring large solution space; 2) we augment the proposed DLM architecture with a reconfigure hardware graph that can dynamically compute precedence relationship between memory partitions, thus effectively exploiting algorithmic level memory parallelism on a per-application basis. We evaluate the effectiveness of our approach (A3) against two other DLM architecture synthesizing methods: an algorithmic-centric reconfigurable computing architectures with a single monolithic memory (A1) and the heterogeneous distributed architectures synthesized according to [1] (A2). To make our comparison fair, in all three architectures, the data path remains the same while local memory architecture differs. For each of ten benchmark applications from SPEC2006 and MiBench [2], we break down the performance benefit of using A3 into two parts: the portion due to stochastic local memory partitioning and the portion due to the dynamic graph-based memory arbitration. All experiments have been conducted with a V

关键词： Random access memory Field programmable gate arrays Computer architecture Heuristic algorithms Hardware Partitioning algorithms parallel processing

来源：评论

学校读者我要写书评

暂无评论

Reconciling simplicity and realism in parallel disk models 01

Reconciling simplicity and realism in parallel disk models

引用

Proceedings of the twelfth annual acm-SIAM symposium on Discrete algorithms

作者： Peter Sanders Max Planck Institut für Informatik Saarbrücken Germany

ISBN: (纸本)9780898714906

For the design and analysis of algorithms that process huge data sets, a machine model is needed that handles parallel disks. There seems to be a dilemma between simple and flexible use of such a model and accurate modelling of details of the hardware. This paper explains how many aspects of this problem can be resolved. The programming model implements one large logical disk allowing concurrent access to arbitrary sets of variable size blocks. This model can be implemented efficienctly on multiple independent disks even if zones with different speed, communication bottlenecks and failed disks are allowed. These results not only provide useful algorithmic tools but also imply a theoretical justification for studying external memory algorithms using simple abstract *** algorithmic approach is random redundant placement of data and optimal scheduling of accesses. The analysis generalizes a previous analysis for simple abstract external memory models in several ways (Higher efficiency, variable block sizes, more detailed disk model). As a side effect, an apparently new Chernoff bound for sums of weighted 0-1 random variables is derived.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Clustering Affine Subspaces: Hardness and algorithms 13

Clustering Affine Subspaces: Hardness and Algorithms

引用

symposium on Discrete algorithms

作者： Euiwoong Lee Leonard J. Schulman CMU Caltech.

ISBN: (纸本)9781627484855

We study a generalization of the famous κ-center problem where each object is an affine subspace of dimension Δ, and give either the first or significantly improved algorithms and hardness results for many combinations of parameters. This generalization from points (Δ = 0) is motivated by the analysis of incomplete data, a pervasive challenge in statistics: incomplete data objects in R~d can be modeled as affine subspaces. We give three algorithmic results for different values of k, under the assumption that all subspaces are axis-parallel, the main case of interest because of the correspondence to missing entries in data tables. 1) k = 1: Two polynomial time approximation schemes which runs in poly(A, 1/?)nd. 2) k = 2: O(Δ~(1/4))-approximation algorithm which runs in poly(n, d, Δ) 3) General k: Polynomial time approximation scheme which runs in 2~(O (Δk log k (1+1/?~2)))nd We also prove nearly matching hardness results; in both the general (not necessarily axis-parallel) case (for k ≥ 2) and in the axis-parallel case (for k ≥ 3), the running time of an approximation algorithm with any approximation ratio cannot be polynomial in even one of k and Δ, unless P = NP. Furthermore, assuming that the 3-SAT problem cannot be solved subexponentially, the dependence on both k and Δ must be exponential in the general case (in the axis-parallel case, only the dependence on k drops to 2~(Ω(k))). The simplicity of the first and the third algorithm suggests that they might be actually used in statistical applications. The second algorithm, which demonstrates a theoretical gap between the axis-parallel and general case for k = 2, displays a strong connection between geometric clustering and classical coloring problems on graphs and hypergraphs, via a new Helly-type theorem.

关键词： Hardness and algorithms famous κ-center axis-parallel case Subspace Potassium Affine In-law Approximation algorithms algorithms Soundness hardness Polynomial time approximation PS-K

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共162页 << < 152 153 154 155 156 157 158 159 160 161 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：