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A semi-automatic surface reconstruction framework based on T-Surfaces and isosurface extraction methods

A semi-automatic surface reconstruction framework based on T...

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Brazilian symposium on Computer Graphics and Image Processing (SIBGRAPI)

作者： E. Strauss W. Jimenez G. Giraldi R. Silva A.A.F. Oliveira LCG-Computer Graphics Laboratory UFRJ-COPPE Rio de Janeiro Brazil National Laboratory of Scientific Computing (LNCC) Rio de Janeiro Brazil

In this paper we present a new approach which integrates the T-surfaces model and isosurface generation methods in a general framework for surface reconstruction in 3D medical images. T-surfaces is a deformable model based on a triangulation of the image domain, a discrete surface model and an image threshold. Two types of isosurface generation methods are considered: the continuation ones and the marching ones. The former is useful during the reparameterization of T-surfaces while the later is suitable to initialize the model closer the boundary. Specifically, in a first stage, the T-surfaces grid and the threshold are used to define a coarser image resolution. This field is thresholded to get a 0-1 function which is processed by a marching method to generate polygonal surfaces whose interior may contain the desired objects. If a polygonal surface involves more than one object, then the resolution is increased in that region and the marching applied again. Next, we apply T-surfaces to improved the result. If the obtained topology remains incorrect, we enable the user to modify the topology by an interactive method based on the T-surfaces framework. Finally, we demonstrate the utility of diffusion methods for our approach.

关键词： Surface reconstruction Isosurfaces Deformable models Image reconstruction Image resolution Topology Laboratories Biomedical imaging Scientific computing Graphics

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From dual-cube to metacube: efficient low-degree alternatives to hypercube

From dual-cube to metacube: efficient low-degree alternative...

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International Conference on Cyberworlds

作者： Yamin Li Shietung Peng Wanming Chu Department of Computer Science Hosei University Tokyo Japan Department of Computer Hardware University of Aizu Wakamatsu Japan

The hypercube has been widely used as the interconnection network in parallel computers. However, when dealing with the parallel computers of very large scale, the port limitation due to the technology greatly forbid the use of hypercube networks. The hypercube-based SGI Origin2000, a newly developed multiprocessor system, tried to solve this problem by introducing a Cray router. In this paper we first describe a hypercube-like network, called dual-cube, that was motivated by the structure of Origin2000. A dual-cube DC(m) has m+1 links per node where m is the degree of a cluster (m-cube), one more link is used for connecting to a node in another cluster. The dual-cube mitigates the problem of port limitation in the large-scale hypercube network while keeps most of the topological properties of the hypercube network. Then, we describe an interconnection network that extends dual-cube into a more general network called metacube. The metacube has a two-level cube structure with two parameters representing the dimensions of the two-level cubes. Metacube is much more flexible than dual-cube and can solve the port limitation problem completely. The dual-cube and metacube networks can be applied to SGI Origin2000 to connect large number of processors without using Cray router.

关键词： Hypercubes Concurrent computing Multiprocessor interconnection networks Computer networks Large-scale systems Computer science Hardware Joining processes Algorithm design and analysis Routing

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Extending the viability of I/sub DDQ/ testing in the deep submicron era

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IEEE International symposium on Quality Electronic Design

作者： Y. Tsiatouhas Th. Haniotakis D. Nicolos A. Arapoyanni Advanced Silicon Solutions Division I. S. D. S. A Athens Greece Department of Electrical & Computer Engineering Southem Illinois University Carbondale IL USA Department of Computer Engineering and Informatics University of Patras Rio-Patras Greece Department of Informatics & Telecommunications University of Athens (NKUA) Athens Greece

ISBN: (纸本)0769515614

I/sub DDQ/ testing has become a widely accepted defect detection technique in CMOS ICs. However, its effectiveness in deep submicron is threatened by the increased transistor sub-threshold leakage current. In this paper, a new I/sub DDQ/ testing scheme is proposed. This scheme is based on the elimination, during I/sub DDQ/ testing, of the normal leakage current from the sensing node of the circuit under test so that already known in the open literature I/sub DDQ/ sensing techniques can be applied in deep submicron.

关键词： Circuit testing Leakage current Threshold voltage Temperature dependence CMOS technology Telecommunication computing Informatics Power supplies Current measurement Silicon

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Evaluating NN and HMM classifiers for handwritten word recognition

Evaluating NN and HMM classifiers for handwritten word recog...

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Brazilian symposium on Computer Graphics and Image Processing (SIBGRAPI)

作者： J.J. De Oliveira Junior J.M. De Carvalho C.O.D.A. Freitas R. Sabourin Department of Electrical Engineering UFCG - Federal University of Campina Grande Campina Grande PB Brazil Rua Imaculada Conceição 1155 PUCPR - Pontíficia Universidade Católica do Paraná Curitiba PR Brazil ÉTS - École de Technologie Supérieure Montreal QC Canada

This paper evaluates NN and HMM classifiers applied to the handwritten word recognition problem. The goal is analyse the individual and combined performance of these classifiers. They are evaluated considering two different combination strategies and the experiments are performed with the same database and similar feature sets. The strategy proposed takes advantage of the different but complementary mechanisms of NN and HMM to obtain a more efficient hybrid classifier. The recognition rates obtained vary from 75.9% using the HMM classifier alone to 90.4% considering the NN and HMM combination.

关键词： Neural networks Hidden Markov models Handwriting recognition Performance analysis Writing Character recognition Performance evaluation Spatial databases Concurrent computing Hardware

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Performance models for computer and telecommunications systems: maximizing the benefits

Performance models for computer and telecommunications syste...

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International symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)

作者： C.U. Smith Performance Engineering Services Santa Fe NM USA

Summary form only given. Telecommunications systems were among the first to use modeling and analysis to improve designs. Since those early days, researchers have made many advances in the technology and tools. Performance models have been successfully applied to a variety of other computer systems design problems. When we consider the current state of the art and state of the practice, are we satisfied with the results? What areas need improvement? We explore these questions by first considering some of the important research issues of the past. Which have been resolved and which need further work? Have advances in technology mitigated some of the issues while exacerbating others? Next we consider the proactive application of performance models during system design to resolve problems before they occur. How extensive is this practice? How successful is it? What are the barriers to more widespread use and what can we do about it?.

关键词： Telecommunication computing Technology transfer Design engineering Iron Performance analysis System analysis and design Research and development Educational institutions Computational modeling Analytical models

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Energy efficient and robust reservoir computing system using ultrathin (3.5 nm) ferroelectric tunneling junctions for temporal data learning 41

Energy efficient and robust reservoir computing system using...

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41st symposium on VLSI Technology, VLSI Technology 2021

作者： Yu, Jie Li, Yi Sun, Wenxuan Zhang, Woyu Gao, Zhaomeng Dong, Danian Yu, Zhaoan Zhao, Yulin Lai, Jinru Ding, Qingting Luo, Qing Dou, Chunmeng Zuo, Qingyun Zhao, Yuhang Chen, Shoumian Zou, Rong Chen, Haoyu Wang, Qiwei Lv, Hangbing Xu, Xiaoxin Shang, Dashan Liu, Ming Key Laboratory of Microelectronics Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences China Shanghai IC R&D Center China Shanghai Huali Microelectronics Corporation China

ISBN: (纸本)9784863487802

Reservoir computing (RC) can compute temporal data with low training cost. To enhance data processing capability, high dimensionality of reservoir is required, which poses a significant challenge on RC hardware implementation using Si-friendly devices. In this work, for the first time, we use ultra-thin (3.5 nm) ferroelectric tunneling junctions (FTJs) with transient depolarization property as physical nonlinear virtual nodes to address this challenge. By constructing an FTJ-based dynamic reservoir and combining it with RRAM-based binarized readout layer, the high energy efficiency (35 pJ), processing speed (500 ns), and recognition accuracy (92.3%) have been demonstrated for digital sequence classification. © 2021 JSAP

关键词： Depolarization

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Simulation as an alternative to codified risk-based engineering design

Simulation as an alternative to codified risk-based engineer...

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International symposium on Uncertainty Modeling and Analysis (ISUMA)

作者： P. Marek A. Haldar Institute of Theoretical and Applied Mechanics Academy of Sciences슠of the슠Czech Republic Prague Czech Republic Department of Civil Engineering and Engineering Mechanics University of Arizona Tucson AZ USA

The engineering profession has accepted the risk-based design in the form of Load and Resistance Factors design (LRFD) concept. However, a large number of practicing engineers do not use it in everyday design. Lack of education may be a reason for this avoidance. Another major complaint is that the current LRFD-based codified approach cannot estimate the reliability of real structures. Simulation could be an attractive alternative considering the recent significant improvement in computational power. However, the question remains whether the simulation-based design concept is mature enough to be considered as an alternative to the currently available codified approach. An international community of scholars, scientists, practicing engineers, and students met in a colloquium in the summer of 2002 in Prague, Czech Republic, to evaluate the role of simulation in engineering design. Their comments, observations, and recommendations are summarized here to help generate more interest on the subject

关键词： Design engineering Uncertainty Guidelines Reliability engineering Power engineering and energy Computational modeling Civil engineering Engineering profession Power engineering computing Process design

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Asynchronous MMC based parallel SA schemes for multiobjective standard cell placement

Asynchronous MMC based parallel SA schemes for multiobjectiv...

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IEEE International symposium on Circuits and Systems (ISCAS)

作者： S.M. Sait A. Mustafa Zaidi M. Imran Ali College of Computer Sciences & Engineering King Fahd University of Petroleum and Minerals Dhahran Saudi Arabia

Simulated annealing (SA) is a popular iterative heuristic used to solve a wide variety of combinatorial optimization problems. However, depending on the size of the problem, it may have large run-time requirements. One practical approach to speed up its execution is to parallelize it. In this paper we develop parallel SA schemes based on the asynchronous multiple-Markov chain model (AMMC) described in S.-Y. Lee and K. G. Lee (1996) and applied to standard-cell placement as presented in J. Chandy et al. (1997), The schemes are applied to solve the multi-objective standard cell placement problem using an inexpensive cluster-of-workstations environment. This problem requires the optimization of conflicting objectives (interconnect wire-length, power dissipation, and timing performance), and fuzzy logic is used to integrate the costs of these objectives stated in J.A. Khan et al. (2002) and S. M. Sait and H. Youssef (2001). Experiments are performed on ISCAS-85/89 benchmark circuits. Our goal is to develop parallel SA schemes that provide significantly improved runtime/solution quality characteristics for this key CAD problem, by making the best possible use of an inexpensive parallel environment

关键词： Simulated annealing Runtime Cost function Very large scale integration Concurrent computing Computational modeling Integrated circuit interconnections Timing Fuzzy logic Switches

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Speculative dynamic vectorization

Speculative dynamic vectorization

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Annual International symposium on Computer Architecture, ISCA

作者： A. Pajuelo A. Gonzalez M. Valero Departament d'Arquitectura de Computadors Universitat Poliltècnica de Catalunya Barcelona Spain

Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also present in irregular or pointer-rich codes, for which the compiler is quite limited to discover it. In this paper we propose a microarchitecture extension in order to exploit SIMD parallelism in a speculative way. The idea is to predict when certain operations are likely to be vectorizable, based on some previous history information. In this case, these scalar instructions are executed in a vector mode. These vector instructions operate on several elements (vector operands) that are anticipated to be their input operands and produce a number of outputs that are stored on a vector register in order to be used by further instructions. Verification of the correctness of the applied vectorization eventually changes the status of a given vector element from speculative to non-speculative, or alternatively, generates a recovery action in case of misspeculation. The proposed microarchitecture extension applied to a 4-way issue superscalar processor with one wide bus is 19% faster than the,same processor with 4 scalar buses to Ll data cache. This speed up is due basically to 1) the reduction in number of memory accesses, 15% for SpecInt and 20% for SpecFP, 2) the transformation of scalar arithmetic instructions into their vector counterpart, 28% for SpecInt and 23% for SpecFP, and 3) the exploitation of control independence for mispredicted branches.

关键词： Parallel processing Streaming media Computer architecture Microarchitecture History Arithmetic Program processors Programming profession Instruction sets Concurrent computing

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Asynchronous resource discovery in peer to peer networks

Asynchronous resource discovery in peer to peer networks

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Reliable Distributed Systems

作者： S. Kutten D. Peleg Faculty of Industrial Engineering & Management Technion-Israel Institute of Technology Haifa Israel Department of Computer Science and Applied Math Weizmann Institute of Science Rehovot Israel

The resource discovery problem arises in the context of peer to peer (P2P) networks, where at any point of time a peer may be placed at or removed from any location over a general purpose network (e.g., an Internet site). A vertex (peer) can communicate with another vertex directly if and only if it knows a certain routing information to that other vertex. Hence, it is critical for peers to convey this routing information to each other. The problem was formalized by Harchol-Balter et al. (1999). The routing information needed for a vertex to reach another peer is that peer's identifier (e.g., IP address). A logical directed edge represents the fact that the peer at the tail of the edge knows the IP address of the one at its head. A number of algorithms were developed by Harchol-Balter et al. for this problem in the model of a synchronous network over a weakly connected directed graph. The best of these algorithms was randomized. Subsequently, a deterministic algorithm for the problem on synchronous networks with improved complexity was presented by Kutten et al. (2001). The current paper extends this deterministic algorithm to the environment of asynchronous networks, maintaining similar complexities (translated to the asynchronous model). These are lower than the complexities that would be needed to synchronize the system. The main technical difficulty in a directed, weakly connected system is to ensure that vertices take consistent steps, even if their knowledge about each other is not symmetric, and even if there is no timeout mechanism (which does exist in synchronous systems) to assist in that.

关键词： Intelligent networks Routing Web server IP networks Context Tail Peer to peer computing Internet Computer industry Computer network management

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