In recent years, with the explosive adoption of smart phone devices, mobile health and fitness applications have been increasingly used by healthcare practitioners and the general public to manage electronic health re...
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With the SIMT execution model, GPUs can hide memory latency through massive multithreading for many applications that have regular memory access patterns. To support applications with irregular memory access patterns,...
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ISBN:
(纸本)9781479969982
With the SIMT execution model, GPUs can hide memory latency through massive multithreading for many applications that have regular memory access patterns. To support applications with irregular memory access patterns, cache hierarchies have been introduced to GPU architectures to capture temporal and spatial locality and mitigate the effect of irregular accesses. However, GPU caches exhibit poor efficiency due to the mismatch of the throughput-oriented execution model and its cache hierarchy design, which limits system performance and energy-efficiency. The massive amount of memory requests generated by GPUs cause cache contention and resource congestion. Existing CPU cache management policies that are designed for multicore systems, can be suboptimal when directly applied to GPU caches. We propose a specialized cache management policy for GPGPUs. The cache hierarchy is protected from contention by the bypass policy based on reuse distance. Contention and resource congestion are detected at runtime. To avoid over-saturating on-chip resources, the bypass policy is coordinated with warp throttling to dynamically control the active number of warps. We also propose a simple predictor to dynamically estimate the optimal number of active warps that can take full advantage of the cache space and on-chip resources. Experimental results show that cache efficiency is significantly improved and on-chip resources are better utilized for cache-sensitive benchmarks. This results in a harmonic mean IPC improvement of 74% and 17% (maximum 661% and 44% IPC improvement), compared to the baseline GPU architecture and optimal static warp throttling, respectively.
Research in visuo-motor coupling has shown that the matching of visual and proprioceptive information is important for calibrating movement. Many state-of-the art virtual reality (VR) systems, commonly known as immers...
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The Schelling segregation model attempts to explain possible causes of racial segregation in cities. Schelling considered residents of two types, where everyone prefers that the majority of his or her neighbors are of...
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Even though production is an integral part of the Arrow- Debreu market model, most of the work in theoretical computer science has so far concentrated on markets without production, i.e., the exchange economy. This pa...
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Human behavior is one kind of complicated phenomena. Comprehensive and profound understanding of their behavioral characteristics has been the direction of the tireless efforts of people. In recent years, studies have...
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In January 2004, we organized the second SIGCSE Committee ("Expanding the Women-in-computing Community"). Our annual Town Meeting provides dissemination of information concerning successful gender issues pro...
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ISBN:
(纸本)9781450326056
In January 2004, we organized the second SIGCSE Committee ("Expanding the Women-in-computing Community"). Our annual Town Meeting provides dissemination of information concerning successful gender issues projects, along with group discussion and brainstorming, in order to create committee goals for the coming year. We select projects to highlight through listserv communication and through our connections with NCWIT, ABI, acm-W, CRA-W, etc. This year we will highlight acm-W Chapters and acm-W Celebrations of Women in computing.
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