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检索条件"任意字段=Architecture and Algorithms for Digital Image Processing."
4598 条 记 录,以下是4261-4270 订阅
BINARY image ALGEBRA AND digital OPTICAL CELLULAR image PROCESSORS.
BINARY IMAGE ALGEBRA AND DIGITAL OPTICAL CELLULAR IMAGE PROC...
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Topical Meeting on Optical Computing, Summaries of Papers Presented. Technical Digest Series v 11.
作者: Huang, K.S. Jenkins, B.K. Sawchuk, A.A. Univ of Southern California Los Angeles CA USA Univ of Southern California Los Angeles CA USA
image processing.and image analysis tasks have large data processing.requirements and inherent parallelism and are well suited to implementation on digital optical processors because of the parallelism and free interc... 详细信息
来源: 评论
METHODS OF HANDLING AND processing.imageRY.
METHODS OF HANDLING AND PROCESSING IMAGERY.
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Methods of Handling and processing.imagery.
This conference proceedings contains 20 articles on current developments in the field of image processing. Among the topics covered are: Data compression;digital signal processing.Freeze-flame coder;algorithms and ana... 详细信息
来源: 评论
VLSI IMPLEMENTATION OF PPPE FOR REAL - TIME image processing.IN RADON SPACE - WORK IN PROGRESS.
VLSI IMPLEMENTATION OF PPPE FOR REAL - TIME IMAGE PROCESSING...
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Proceedings - 1987 Workshop on Computer architecture for Pattern Analysis and Machine Intelligence: CAPAMI '87.
作者: Baringer, W.B. Richards, B.C. Brodersen, R.W. Sanz, J. Petkovic, D. Univ of California Berkeley CA USA Univ of California Berkeley CA USA
Custom VLSI circuits that perform real-time Radon transformations of image data in a parallel pipelined architecture are presented. They will allow real-time operation of projection-based algorithms by reducing image ... 详细信息
来源: 评论
SPLIT CONTROL STORE VLSI FOR 32 KBPS ADPCM TRANSCODING.
SPLIT CONTROL STORE VLSI FOR 32 KBPS ADPCM TRANSCODING.
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Proceedings - ICASSP 87, 1987 International Conference on Acoustics, Speech, and Signal processing.
作者: Bonet, Luis Williams, Tim A. Motorola Inc Austin TX USA Motorola Inc Austin TX USA
The architecture used in a 16-pin CMOS VLSI digital signal processor (DSP) that was designed by the authors to perform both ANSI and CCITT versions of the adaptive digital pulse code modulation standard is described. ... 详细信息
来源: 评论
Industrial image processing.system allows parallel computing on sensor data
Industrial image processing system allows parallel computing...
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Advances in image processing.1987
作者: Bermbach, Rainer Scharfenberg, Harald HEIMANN GMBH Abt. Bi1dverarbeitung P. O. Box 3007 WiesbadenD-6200 Germany
ZSA, an industrial image processing.system is characterized by a modern parallel architecture for digital signal processing. Besides the use of standard video cameras the system is strongly intended to be used with on... 详细信息
来源: 评论
HIGH SPEED 1-D FIR digital FILTERING architectureS USING POLYNOMIAL CONVOLUTION.
HIGH SPEED 1-D FIR DIGITAL FILTERING ARCHITECTURES USING POL...
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Proceedings - ICASSP 87, 1987 International Conference on Acoustics, Speech, and Signal processing.
作者: Kwan, H.K. Tsim, M.T. Univ of Hong Kong Hong Kong Univ of Hong Kong Hong Kong
Two sets of one-dimensional (1-D) FIR digital filtering architectures are proposed to reduce computational complexity and to increase throughput rate. Each architecture is regular in structure with a high degree of pa... 详细信息
来源: 评论
HIGH LEVEL PARALLEL-PIPELINED NETWORK architecture FOR ADAPTIVE SIGNAL processing.
HIGH LEVEL PARALLEL-PIPELINED NETWORK ARCHITECTURE FOR ADAPT...
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Proceedings of the 26th IEEE Conference on Decision and Control.
作者: Huang, Y.F. Liu, R.W. Univ of Notre Dame IN USA Univ of Notre Dame IN USA
The authors investigate a recently developed modular recursive estimation (MRE) algorithm using discrete-event models (DEM). A concurrent, pipelined adaptive-signal-processing.architecture based on parallel networking... 详细信息
来源: 评论
SHARED MEMORY algorithms AND THE MEDIAL AXIS TRANSFORM.
SHARED MEMORY ALGORITHMS AND THE MEDIAL AXIS TRANSFORM.
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Proceedings - 1987 Workshop on Computer architecture for Pattern Analysis and Machine Intelligence: CAPAMI '87.
作者: Chandran, Sharat Mount, David Univ of Maryland College Park MD USA Univ of Maryland College Park MD USA
The medial axis transform represents a region of a digital image as the union of maximal upright squares contained in the region. The authors present algorithms to compute the perimeter and area of the region covered ... 详细信息
来源: 评论
GENERAL PURPOSE VLSI ARRAY FOR EFFICIENT SIGNAL AND image processing.
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Proc Int Conf Parallel Process 1987
作者: Sastry, Sarma Kumar, V.K.Prasanna Univ of Southern California Los Angeles CA USA Univ of Southern California Los Angeles CA USA
Efficient parallel algorithms for implementation on a VLSI array are derived for several signal-processing.tasks. The parallel architecture has n**2 memory modules storing the input data, which is accessed by n PEs (p... 详细信息
来源: 评论
RECONFIGURABLE BINARY/RNS/LNS architecture FOR DSP.
RECONFIGURABLE BINARY/RNS/LNS ARCHITECTURE FOR DSP.
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Proceedings - ICASSP 87, 1987 International Conference on Acoustics, Speech, and Signal processing.
作者: Taylor, Fred J. Univ of Florida Gainesville FL USA Univ of Florida Gainesville FL USA
An integrated digital signal processing.(DSP) machine will accept data from a plethora of sensors and/or subsystems which may be running at different speeds and with different precision/dynamic range metrics. Data wou... 详细信息
来源: 评论