An architecture for the parallel implementation of the Walsh-Hadamard transform of images is presented. The transformation procedure is performed progressively by adjusting to the various hierarchies of nodes of the q...
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ISBN:
(纸本)0444876952
An architecture for the parallel implementation of the Walsh-Hadamard transform of images is presented. The transformation procedure is performed progressively by adjusting to the various hierarchies of nodes of the quad-tree which is associated with the processed picture, according to the Regular Decomposition procedure. The architecture of the proposed machine is based on the data-driven model of computation in which an operation is executed when its operands are available. The specific requirements of the imageprocessing.algorithms have been taken into account, principally the efficient handling of array data-structures. The tagged-token method supports recursive operations and helps for better exploiting the inherent parallelism of the transformation algorithm.
The choice of an appropriate architecture for parallel imageprocessing.can have a large impact on the efficiency and the ease of implementation of vision algorithms. A shared-memory MIMD architecture may be effective...
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ISBN:
(纸本)0818606622
The choice of an appropriate architecture for parallel imageprocessing.can have a large impact on the efficiency and the ease of implementation of vision algorithms. A shared-memory MIMD architecture may be effective for higher-level algorithms that require nonlocal communication between image elements. In such a machine, processor allocation and synchronization are key issues. Techniques are presented for allocation and synchronization of processors in the New York University Ultracomputer, using the fetch-and-add primitive. This scheme is applied to implement a parallel connected-component algorithm. It is concluded that the method allows a high degree of parallelism with relative ease of programming.
A pyramid processor is a natural extension of an array processor that is useful for various image-understanding algorithms. An implementation for a pyramid processor that uses a single array of reconfigurable processi...
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ISBN:
(纸本)0818606622
A pyramid processor is a natural extension of an array processor that is useful for various image-understanding algorithms. An implementation for a pyramid processor that uses a single array of reconfigurable processing.elements is described. By allowing this array to be configured to represent different layers of the pyramid structure, more processing.power can be applied to the upper layers than in conventional designs. Such a design can increase the performance of the pyramid processor for algorithms that cannot take advantage of the parallelism of layers. Modifications of the basic design provide tradeoffs in performance and complexity. Layer parallelism can be recovered, for example, by using multiple reconfigurable arrays.
A dedicated architecture is described that efficiently implements arbitrary geometric transforms on discretized image data by using a novel decomposition and significant computation parallelism and pipelining. No assu...
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ISBN:
(纸本)0818606622
A dedicated architecture is described that efficiently implements arbitrary geometric transforms on discretized image data by using a novel decomposition and significant computation parallelism and pipelining. No assumptions as to the underlying statistical nature of the image data are used. This forces a design that yields a constant and predictable overall transform execution time. It is asserted the resultant intelligent memory subsystem may be the key to eventual real-time implementation of many essential automated vision, imageprocessing. and computer graphics algorithms.
A description is given of the MIDAS Project, which provides an adaptive environment in which communication paths, control structures, and memory access requirements may easily be tailored to the needs of a specific pr...
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ISBN:
(纸本)0818606371
A description is given of the MIDAS Project, which provides an adaptive environment in which communication paths, control structures, and memory access requirements may easily be tailored to the needs of a specific problem. It has been used to investigate the performance of different methods of decomposing various problems and algorithms in a multiprocessor environment. The results of such tests on a variety of applications such as scientific data analysis, Monte Carlo calculations, imageprocessing. and finite-element methods in solving partial differential equations are briefly discussed. Because of the strong correlation between architecture, problems and performance in parallel systems, it is extremely important to understand the computational requirements of a wide variety of different types of applications. To effectively use highly parallel systems in a general environment, the architecture must be flexible and capable of adapting to specific application requirements. Different control and communication mechanisms may, for example, be required to facilitate load balancing of problems and to minimize performance bottlenecks. Based on the analyzed performance of applications on the current system, the feasibility of extending this two-level pyramidal structure (consisting of 1 cluster and 11 processors) to three levels (involving 8 clusters and 137 processors) is examined. The problem decomposition techniques, which have proved effective on the current system, and the adaptability of the architecture are easily extended to the larger system. Further extension of the architecture to four levels supporting over 1000 processors is also briefly outlined.
The authors present an architectural model for a large-scale multiprocessor system expected to be highly efficient for a large class of image understanding algorithms. Key features include concentration of processing....
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ISBN:
(纸本)0818606622
The authors present an architectural model for a large-scale multiprocessor system expected to be highly efficient for a large class of image understanding algorithms. Key features include concentration of processing.power in clusters of processing.elements, distribution of control functions over a hierarchy of controllers, provision for execution of imageprocessing.operations on several processor configurations (e. g. , pipeline, linear systolic arrays, trees, shuffle-exchanges, etc. ), integration of limited data-driven computation within a primarily control flow mechanism, block-level control and data flow, decentralization of memory management functions, and simple load balancing and scheduling methods.
On a mesh-connected computer, moving data across the mesh is the most time-consuming operation in many algorithms. This time can be reduced by using a mesh with smaller diameter, that is with fewer processing.elements...
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ISBN:
(纸本)0818606371
On a mesh-connected computer, moving data across the mesh is the most time-consuming operation in many algorithms. This time can be reduced by using a mesh with smaller diameter, that is with fewer processing.elements. To accomodate inputs of the same size, this requires that the processors have more memory. For image-processing.and graph-theoretic algorithms an analysis is made of the time as a function of the mesh diameter and problem size. It is shown that for many problems, smaller diameters can yield faster algorithms, and that there is a choice of diameter that is simultaneously best for several of these problems. Further, for these problems and this number of processing.elements (or any smaller number), the mesh is an optimal interconnection scheme.
The authors discuss the design of a large-scale content addressable array parallel processor (CAAPP) for computer vision. This new architecture combines associative processing.with global broadcast and response to and...
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ISBN:
(纸本)0818606339
The authors discuss the design of a large-scale content addressable array parallel processor (CAAPP) for computer vision. This new architecture combines associative processing.with global broadcast and response to and from an array of cells, and array processing.via local cellular square neighborhood computation. These capabilities of the CAAPP allow for feedback between high-level and low-level processing.and also support communication between different representations of an image. CAAPP algorithms are developed for mapping the signal level (iconic) pixel-based representation of an image into a symbolic intermediate-level representation for higher level vision processing. This aids in understanding the various computational tradeoffs involved in programming such highly parallel devices.
A new algorithm for obtaining the convex deficiency of an arbitrary 8-connected digital figure in linear time and space is presented. It is shown that the boundary of a digital figure is a closed polygonal curve that ...
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ISBN:
(纸本)0818606193
A new algorithm for obtaining the convex deficiency of an arbitrary 8-connected digital figure in linear time and space is presented. It is shown that the boundary of a digital figure is a closed polygonal curve that belongs to a family of ordered crossing polygons. This family of polygons are best described as polygons such that no interior points lie to the left as the boundary is traversed in the clockwise direction, with no restriction on the possible occurrence of overlapping sides and collinear vertices. A formal proof of correctness is included, and a convex hull invariant condition is introduced. A comparative evaluation of the convex hull algorithm presented here with reference to other algorithms that have appeared in the recent literature is also included.
A class of processors which perform local neighborhood or cellular operations has well-documented applications in imageprocessing. The architectural feature which unites these processors is their use of special-purpo...
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