A study is made of a non-smooth optimization problem arising in adaptive-optics, which involves the real-time control of a deformable mirror designed to compensate for atmospheric turbulence and other dynamic image de...
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ISBN:
(纸本)0819429163
A study is made of a non-smooth optimization problem arising in adaptive-optics, which involves the real-time control of a deformable mirror designed to compensate for atmospheric turbulence and other dynamic image degradation factors. One formulation of this problem yields a functional f(U) = Sigma(i=1)(n) max(j){((UMjU)-M-T)(ii)} to be maximized over orthogonal matrices U for a fixed collection of n x n symmetric matrices Mj. We consider first the situation which can arise in practical applications where the matrices M-j are "nearly" pairwise commutative. Besides giving useful bounds, results for this case lead to a simple corollary providing a theoretical closed-form solution for globally maximizing f if the Mj are simultaneously diagonalizable. However, even here conventional optimization methods for maximizing f are not practical in a real-time environment. The general optimization problem is quite difficult and is approached using a heuristic Jacobi-like algorithm. Numerical tests indicate that the algorithm provides an effective means to optimize performance for some important adaptive-optics systems.
This paper presents a novel image encryption algorithm that leverages the chaotic properties of the Chen system, the cryptographic strength of OpenSSL, and the mathematical robustness of the Fibonacci Q-Matrix. The pr...
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This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's architecture has been implemented and tested using an ACE16k chip and a Xilinx xc4028xl ...
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ISBN:
(纸本)0819458325
This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's architecture has been implemented and tested using an ACE16k chip and a Xilinx xc4028xl FPGA. The ACE16k chip consists basically of an array of 128x128 identical mixed-signal processing units, locally interacting, which operate in accordance with single instruction multiple data (SIMD) computing architectures and has been designed for high speed image pre-processing tasks requiring moderate accuracy levels (7 bits). The input images are acquired using the optical input capabilities of the ACE16k chip, and after being processed according to a programmed algorithm, the images are represented at real time on a TFT screen. The system is designed to store and run different algorithms and to allow changes and improvements. Its main board includes a digital core, implemented on a Xilinx 4028 Series FPGA, which comprises a custom programmable Control Unit, a digital monochrome PAL video generator and an image memory selector. Video SRAM chips are included to store and access images processed by the ACE16k. Two daughter boards hold the program SRAM and a video DAC-mixer card is used to generate composite analog video signal.
This paper presents a new implementation of a 2D wavelet transform in a VLSI circuit, for real-time digital signal processing. The parallel algorithm of the 2D wavelet transform (2D-WT) used for designing and implemen...
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ISBN:
(纸本)0780365429
This paper presents a new implementation of a 2D wavelet transform in a VLSI circuit, for real-time digital signal processing. The parallel algorithm of the 2D wavelet transform (2D-WT) used for designing and implementing this new architecture enhances the performance of computations. The proposed multi-elementary processor architecture of 2D-WT yields a very flexible hardware configuration. This approach offers a high processing speed, relative to other methods, for providing the wavelet coefficients. The 2D-WT is a powerful tool for several applications, the most important one being imageprocessing.
DSPs with dual memory banks offer high memory bandwidth, which is required for high-performance applications. However, such DSP architectures pose problems for C compilers, which are mostly not capable of partitioning...
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ISBN:
(纸本)0780370414
DSPs with dual memory banks offer high memory bandwidth, which is required for high-performance applications. However, such DSP architectures pose problems for C compilers, which are mostly not capable of partitioning program variables between memory banks. As a consequence, time-consuming assembly programming is required for an efficient coding of time-critical algorithms. This paper presents a new technique for automatic variable partitioning between memory banks in compilers, which leads to a higher utilization of available memory bandwidth in the generated machine code. We present experimental results obtained by integrating the proposed technique into an existing C compiler for the AMS Gepard, an industrial DSP core.
Up-to-date medical imageprocessing is currently based on very sophisticated algorithms that often require a large computational load not always available on conventional workstations. Moreover, algorithms are in cont...
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Because it is nearly impossible with todays technology to make a processor which is optimised for all possible imageprocessing tasks one tries to realize different processors each of them being a compromise between t...
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Vector rotation is the key operation employed extensively in many digital signal processing applications. In this paper, we introduce a new design concept called Angle Quantization (AQ). It can be used as a design ind...
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ISBN:
(纸本)0780370414
Vector rotation is the key operation employed extensively in many digital signal processing applications. In this paper, we introduce a new design concept called Angle Quantization (AQ). It can be used as a design index for vector rotational operation, where the rotational angle is known in advance. Based on the AQ process, we establish a unified design framework for cost-effective low-latency rotational algorithms and architectures. Several existing works, such as conventional CORDIC, AR-CORDIC, MVR-CORDIC, and EEAS-based CORDIC, can be fitted into the design framework, forming a Vector Rotational CORDIC Family. Based on the new design framework, we can realize high-speed / low-complexity rotational VLSI circuits, whereas without degrading the precision performance in fixed-point implementations.
The paper discusses the features of solving a class of problems for pattern recognition using the STM-32 microcontroller. The problem of pattern recognition can be solved on neural networks of different architectures,...
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Recently there has been a lot of interest in improving the infrastructure used in medical applications. In particular, there is renewed interest on non-invasive, high-resolution diagnostic methods. One such method is ...
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Recently there has been a lot of interest in improving the infrastructure used in medical applications. In particular, there is renewed interest on non-invasive, high-resolution diagnostic methods. One such method is digital, 3D ultrasound medical imaging. Current state-of-the-art ultrasound systems use specialized hardware for performing advanced processing of input data to improve the quality of the generated images. Such systems are limited in their capabilities by the underlying computing architecture and they tend to be expensive due to the specialized nature of the solutions they employ. Our goal in this work is twofold: (i) To understand the behavior of this class of emerging medical applications in order to provide an efficient parallel implementation and (ii) to introduce a new benchmark for parallel computer architectures from a novel and important class of applications. We address the limitations faced by modern ultrasound systems by investigating how all processing required by advanced beamforming algorithms can be performed on modern clusters of high-end PCs connected with low-latency, high-bandwidth system area networks. We investigate the computational characteristics of a state-of-the-art algorithm and demonstrate that today's commodity architectures are capable of providing almost-real-time performance without compromising image quality significantly.
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