A broadband, active doubler based on asymmetrically biased differential pairs delivers conversion gain (CG) from DC to 100GHz. Measured CG is >10dB up to 50GHz, >6dB up to 80GHz, and >0dB up to 100GHz. Second...
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ISBN:
(纸本)9781479972302
A broadband, active doubler based on asymmetrically biased differential pairs delivers conversion gain (CG) from DC to 100GHz. Measured CG is >10dB up to 50GHz, >6dB up to 80GHz, and >0dB up to 100GHz. Second-harmonic (4x the input) suppression is -28dBc at 50GHz. Implemented in a 90nm SiGe technology, the 0.371mm(2) multiplier core consumes 25mA from a 4.5V supply.
IBM first qualified a 0.35 mu m generation 1000 Omega-cm high resistivity substrate (HiRES) SiGe bicmostechnology in 2011. This technology was optimized for WiFi and cellular NPN power amplifier (PA), NPN low noise a...
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ISBN:
(纸本)9781479972302
IBM first qualified a 0.35 mu m generation 1000 Omega-cm high resistivity substrate (HiRES) SiGe bicmostechnology in 2011. This technology was optimized for WiFi and cellular NPN power amplifier (PA), NPN low noise amplifier (LNA), and isolated CMOS NFET switch rf front-end-IC (FEIC) integration. It includes an optional through silicon via used as a low inductance ground path for NPN emitters. Data for 50 Omega-cm, 1st generation HiRES, and 2nd generation HiRES NPN PA, LNA, and CMOS NFET switch devices are reviewed.
Waveguide-coupled, Ge lateral pin photodiodes featuring bandwidths of more than 50GHz and 40Gbps functionality are presented. Non-doping implantations are applied that allow one to reach this performance even under th...
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ISBN:
(纸本)9781479972302
Waveguide-coupled, Ge lateral pin photodiodes featuring bandwidths of more than 50GHz and 40Gbps functionality are presented. Non-doping implantations are applied that allow one to reach this performance even under the effect of thermal steps acting when the diodes are integrated in a high-performance bicmos process. The effect of these implants is to lower the minority-carrier lifetime(s) and in this way, to reduce bandwidth degradation by minority-carrier diffusion in non-depleted, weakly doped regions.
This paper presents the design and characterization of a 220-240 GHz four-element Butler matrix beam switching chip. It is realized in 0.13 mu m SiGe bicmostechnology. The chip features four 220 GHz amplifiers with 9...
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This paper presents the design and characterization of a 220-240 GHz four-element Butler matrix beam switching chip. It is realized in 0.13 mu m SiGe bicmostechnology. The chip features four 220 GHz amplifiers with 9 dB of gain followed by the Butler matrix core. A single-pole-four-throw (SP4T) switch is integrated to switch between the different beam directions. Finally an amplifier is used to compensate the losses of the matrix core and the switch. The chip exhibits a 2 dB of insertion loss and draws 104 mA from a 3.3 V supply. It also shows maximum phase error of 15 degrees from the ideal phase states and less than 4 dB rms amplitude variations. The chip occupies 1.5 x 2.4 mm(2) silicon area.
This paper presents the design and measurements of a differential K-band digitally-controlled oscillator (DCO) utilizing a tunable-dielectric resonator structure with an integrated divide-by-16 divider chain for use i...
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ISBN:
(纸本)9781479972302
This paper presents the design and measurements of a differential K-band digitally-controlled oscillator (DCO) utilizing a tunable-dielectric resonator structure with an integrated divide-by-16 divider chain for use in an all-digital phase locked loop. The prototype differential oscillator exhibits 256 digitally-controlled states with the LSB corresponding to similar to 700 kHz of frequency tuning. At a 1 MHz offset, the simulated divider output phase noise is -104 dBc/Hz. The divider chain includes four divide-by-two stages in series for a final division ratio of 16. To our knowledge, this is the first published tunable-dielectric DCO and divider chain integrated onto a single chip and implemented in a SiGe bicmos process.
A 27-36 GHz wide-band phased array TX frontend is demonstrated in a 0.25um SiGe:C bicmos process. The TX front-end presents a saturation power more than 12.5dBm across 9GHz bandwidth. The front-end provides variable p...
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ISBN:
(纸本)9781479972302
A 27-36 GHz wide-band phased array TX frontend is demonstrated in a 0.25um SiGe:C bicmos process. The TX front-end presents a saturation power more than 12.5dBm across 9GHz bandwidth. The front-end provides variable phase shift from 0 degrees similar to 360 degrees with similar to 10 degrees resolution, and the relative phase shift remains constant in the desired band. A 2-bit amplitude resolution is available for advanced beamforming algorithms. The wide-band PA can be applied in saturation mode and in linear mode due to its high linearity with an OIP3 over 21dBm.
This paper analyzes the in-situ S-parameter multiline TRL and the transfer TMR calibration methods for the sensitivity to the thermal variation of electrical characteristics of calibration standards. The standards wer...
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ISBN:
(纸本)9781479972302
This paper analyzes the in-situ S-parameter multiline TRL and the transfer TMR calibration methods for the sensitivity to the thermal variation of electrical characteristics of calibration standards. The standards were realized in IHP's SG13 130 nm SiGe:C bicmos process. The measurement experiment was performed for the frequency range up to 110 GHz. We demonstrate that the calibration error caused by thermal instability of electrical characteristic of standards is in order of magnitude of the system drift error and, thus, negligible.
This paper presents a W-band direct-conversion transmitter front-end implemented in SiGe bicmostechnology. The transmitter consists of an up-conversion mixer, a power amplifier (PA), and all the required on-chip pass...
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ISBN:
(纸本)9781479972302
This paper presents a W-band direct-conversion transmitter front-end implemented in SiGe bicmostechnology. The transmitter consists of an up-conversion mixer, a power amplifier (PA), and all the required on-chip passive matching networks. A differential cascode structure with capacitive neutralization is used in the PA design for improved gain and reverse isolation. W-band on-chip transformers are extensively utilized to realize low-loss and ultra-compact passive matching networks. This design strategy enables the whole transmitter core to fit within a 600 um x 250 um die area. The transmitter achieves +7.2 dBm peak output power and 18 dB conversion gain at 87 GHz, with 73.5 mW total power consumption. Modulation tests with QPSK and 16QA1VI signals (both at 50 MSym/s) were also performed. Average EVM values of 5.9%/6.7% have been achieved at 7 dB output power back-off for QPSK/16QAM signals, respectively.
Peak f(T) of 660GHz is reported for HBT f(T) doubler designs in IBM 90nm SiGe bicmostechnology 9HP. This high performance f(T) doubler utilizes a longer HBT for output stage compared to the input stage HBT (length ra...
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ISBN:
(纸本)9781479972302
Peak f(T) of 660GHz is reported for HBT f(T) doubler designs in IBM 90nm SiGe bicmostechnology 9HP. This high performance f(T) doubler utilizes a longer HBT for output stage compared to the input stage HBT (length ratio 2:1) resulting in improved transconductance and lower thermal resistance. The impact of HBT layout on the circuit performance and trade-off between thermal resistance and f(T) is also investigated. f(T) doubler circuit can be used as a single transistor in several circuit applications like A/D converters and broadband circuits where higher performance is desired.
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