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A bicmos 50 MHz input bandwidth, 1-to-16 channelizer optimized for low power analog signal classification

A BiCMOS 50 MHz input bandwidth, 1-to-16 channelizer optimiz...

引用

bipolar/bicmos circuits and technology meeting

作者： Hao Li Chris M. Thomas Gert Cauwenberghs Lawrence E. Larson Marvell Semiconductor Inc. Santa Clara CA Brown University Providence RI University of California San Diego La Jolla CA

A base-band channelizer, fabricated in a 0.18um bicmos process, capable of separating an input 50 MHz bandwidth signal into 16 output 3.125 MHz bandwidth signals intended for multi-channel independent component analysis (ICA) for signal classification is presented. The channelizer operates in a purely analog fashion to interface with an analog ICA system to optimize energy efficiency. Each channel within the 50 MHz bandwidth is up/down converted using active mixers and is low-pass filtered. Harmonic rejection mixers and clock predistortion techniques are employed in order to eliminate clock harmonic folding. A two-stage, quarter-band separation architecture is employed to split the 50 MHz baseband signal into 16 consecutive channels simultaneously. The measured input signal HD3 and LO 3 rd -order harmonic mixing is below -40 dBc. The measured power consumption is 71.5mW from a 2.5V power supply.

关键词： Power harmonic filters Harmonic analysis Mixers Bandwidth Gain Baseband Pattern classification

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A wide tuning triple-band frequency generator MMIC in 0.18μm SiGe bicmos technology

A wide tuning triple-band frequency generator MMIC in 0.18μ...

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bipolar/bicmos circuits and technology meeting

作者： Hechen Wang Feng Zhao Fa Foster Dai Guofu Niu Bogdan Wilamowski Jun Fu Wei Zhou Yudong Wang Dept. of Electrical and Computer Eng. Auburn University Auburn AL Auburn University Auburn AL US Inst. of Microelectronics Tsinghua University Beijing China

This paper presents a wide-tuning frequency generation scheme based on bottom-series coupled quadrature VCO (QVCO). The low band and middle band frequency signal is generated from the QVCO while the high band signal is obtained from a gilbert mixer. The tuning-range enhancement technique allows a three band frequency generation in the range from 2.4GHz to 8.4GHz without penalizing its phase noise. The VCO monolithic microwave integrated circuit (MMIC) is implemented in a 0.18 μm SiGe bicmos technology with 1.8 mm 2 area. The measured frequency range is 15.4% for the three bands centered at 2.5GHz, 5GHz, and 7.5GHz. The measured phase noise are -124.4dBc/Hz, -119.1dBc/Hz and -108.8dBc/Hz at 1 MHz offset for the low, middle, high band signals, separately. The measurement results demonstrate that proposed frequency generation technique can achieve wide tuning range capability as well as the low phase noise with very compact circuit.

关键词： Phase noise Tuning Voltage-controlled oscillators Frequency measurement Noise measurement Phase measurement

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A Transient Triggered bipolar Clamp for Electrostatic Discharge Protection in SiGe bicmos Technologies

A Transient Triggered Bipolar Clamp for Electrostatic Discha...

引用

IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Parthasarathy, Srivatsan Salcedo, Javier A. Hajjar, Jean-Jacques Analog Devices Inc Wilmington MA 01887 USA

ISBN: (纸本)9781479901296

An active ESD supply clamp for mixed voltage RF applications developed in advanced SiGe bicmos process is introduced. The clamp is designed using a three-stage architecture consisting of transient-detection, timing and beta-multiplication. The proposed design ensures the clamp has very low leakage even when circuits operate at supply voltages that are equal to or beyond the breakdown voltage of the core SiGe bipolar devices. The clamp's turn-on characteristics spans the full duration of the actual ESD events making it fully capable to effectively protect the sensitive devices in the core circuit.

关键词： SiGe bipolar SiGe bicmos process technology ESD HBT Reliability RF circuits

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Comparative Study of HBT Ageing in a Complementary SiGe:C bicmos technology

Comparative Study of HBT Ageing in a Complementary SiGe:C Bi...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Fischer, G. G. Molina, J. Tillack, B. IHP Frankfurt Oder Germany

ISBN: (纸本)9781479901296

Both npn- and pnp-SiGe HBT types of a complementary bicmos technology were consistently studied under mixed-mode and reverse stress conditions to check for any ageing mismatches. These were found to be more pronounced under forward than under reverse stress. Long-term stress-tests revealed a not yet described base current degradation "catching-up" under low current stress conditions. The resulting ageing parameters were put together into an ageing function for incorporation into HBT compact models.

关键词： Heterojunction bipolar transistors Cbicmos bipolar modeling HBT reliability

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10 Bit and 12 Bit Data Conversion Achievements at Microwave Frequencies on 200GHz SiGeC (bipolar) and 120GHz 0.18μm bicmos technology

10 Bit and 12 Bit Data Conversion Achievements at Microwave ...

引用

IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Wingender, Marc Bore, Francois Chantier, Nicolas Glascott-Jones, Andrew Bouin, Etienne Amblard, Jean-Philippe E2v High Reliabil Semicond Div St Egreve France e2v High Reliabil Semicond Div St Egreve France

ISBN: (纸本)9781479901296

This paper describes design techniques for bipolar and bicmos analog circuits. Comparison on such performances as transconductance, speed, matching, noise of bipolar and CMOS transistors are reviewed and compared. Design achievements such as a single core 12 Bit 1.5GS/s Analog to Digital Converter (ADC) [1] and a single core 12 Bit 3GS/s Digital to Analog Converters (DAC) [2] based on a fully bipolar 200GHz SiGeC technology are introduced to illustrate the advantages and drawbacks of a fully bipolar technology for high speed data converters. A Quad 10 Bit 5GS/s ADC based on 4 interleaved ADC Core designed with a 120 GHz 0.18um bicmos technology is also presented, to illustrate the advantages brought by the combination of bipolar and CMOS technologies.

关键词： 12 Bit Broadband Data converters Multi-Nyquist operation Single Core ADC and DAC Architecture Time interleaved Architectures Calibration Issues Spectral purity Noise Power Ratio (NPR) High IF digitizing and synthesing. SiGeC fully bipolar process SiGe/SiGeC bicmos process Transistor cutoff frequency Noise and matching issues

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A 55 nm triple gate oxide 9 metal layers SiGe bicmos technology featuring 320 GHz fT / 370 GHz fMAX HBT and high-Q millimeter-wave passives

A 55 nm triple gate oxide 9 metal layers SiGe BiCMOS technol...

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International Electron Devices meeting (IEDM)

作者： P. Chevalier G. Avenier G. Ribes A. Montagné E. Canderle D. Céli N. Derrier C. Deglise C. Durand T. Quémerais M. Buczko D. Gloria O. Robin S. Petitdidier Y. Campidelli F. Abbate M. Gros-Jean L. Berthier J.D. Chapon F. Leverd C. Jenny C. Richard O. Gourhant C. De-Buttet R. Beneyton P. Maury S. Joblot L. Favennec M. Guillermet P. Brun K. Courouble K. Haxaire G. Imbert E. Gourvest J. Cossalter O. Saxod C. Tavernier F. Foussadier B. Ramadout R. Bianchini C. Julien D. Ney J. Rosa S. Haendler Y. Carminati B. Borot STMicroelectronics Crolles France CEA-LETI Crolles France

This paper presents the first 55 nm SiGe bicmos technology developed on a 300 mm wafer line in STMicroelectronics. The technology features Low Power (LP) and General Purpose (GP) CMOS devices and 0.45 μm 2 6T-SRAM bit cell. High Speed (HS) HBT exhibits 320 GHz f T and 370 GHz f MAX associated with a CML ring oscillator gate delay τ D of 2.34 ps. Transmission lines, capacitors, high-Q varactors and inductors dedicated to millimeter-wave applications are also available.

关键词： Silicon germanium Heterojunction bipolar transistors Logic gates CMOS integrated circuits bicmos integrated circuits Millimeter wave technology

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Impact of BEOL Stress on bicmos9MW HBTs

Impact of BEOL Stress on BiCMOS9MW HBTs

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Canderle, E. Chevalier, P. Avenier, G. Derrier, N. Celi, D. Gaquiere, C. STMicroelectronics 850 Rue Jean Monnet F-38926 Crolles France UMR 8520 IEMN USTL F-59652 Villeneuve Dascq France

ISBN: (纸本)9781479901296

Stress investigations have been carried out on SiGe HBTs from STMicroelectronics bicmos9MW technology. The strain created by the stack of metal connections impacts the base bandgap of the transistors: from the reference to the denser dummies structure, a 9.1 meV bandgap energy variation is pointed out. Dummies structures were embedded for both DC and HF characterizations which showed a 25% increase for the collector current, and a 21% and 12% increase for the transit frequencies f(T) and f(MAX) respectively.

关键词： bicmos SiGe HBT back-end of line (BEOL) stress bandgap

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A High-Resistivity SiGe bicmos technology for WiFi RF Front-End-IC Solutions

A High-Resistivity SiGe BiCMOS Technology for WiFi RF Front-...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Joseph, Alvin Gambino, Jeff Rassel, Robert M. Johnson, Eric Ding, Hanyi Parthasarthy, Shyam Vanakuru, Venkata Sharma, Santosh Jaffe, Mark Liu, Derrick Zierak, Michael Camillo-Castillo, Renata Stamper, Anthony Dunn, Jim IBM Microelect Div Essex Jct VT 05452 USA

ISBN: (纸本)9781479901296

We present for the first time a novel high resistivity bulk SiGe bicmos technology that has been optimized for a WiFi RF front-end-IC (FEIC) integration. A nominally 1000 Ohm-cm p-type silicon substrate is utilized to integrate several SiGe HBTs for power amplifiers (PAs), a SiGe HBT low-noise amplifier (LNA), and isolated nFET RF switch device. Process elements include trench isolation for low-loss passives and reduced parasitic coupling, and a lower-resistivity region for the FETs to minimize changes to the circuit library.

关键词： High-resistivity SiGe bicmos front-end-IC

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A Versatile Low-cost Smart Power technology Platform for Applications over Broad Current and Voltage Ranges

A Versatile Low-cost Smart Power Technology Platform for App...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Lin, Zhi Hu, Hao Cheng, Junji Chen, Xingbi Univ Elect Sci & Technol China State Key Lab Elect Thin Films & Integrated Devic Chengdu 610054 Peoples R China

ISBN: (纸本)9781479901296

A versatile low-cost manufacturing technology, which is based on the optimum variation lateral doping technique, is proposed for smart power ICs in this paper. The proposed technology is capable to combine the lateral and vertical high voltage (>800V) devices on a single chip, which is suitable for applications over broad current ranges. It is fully compatible with bicmos process and has been implemented on a standard CMOS line with only 11 masks. Devices with various breakdown voltages, as well as a switched-mode power supply chip, are successfully fabricated on this platform. The measured results are displayed and discussed in detail.

关键词： bicmos compatible lateral and vertical integration low-cost solution optimum variation lateral doping technique smart power technology

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A 4GS/s 8bit ADC Fabricated in 0.35μm SiGe bicmos technology

A 4GS/s 8bit ADC Fabricated in 0.35μm SiGe BiCMOS Technolog...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Wu, Danyu Jiang, Fan Zhou, Lei Wu, Jin Huang, Yinkun Jin, Zhi Liu, Xinyu Chinese Acad Sci Inst Microelect Microwave Device & Integrated Circuits Dept Beijing Peoples R China

ISBN: (纸本)9781479901296

In this paper, a low cost 4GS/s 8bit Folding-and-Interpolation (F&I) ADC has been demonstrated. To avoid threshold-mismatch and delay-mismatch between coarse and fine quantizer, a novel coarse quantizer with analog pre-processing circuits are proposed. According to the measurement result, the proposed coarse quantizer has successfully eliminated the glitch code. The ADC is capable of sampling analog input frequencies up to 1.5GHz with greater than 7.0 effective number of bits (ENOB) performance. The ADC has a die size of 3.8x3.8 mm(2) and consumes 4.1W of power.

关键词： Folding and Interpolating analog pre-processing circuits SiGe bicmos Time-Interleaved

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