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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Zeinolabedinzadeh, Saeed Lourenco, Nelson E. Kamarei, M. Cressler, John D. Georgia Tech Sch Elect & Comp Engn 777 Atlantic Dr NW Atlanta GA 30332 USA Univ Tehran Sch Elect & Comp Engn Tehran Iran

ISBN: (纸本)9781467330213

A SiGe V-band voltage-controlled oscillator (VCO) with varactor-less tuning is presented. The frequency tuning of the VCO is accomplished using the C-CB capacitance of the core transistors themselves. Removing the varactors within the VCO is particularly useful for millimeter-wave applications since varactors significantly degrade the quality factor of the resonator within the VCO and consequently the phase noise. This VCO utilizes a differential cross-coupled topology. The 67 GHz VCO was implemented in a commercial 180 nm SiGe bicmos platform and achieves a 6.7% tuning range and 0.3 dBm differential output power. The VCO achieves -90 dBC/Hz phase noise at 1 MHz offset from the 67 GHz signal.

关键词： VCO Tuning range Millimeter - Wave Silicon bipolar/bicmos process technology RF circuits

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MEMS Module Integration into SiGe bicmos technology for Embedded System Applications

MEMS Module Integration into SiGe BiCMOS Technology for Embe...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Kaynak, Mehmet Valenta, Vaclav Schumacher, Hermann Tillack, Bernd IHP GmbH Leibniz Inst Innovat Microelect Technol Pk 25 D-15236 Frankfurt Germany Univ Ulm Inst Elect Devices & Circuits D-89069 Ulm Germany Techn Univ Berlin D-10587 Berlin Germany

ISBN: (纸本)9781467330213

The introduction of radio frequency micro-electro-mechanical systems (RFMEMS) as a monolithic option into state-of-the-art Si/SiGe bicmos foundry processes has paved the way for single chip radio frequency microsystems at millimeter wave frequencies. Deep silicon substrate etch techniques have also been developed to prevent high substrate losses which help in achieving high performance passive components at mm-wave frequencies. Using the same process techniques, realization of highly efficient on-chip antennas has become feasible, which in the millimeter-wave range no longer come with a hefty chip real estate penalty. In this paper, the current status of embedded bicmos+MEMS technology development is presented. Reconfigurable circuits using embedded RFMEMS switches and mm-wave transceivers with on-chip antennas are also discussed as application examples.

关键词： Silicon bipolar/bicmos process technology RFMEMS RFMEMS switch On-Chip antennas mm-wave ICs reconfigurable ICs

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Terahertz Detector Arrays in a High-Performance SiGe HBT technology

Terahertz Detector Arrays in a High-Performance SiGe HBT Tec...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Al Hadi, Richard Grzyb, Janusz Heinemann, Bernd Pfeiffer, Ullrich Univ Wuppertal IHCT Rainer Gruenter Str 21 D-42119 Wuppertal Germany IHP GmbH Technologiepark 25 D-15236 Frankfurt Germany

ISBN: (纸本)9781467330213

This paper presents heterojunction bipolar transistor (HBT) based terahertz power detectors implemented in a 0.25-mu m SiGe process technology. The detectors have been arranged in a 3 x 5-pixel FPA and characterized at 0.65 THz. Referred to the collecting aperature of a 3-mm diameter lens, a maximum current responsivity R-1 of 0.79 A/W and a minimum noise equivalent power NEP of 370 pW/root Hz have been measured at a 1-kHz chopping frequency.

关键词： Submillimeter wave detectors submillimeter wave imaging bicmos SiGe HBT terahertz direct detection

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A Low Phase Noise Colpitts VCO for Ku-band applications

A Low Phase Noise Colpitts VCO for Ku-band applications

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Wang, Yi Leenaerts, D. van der Heijden, E. Mahmoudi, R. Eindhoven Univ Technol Mixed Signal Microelect Grp POB 513 NL-5600 MB Eindhoven Netherlands 2RF ADT NXP Semiconductors Eindhoven Netherlands

ISBN: (纸本)9781467330213

A 12.74 GHz low phase noise Colpitts VCO has been designed and fabricated in a 0.25 mu m SiGe:C bicmos technology. The balanced VCO uses a transformer coupled tank and two additional inductors to reduce the current in the feedback loop. The efficiency of energy transfer from active devices to the tank has been improved by these two methods, which leads to a larger output swing for the same DC current. Measured phase noise is better than -100dBc /Hz at 100 kHz offset over the tuning range from 12.43 to 13.08GHz.

关键词： SiGe:C bicmos technology Colpitts VCO phase noise Ku-band

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SFDR Considerations for Current Steering High-Speed Digital to Analog Converters

SFDR Considerations for Current Steering High-Speed Digital ...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Khafaji, Mahdi Scheytt, Christoph Joerges, Udo Carta, Corrado Micusik, Daniel Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory D-01062 Dresden Germany Univ Paderborn Heinz Nixdorf Inst D-33102 Paderborn Germany IHP Microelectron Technologiepark 25 D-15236 Frankfurt Germany

ISBN: (纸本)9781467330213

In this paper the spurious free dynamic range (SFDR) of a current steering digital-to-analog converter (DAC) is related to the process parameters used for its implementation. It is shown that the realization of such DACs in advanced processes provides power and area reduction combined with faster signaling. However, it is very challenging to improve the SFDR at a certain given output swing and sampling frequency. It is demonstrated that the SFDR can be doubled by using an optimized cascode switch. It is also concluded that compared to MOSFET based approaches higher sampling frequencies can be achieved by bipolar transistor based DACs if the SFDR and transition frequency are fixed. The reason is the higher Early voltage of bipolar transistors.

关键词： DAC integrated circuits bicmos MOSFET mixed signal circuits circuit modeling and simulation

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Double-Polysilicon Self-Aligned SiGe HBT Architecture Based on Nonselective Epitaxy and Polysilicon Reflow

Double-Polysilicon Self-Aligned SiGe HBT Architecture Based ...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Mertens, H. Magnee, P. H. C. Donkers, J. J. T. M. van Dalen, R. Brunets, I. Van Huylenbroeck, S. Vleugels, F. Vanhoucke, T. NXP Semiconductors Research 3001 Leuven Kapeldreef 75 Belgium NXP Semiconductors Nijmegen 6534 AE Nijmegen Gerstweg 2 Netherlands IMEC 3001 Leuven Kapeldreef 75 Belgium

ISBN: (纸本)9781467330213

This paper describes a self-aligned SiGe heterojunction bipolar transistor (HBT) based on a standard double-polysilicon architecture and nonselective epitaxial growth (i.e. DPSA-NSEG). Emitter-base self-alignment is realized by polysilicon reflow in a hydrogen ambient after emitter window patterning. The fabricated self-aligned SiGe HBTs, with emitter widths of 0.3 - 0.4 mu m, exhibit 20% lower base resistance and 15% higher maximum oscillation frequency f(max) than non-self-aligned reference devices. The minimum noise figure of a Ku-band low-noise amplifier is reduced from 0.9 to 0.8 dB by emitter-base self-alignment.

关键词： Silicon bipolar/bicmos process technology heterojunction bipolar transistor

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Co-integration of high-performance and high-breakdown SiGe HBTs in a bicmos technology

Co-integration of high-performance and high-breakdown SiGe H...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Pekarik, John J. Adkisson, James W. Camillo-Castillo, Renata Cheng, Peng DiVergilio, Adam W. Gray, Peter B. Jain, Vibhor Kaushal, Vikas Khater, Marwan H. Liu, Qizhi Harame, David L. IBM Microelectronics Division Essex Junction VT 05452 1000 River Street United States IBM T. J. Watson Research Center Yorktown Heights NY 10598 1101 Kitchawan Road United States Tektronix Beaverton OR 97077 United States

ISBN: (纸本)9781467330213

Having two, or more, transistors with different values of f(T) and BVCEO provides flexibility to circuit designers in making tradeoffs of power and performance. The process complexity and resulting cost of fabricating these transistors on the same wafer is another important factor. Three different approaches for co-integrating high-performance and high-breakdown SiGe npn HBTs with minimal process deviation are presented herein. The work features a high-performance HBT with f(T) x BVCEO product of 500GHz-V and a high-breakdown HBT with over 430GHz-V integrated on the same wafer with one-mask deviation.

关键词： Avalanche breakdown Cutoff frequency Device physics Heterojunction bipolar transistors Silicon bipolar/bicmos process technology Power devices

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4 x 24 Gb/s 2⁷-1 PRBS Generator Using 1.8 V MOS-HBT Quasi-CML Logic

4 x 24 Gb/s 2<SUP>7</SUP>-1 PRBS Generator Using 1.8 V MOS-H...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Kozlov, Victor Park, Paul Voinigescu, Sorin P. Univ Toronto Dept Elect & Comp Engn Toronto ON M5S 3G4 Canada

ISBN: (纸本)9781467330213

An untra-low-power, 2(7) - 1 PRBS generator with four, appropriately delayed, parallel output streams was fabricated in a production 130-nm SiGe bicmos technology with HBT f(T) /f(MAX) of 230/280 GHz. The circuit is based on a 1.8 V MOS-HBT quasi-CML family and operates with serial data rates up to 24 Gb/s. It consumes 196 mW from 1.8 V, corresponding to only 49 mW per 24 Gb/s data lane or 2.04 pJ/bit.

关键词： Built-in self-test current mode circuits D-type flip-flop SiGe bicmos PRBS generator

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Design of High Efficiency Monolithic Power Amplifier With Envelope-Tracking and Transistor Resizing for Broadband Wireless Applications

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IEEE JOURNAL OF SOLID-STATE circuits 2012年第9期47卷 2007-2018页

作者： Li, Yan Lopez, Jerry Schecht, Cliff Wu, Ruili Lie, Donald Y. C. Texas Tech Univ Dept Elect & Comp Engn Lubbock TX 79409 USA

This paper presents the design insights for the implementation of a fully monolithic radio frequency (RF) power amplifier (PA) using both envelope-tracking (ET) and transistor resizing techniques for long-term evolution (LTE) applications. At the low output power region, some of the power cells in the PA can be disabled to further save power consumption, thus enhancing the efficiency from a traditional ET-PA. Our ET-PA system is first realized with a two-chip solution, consisting of a high voltage envelope modulator fabricated in a 0.35 mu m bipolar-CMOS-DMOS (BCD) technology, and a differential cascode PA in a 0.35 mu m SiGe bicmos technology. This two-chip solution of the ET-PA is to showcase the effective efficiency enhancement of using the transistor resizing method. In the second design, a CMOS envelope modulator is integrated with the cascode PA on the same die in the 0.35 mu m SiGe bicmos technology. Some insights are demonstrated regarding the optimization of the envelope modulator specific to our cascode PA for LTE broadband signals, where the finite bandwidth and the switching frequency of the envelope modulator are considered for achieving the minimal error-vector magnitude (EVM) and spurious noise. The fully monolithic bicmos ET-PA reaches the maximum linear output power (P-out) of 24 dBm and 23.4 dBm with overall power-added-efficiency (PAE) of 41% and 38% for the LTE 16QAM 5 MHz and 10 MHz signals at 1.9 GHz, respectively, without needing predistortion. At the low power mode of our ET-PA, an additional PAE enhancement of 4% is obtained at P-out of 16-20 dBm by disabling some of the PA power cells. Our fully monolithic ET-PA satisfies the LTE 16QAM linearity specs with high efficiency.

关键词： bipolar-CMOS-DMOS (BCD) cascode power amplifier (PA) envelope modulator envelope-tracking (ET) long-term evolution (LTE) low power mode SiGe bicmos transistor resizing

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Fast noise prediction for process optimization using only standard DC and S-parameter measurements

Fast noise prediction for process optimization using only st...

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IEEE bipolar/bicmos circuits and technology meeting (BCTM)

作者： Gridelet, E. Scholten, A. J. Klaassen, D. B. M. van Dalen, R. Pijper, R. Magnee, P. H. C. Tiemeijer, L. F. Dinh, V. T. Vanhoucke, T. NXP Semicond Res Kapeldreef 75 B-3001 Louvain Belgium NXP Semiconductors Res NL-5656 Eindhoven Netherlands NXP Semiconductors Nijmegen NL-6534 Nijmegen Netherlands

ISBN: (纸本)9781467330213

This paper presents a method to select, amongst a series of devices differing on their process, the best device in terms of high-frequency noise characteristics, only from standard DC and S-parameter measurements and without the need of noise measurements. The method is developed and tested using synthetic input data and noise data generated with the MEXTRAM compact model and validated against on-wafer noise measurements on a series of devices with different process variations. A very simple equivalent circuit, with base, emitter and collector resistances as the only external components, is shown to be sufficient to rightfully sort devices in terms of their high-frequency noise performance. This allows to fully automate noise prediction procedure based on standard DC and S-parameter measurements without the need of manual data manipulation.

关键词： Silicon bipolar/bicmos process technology bipolar modeling and simulation RF circuits noise

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