This paper discusses design and analysis of new nano crystal quantum dot (NC-QD) based field programmable electrostatic discharge (ESD) protection structures. Prototype NC-QD ESD structures were verified experimentall...
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ISBN:
(纸本)9781467330213
This paper discusses design and analysis of new nano crystal quantum dot (NC-QD) based field programmable electrostatic discharge (ESD) protection structures. Prototype NC-QD ESD structures were verified experimentally, achieving a wide ESD triggering voltage tuning range of 2.5V, very fast response time of similar to 100pS, ESD protection level of 25mA/mu m in human body model (HBM) and 400mA/mu m in charged device model (CDM), and very low leakage current of I-leak similar to 15pA.
In this paper, a fully differential cascode power amplifier (PA) is designed and fabricated using a 0.35-mu m SiGe bicmos process. In the continuous wave (CW) measurement, the PA achieves a saturated power (P-SAT) of ...
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ISBN:
(纸本)9781467330213
In this paper, a fully differential cascode power amplifier (PA) is designed and fabricated using a 0.35-mu m SiGe bicmos process. In the continuous wave (CW) measurement, the PA achieves a saturated power (P-SAT) of 24.8 dBm at 3.3 V with power-added-efficiency (PAE) above 50% at 2.3 GHz. Two monolithic envelope modulators (EMs) are designed in a 0.18-mu m SOI CMOS technology using a switching buck converter stage with two different linear amplifier topologies: a low-dropout (LDO) regulator vs. a conventional class AB Op-Amp. The envelope tracking PA (ET-PA) systems are measured for maximum linear P-OUT and efficiency with corresponding design trade-offs discussed. The conventional class AB Op-Amp based EM proved better combined efficiency/linearity at 20 dBm P-OUT with 30% PAE using an LTE 16QAM 5 MHz signal for our assessment.
We present results of a SiGe:C HBT module transfer from a 0.25 mu m (IHP) bicmos process to a 0.18 mu m (Mikron) RF-CMOS baseline. Best possible parameter matching of three different HBT types with BVCEO values of 2.4...
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ISBN:
(纸本)9781467330213
We present results of a SiGe:C HBT module transfer from a 0.25 mu m (IHP) bicmos process to a 0.18 mu m (Mikron) RF-CMOS baseline. Best possible parameter matching of three different HBT types with BVCEO values of 2.4 V, 4 V, and 7 V was a challenging task due to a 15 deg higher SD-RTA temperature of the 0.18 mu m CMOS. Here, we focus on the high-voltage (7 V) device discussing two effects which result from further differences in the CMOS baselines. First, we deal with the particular importance of collector-substrate capacitance (C-CS) for the transistor f(max). We show that about 20% gain in f(max) was obtained by preventing a C-CS perimeter component. In result, HBTs are demonstrated showing f(max) of 90 GHz at 7V BVCEO. Second, we investigate whether adding the 1.5 MeV, NMOS isolation implant to the high-voltage HBT collector brings benefits for the transistor behavior.
In this paper, a pseudo-differential power amplifier (PA) is designed using two SiGe power cells fabricated in the 0.35-mu m IBM 5PAe SiGe bicmostechnology with through-wafer-vias (TWVs). In the continuous wave (CW) ...
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ISBN:
(纸本)9781467330213
In this paper, a pseudo-differential power amplifier (PA) is designed using two SiGe power cells fabricated in the 0.35-mu m IBM 5PAe SiGe bicmostechnology with through-wafer-vias (TWVs). In the continuous wave (CW) measurement, the PA achieves a 2-watt level saturated P-OUT with power-added-efficiency (PAE) above 65% across the bandwidth of 0.7-1 GHz. The envelope tracking (ET) technique is then applied to the PA for enhanced efficiency using the LTE 16QAM signals with a peak-to-average-ratio (PAR) of 7.5 dB. Beside a conventional single buck converter based envelope modulator (SBEM), a dual buck converter based envelope modulator (DBEM) is also designed for higher power drivability. Measurement shows the ET-PA systems can transmit linear P-OUT of 25/24 dBm with system PAE of 40%/32% at 750 MHz for LTE 16QAM 5/20 MHz signals.
This paper addresses the integration of a new generation of high-speed SiGe HBTs with f(T)/f(max) of 300/500 GHz and minimum CML ring oscillator gate delays of 2.0 ps in a 0.13 mu m bicmostechnology. Technological me...
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ISBN:
(纸本)9781457713163
This paper addresses the integration of a new generation of high-speed SiGe HBTs with f(T)/f(max) of 300/500 GHz and minimum CML ring oscillator gate delays of 2.0 ps in a 0.13 mu m bicmostechnology. Technological measures for improving the speed of the HBTs compared to our first 0.13 mu m bicmos generation are discussed. These include scaling of lateral device dimensions and doping profiles as well as a reduced thermal budget and reduced salicide resistance.
A frequency-scalable, three-stage, transformer-coupled millimeter-wave power amplifier (PA) is implemented in 130 nm SiGe-bicmos. Differential common-base gain stages extend collector-emitter breakdown voltage beyond ...
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A frequency-scalable, three-stage, transformer-coupled millimeter-wave power amplifier (PA) is implemented in 130 nm SiGe-bicmos. Differential common-base gain stages extend collector-emitter breakdown voltage beyond 3 V, while collector-emitter neutralization increases reverse isolation and stability. Monolithic self-shielded transformers designed for low insertion loss and compact dimensions on-chip include: a 2:4 input power splitter, a 4:1 output balun combiner and inter-stage coupling transformers. The balun combiner and fully-differential splitter are compensated for imbalances caused by parasitic interwinding capacitance, and simulations predict better than 3% uniformity between reflected port-to-port impedances at 60 GHz. Simulated impedance uniformity is within 6% from 55-65 GHz, and insertion loss of the < 0.015 mm(2) combiner prototypes at 60 GHz is below 1 dB. The 0.72 mm(2) 60 GHz-band PA realizes a measured peak small-signal gain higher than 20 dB with over 10 GHz -3 dB bandwidth. Reverse isolation is better than 51 dB from 50-65 GHz and the PA is unconditionally stable. It consumes 353 mW (quiescent) from a 1.8 V supply and the active area is 0.25 mm(2). Maximum output power and peak power-added efficiency (PAE) are 20.1 dBm and 18% at 62 GHz, respectively. An up-banded 79-87.5 GHz PA is also implemented to verify frequency scalability of the design. The 0.23 mm(2) active area 79 GHz PA prototype produces 18 dBm saturated output power and 9% peak-PAE at 84 GHz from a 2.5 V supply.
An integrated oscillator was designed to analyze the behavior of high-performance SiGe:C HBTs under RF large signal stress. The properties of the oscillator core HBTs can easily be monitored during the whole test peri...
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ISBN:
(纸本)9781457713163
An integrated oscillator was designed to analyze the behavior of high-performance SiGe:C HBTs under RF large signal stress. The properties of the oscillator core HBTs can easily be monitored during the whole test period. A complex measurement setup was arranged to perform all tests without the need to reconfigure the measurement setup. First experimental data are presented demonstrating a degradation of the HBT 1/f noise and base current behavior caused by the applied RF large signal stress.
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