A 4-element phased-array front-end receiver based on 4-bit RF phase shifters is designed for 36-46 GHz satellite communications. The phased-array uses a corporate-feed approach with integrated Wilkinson combiners for ...
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ISBN:
(纸本)9781424427253
A 4-element phased-array front-end receiver based on 4-bit RF phase shifters is designed for 36-46 GHz satellite communications. The phased-array uses a corporate-feed approach with integrated Wilkinson combiners for linear coherent power combining. The measured loss in the Wilkinson coupler is 0.5-0.6 dB at 30-50 GHz. The phased-array shows 10.4 dB of average power gain, <= 1.2 dB of RMS gain error, <= 8.7 degrees of RMS phase error and an IIP3 of -13.5 dBm per channel for all 4-bit phase states at 38.5 GHz. The chip consumes 118 mA from a 5 V supply voltage. The overall chip size is 1.4x1.7 mm(2) and includes all the digital control circuits (address decoders, registers, etc.) for the array.
This paper describes the integration of high-voltage HBTs in a high-speed SiGe bicmostechnology. HBTs with BVCEO from 2V to 5V featuring an all-implanted collector and fully compatible with a 230-GHz f(T) bicmos tech...
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ISBN:
(纸本)9781424418558
This paper describes the integration of high-voltage HBTs in a high-speed SiGe bicmostechnology. HBTs with BVCEO from 2V to 5V featuring an all-implanted collector and fully compatible with a 230-GHz f(T) bicmostechnology have been fabricated using only one additional mask.
The factors determining the temperature stability of a 77 GHz voltage controlled oscillator (VCO) and reliability issues of the SiGe:C hetero bipolar transistors (HBT) used in the VCO are studied. The VCO with output ...
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ISBN:
(纸本)9781424418558
The factors determining the temperature stability of a 77 GHz voltage controlled oscillator (VCO) and reliability issues of the SiGe:C hetero bipolar transistors (HBT) used in the VCO are studied. The VCO with output buffer and NMOS varactors shows an output power of +14.6 dBm at 77 GHz. In the temperature range up to 125 degrees C we get a low oscillation frequency shift Delta f(osc) = -1.2 GHz/100K. Although the HBTs used for the VCO show significant base current degradation during high and low temperature stress, their rf and low-frequency noise behavior, relevant for VCO reliability, is not affected.
This paper presents a complete 0.13m SiGe bicmostechnology fully dedicated to millimeter-wave applications, including a high-speed (230/280GHz fT/fMAX) and medium voltage SiGe HBT, thick-copper back-end designed for ...
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The proceedings contain 64 papers from the Proceedings of the 2005 bipolar/bicmos circuits and technology meeting, BCTM. The topics discussed include: polar modulation and bipolar RF power devices;offset voltage of Sc...
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The proceedings contain 64 papers from the Proceedings of the 2005 bipolar/bicmos circuits and technology meeting, BCTM. The topics discussed include: polar modulation and bipolar RF power devices;offset voltage of Schottky-collector silicon-on-glass VPNP's;usage of HBTs beyond BVceo;the effects of layout variation on the thermal characteristics of SiGe HBTs;high voltage semiconductor devices: status and trends;NOR/OR register based ECL circuits for maximum data rate;input non-quasi-static effect in SiGe HBTs and its impact on noise modeling;20 GHzbipolar RF RMS power detectors;identification analysis of a new BJT parametric mismatch phenomenon;and on the delay times in vertically scaled SiGe HBTs.
A 3-bit ADC for X-band applications that can work at a sampling rate of 11 GS/s is presented in this paper. Current comparators are used to achieve the high sampling rate of 11 GHz at X-band. A 3-bit current-steering ...
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Both NPN and PNP bipolar transistors are modularly integrated at low cost into standard 0.18 mum and 0.13 mum CMOS process flows. The bipolar modules are of low complexity and thus cost, using only 4 dedicated masks f...
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ISBN:
(纸本)9781424427253
Both NPN and PNP bipolar transistors are modularly integrated at low cost into standard 0.18 mum and 0.13 mum CMOS process flows. The bipolar modules are of low complexity and thus cost, using only 4 dedicated masks for the NPN and only 2 for the PNP devices. The resulting devices cover an extremely wide range of application space. Devices range from around 2 V BV CEO and 115 GHz F T to 12 V BV CEO and 12 GHz F T . Multiple device types can be co-integrated with the addition of simple implant masking steps.
In this paper, we presents the design and implementation of a bicmos operational amplifier topology that operates from a 2.5 V supply and achieves record gain-bandwidth performance. First, a fully-differential, single...
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ISBN:
(纸本)9781424427253
In this paper, we presents the design and implementation of a bicmos operational amplifier topology that operates from a 2.5 V supply and achieves record gain-bandwidth performance. First, a fully-differential, single stage folded-cascode with tunable common-mode feedback is described. In order to improve the DC gain of this circuit, a second version is implemented with differential gain boosting and achieves 48 dB of gain while maintaining a unity gain bandwidth of 9 GHz.
Footprint design in SiGe bicmos SOI technology is described in this paper to improve device performance matrix. The safe operating area (SOA) for a SiGe hetero-junction bipolar transistor (HBT) fabricated on silicon o...
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ISBN:
(纸本)9781424427253
Footprint design in SiGe bicmos SOI technology is described in this paper to improve device performance matrix. The safe operating area (SOA) for a SiGe hetero-junction bipolar transistor (HBT) fabricated on silicon on insulator (SOI) is significantly improved as the footprint area increases. The Early voltage for SiGe HBT on SOI at medium-high bias range also increases substantially with footprint area increase. Peak f T and noise figure improves slightly with footprint, and peak f MAX improves slightly then decreases significantly at very large footprint area. A generic tube-area-limited thermal resistance model for bicmos devices on SOI is also proposed.
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