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检索条件"任意字段=Bipolar/BiCMOS Circuits and Technology Meeting"

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Demonstration of a 270 GHz fT SiGe-C HBT within a manufacturing-proven 0.18μm bicmos process without the use of a raised extrinsic base

Demonstration of a 270 GHz fT SiGe-C HBT within a manufactur...

引用

bipolar/bicmos circuits and technology meeting

作者： Edward Preisler Louis Lanzerotti Paul D. Hurwitz Marco Racanelli Jazz Semiconductor Newport Beach CA USA

SiGe bipolar transistors with F T of 270 GHz are integrated within a standard 0.18 mum CMOS process flow. These devices are built using the same architecture as Jazzpsila SBC18 SiGe bicmos process which has been in high-volume manufacturing for several years. The transistors have an F MAX of 170 GHz but a path to achieving an F MAX equal to F T is demonstrated without the use of selective SiGe epitaxy or raised extrinsic base poly layers. Data is shown that suggests that the target of 270 GHz F MAX can be achieved through a combination of modest design rule changes and optimization of extrinsic base doping conditions.

关键词： Resistance Silicon germanium bicmos integrated circuits Optimization Implants Heterojunction bipolar transistors Manufacturing

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0.13μm SiGe bicmos technology for mm-wave applications

0.13μm SiGe BiCMOS technology for mm-wave applications

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bipolar/bicmos circuits and technology meeting

作者： G. Avenier P. Chevalier G. Troillard B. Vandelle F. Brossard L. Depoyan M. Buczko S. Boret S. Montusclat A. Margain S. Pruvost S.T. Nicolson K.H.K. Yau D. Gloria D. Dutartre S.P. Voinigescu A. Chantre STMicroelectronics Crolles France Edward S. Rogers Sr. Departmentof ECE University of Toronto Toronto ONT Canada

ISBN: (纸本)9781424427253

This paper presents a complete 0.13 mum SiGe bicmos technology fully dedicated to millimeter-wave applications, including a high-speed (230/280GHz f T /f MAX ) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2fF/mum 2 high-linearity MIM capacitor and complementary double gate oxide MOS transistors.

关键词： Silicon germanium Heterojunction bipolar transistors bicmos integrated circuits Logic gates CMOS integrated circuits Copper CMOS technology

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bicmos technology improvements for microwave application

BiCMOS technology improvements for microwave application

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bipolar/bicmos circuits and technology meeting

作者： Wibo D. van Noort A. Rodriguez HongJiang Sun Francis Zaato Nancy Zhang Tony Nesheiwat Francois Neuilly Joost Melai Erwin Hijzen NXP Semiconductors Hopewell Junction NY USA NXP Semiconductors Caen France MESA University of Twente Netherlands NXP Semiconductors research Leuven Belgium

ISBN: (纸本)9781424427253

The third generation of NXP 0.25 mum SiGe bicmos technology (QUBiC4Xi) is presented. The NPN has f T /f max of 216/177 GHz and BV cb0 of 5.2 V. The high-voltage NPN has 12 V BV cb0 , and f T /f max of 80/162 GHz. This is complemented with an improved MIM capacitor with 1THz cutoff frequency and new on-chip isolation structures that demonstrate a record |S12| of -60 dB at 10 GHz.

关键词： Radio frequency Silicon germanium bicmos integrated circuits Impedance Resistance Substrates Metals

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A 35 GS/s 5-Bit SiGe bicmos flash ADC with offset corrected exclusive-or comparator

A 35 GS/s 5-Bit SiGe BiCMOS flash ADC with offset corrected ...

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bipolar/bicmos circuits and technology meeting

作者： R.A. Kertis J.S. Humble M.A. Daun-Lindberg R.A. Philpott K.A. Fritz D.J. Schwab J.F. Prairie B.K. Gilbert E.S. Daniel Special Purpose Processor Development Group Mayo Clinic Rochester MN USA

ISBN: (纸本)9781424427253

The design and wafer probe test results of a 5-bit SiGe ADC are presented. The integrated circuit, fabricated in a 200/250 GHz f T /F max , SiGe bicmos technology, provides a 5-bit analog to digital conversion with input tone frequencies up to 20 GHz and sampling clock rates up to 35 GS/s. The ADC makes use of a comparator with an integrated exclusive-or function to reduce power consumption. The device also generates two half-rate interleaved outputs to ease in data capturing with laboratory equipment. An effective number of bits (ENOB) of nearly 5.0 is achieved for low frequency input tones, dropping to 4.0 at 10 GHz.

关键词： Clocks Silicon germanium Gain Driver circuits Frequency measurement Bandwidth bicmos integrated circuits

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A single-channel 10b 1GS/s ADC with 1-cycle latency using pipelined cascaded folding

A single-channel 10b 1GS/s ADC with 1-cycle latency using pi...

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bipolar/bicmos circuits and technology meeting

作者： Alireza Razzaghi Sai-Wang Tam Pejman Kalkhoran Yu Wang Chih-Yi Kuan Brian Nissim Lan Duy Vu M.C. Frank Chang High Speed Electronics Lab UCLA Los Angeles CA USA

ISBN: (纸本)9781424427253

A 10b 1 GS/s ADC employing a single channel cascaded folding architecture is presented. Conversion speed of 1 GS/s is attained by incorporating low-power distributed track-and-hold amplifiers after each folder. This ADC achieves a record 55.6 dB peak SNDR and a 64 dB peak SFDR and sustains a latency of one clock cycle. DNL and INL at 1 GS/s sampling rate are measured 0.4 LSB and 1.1 LSB. Fabricated in a 0.35 mum bicmos process, the ADC consumes 2 W from a 3.5 V supply.

关键词： Interpolation Linearity CMOS integrated circuits bicmos integrated circuits Clocks Transistors Loading

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60GHz quadrature signal generation with a single phase VCO and polyphase filter in a 0.25μm SiGe bicmos technology

60GHz quadrature signal generation with a single phase VCO a...

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bipolar/bicmos circuits and technology meeting

作者： M.G.M. Notten H. Veenstra Philips Research Laboratories Eindhoven Netherlands

ISBN: (纸本)9781424427253

This paper describes a single-phase VCO followed by a polyphase filter to generate 60 GHz quadrature signals. The IC is implemented in a SiGe:C-bicmos process. A quadrature down-conversion mixer is included for accurate evaluation of I/Q-matching. The RF inputs of the mixers are driven via an on-chip passive power splitter. The VCO exhibits a tuning range between 59.5-61.5 GHz and a phase noise of -92 dBc/Hz at 1 MHz offset from the carrier. The measured I/Q-matching of 28.6 dB corresponds to a phase error of 4.2deg. The power consumption of the IC including the mixers is 150 mW at a supply voltage of 4.5 V and the chip area including bondpads is 1 mm 2 .

关键词： Oscillators Voltage-controlled oscillators Microwave filters Mixers Matched filters Integrated circuits Capacitors

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A 40 GS/s SiGe track-and-hold amplifier

A 40 GS/s SiGe track-and-hold amplifier

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bipolar/bicmos circuits and technology meeting

作者： Xiangtao Li Wei-Min Lance Kuo John D. Cressler School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA USA

ISBN: (纸本)9781424427253

An ultra-high-speed SiGe track-and-hold amplifier (THA) using a switched-emitter-follower (SEF) configuration is presented. Operating off a +5.5 V power supply, this THA exhibits -32.4 dBc of total harmonic distortion (THD) when sampling a 10 GHz input signal at the rate of 40 GS/s, and reaches -50.5 dBc of THD when sampling a 2 GHz input at 12 GS/s. Compared to the THAs published in the literature with an operational range from 10 GS/s to 20 GS/s, the present THA demonstrates a THD comparable to the best one achieved to date to our knowledge for Si technology, with much improved high-frequency characteristics. On the other hand, in the operational range of 30 GS/s and above, the present SiGe THA still exhibits robust characteristics compared to the fastest THAs in terms of linearity, power consumption, and sampling rate.

关键词： Silicon germanium Heterojunction bipolar transistors bicmos integrated circuits Attenuation Silicon Switches Interference

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High and low density complimentary MIM capacitors fabricated simultaneously in advanced RFCMOS and bicmos technologies

High and low density complimentary MIM capacitors fabricated...

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bipolar/bicmos circuits and technology meeting

作者： Z. X. He D. Daley R. Bolam D. Vanslette F. Chen E. Cooney D. Mosher N. Feilchenfeld K. Newton E. Eshun R. Rassel J. Benoit D. Coolbaugh S. St Onge J. Dunn IBM Corporation Essex Junction VT U.S.A. IBM Corporation Hopewell Junction NY U.S.A.

Two MIM capacitors with capacitance density of 11 and 0.48 fF/um 2 were fabricated simultaneously using IBM-s 0.13 um SiGe 8 WL bicmos process. Results from DC parametric measurement indicate that these two capacitor... 详细信息

ISBN: (纸本)9781424427253

关键词： MIM capacitors Capacitors Capacitance Leakage current Copper Films Temperature measurement

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A 0.24 μm SiGe bicmos technology featuring 6.5V CMOS, fT/fMAX of 15/14 GHz VPNP, and fT/fMAX of 60/125 GHz HBT

A 0.24 μm SiGe BiCMOS technology featuring 6.5V CMOS, fT/fM...

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bipolar/bicmos circuits and technology meeting

作者： P. Candra M. Dahlstrom M. Zierak B. Voegeli K. Watson P. Gray Z. X. He R. M. Rassel S. Von Bruns N. Schmidt R. Camillo-Castillo R. Previty-Kelly M. Gautsch A. Norris M. Gordon P. Chapman D. Hershberger J. Lukaitis N. Feilchenfeld A. Joseph S.A. St. Onge J. Dunn IBM Semiconductor Research and Development Center Essex Junction VT USA

For the first time, we report a 0.24 mum SiGe bicmos technology that offers full suite of active device including three distinct NPNs, a vertical PNP, CMOS supporting three different operating-voltages, and wide range of passive devices. In particular, this technology provides 6.5 V CMOS capability and VPNP with f T /f MAX of 15/14 GHz and BV CEO of 6.5 V which can be used to complement high breakdown NPN with f T of 30 GHz and BVceo of 6.0 V.

关键词： Implants CMOS integrated circuits Silicon germanium bicmos integrated circuits FETs CMOS technology Performance evaluation

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A 13.5-to-17 dBm P1dB, selective, high-gain power amplifier for 60 GHz applications in SiGe

A 13.5-to-17 dBm P1dB, selective, high-gain power amplifier ...

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bipolar/bicmos circuits and technology meeting

作者： Srdjan Glisic Christoph Scheytt Circuit Design Department IHP Frankfurt Germany

ISBN: (纸本)9781424427253

A fully integrated differential power amplifier (PA), produced in 0.25 mum SiGe:C bicmos process for 60 GHz application is presented. Differential 1 dB compression point (P1dB) at the output is 13.5 dBm at 61.5 GHz and as high as 17 dBm at 65 GHz. Saturated power is 18.7 dBm at 61.5 GHz and maximum 19 dBm at 66 GHz. PA features three-stage cascade topology with measured gain of 33 dB at 61 GHz. The amplifier is selective with 20 dB image rejection at 51 GHz, which is image frequency for the targeted transmitter architecture. Compact differential design resulted in small size of 0.6 mm 2 with pads. Maximum power-aided efficiency (PAE) is 7.8% for 800 mW power consumption, and 10.2% for 600 mW.

关键词： Silicon germanium Power amplifiers Power demand Gain CMOS integrated circuits bicmos integrated circuits Power measurement

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