Strained silicon technology has had a dramatic impact on extending the limits of semiconductor technology. Due to the difficulties of both bipolar and CMOS scaling, strained layer technology offers a manufacturability...
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Strained silicon technology has had a dramatic impact on extending the limits of semiconductor technology. Due to the difficulties of both bipolar and CMOS scaling, strained layer technology offers a manufacturability approach to change the material properties of silicon and significantly enhance performance
Two important technologies are exploited in the high-speed SiGe bicmos fabrications based on the inspection of the device physics. The effective reduction of the base resistance is achieved by optimizing profile and c...
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Two important technologies are exploited in the high-speed SiGe bicmos fabrications based on the inspection of the device physics. The effective reduction of the base resistance is achieved by optimizing profile and configuration of the SiGe HBT. Moreover, the concept of obtaining a narrow base in the bicmos process is established, which enables the ultra-high-speed SiGe bicmos
This paper reports a 71 GHz static and a 103 GHz regenerative dynamic frequency divider fabricated in 0.25 mum SiGe:C HBT technology with f T /f max 200 GHz. The static divider including the buffer works with a 3.5 V ...
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This paper reports a 71 GHz static and a 103 GHz regenerative dynamic frequency divider fabricated in 0.25 mum SiGe:C HBT technology with f T /f max 200 GHz. The static divider including the buffer works with a 3.5 V single supply voltage and consumes 140 mW with 42 mW for the master-slave flip-flop (FF). The high speed/power ratio makes it attractive for high-frequency wireless communication systems. The dynamic frequency divider operates from 24 GHz to 103 GHz with 5.2 V voltage supply and consumes 195 mW including the buffer with 41 mW for the divider core, and it can be applied at higher frequencies in low power millimeter wave systems
A 25 GHz ring VCO is fabricated in a 0.12mum SiGe bicmos process. The VCO with a 3.3V supply consumes 32mA. The measured phase noise is -105dBc/Hz at 10MHz offset from the center frequency of 24.3 GHz. Design optimiza...
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A 25 GHz ring VCO is fabricated in a 0.12mum SiGe bicmos process. The VCO with a 3.3V supply consumes 32mA. The measured phase noise is -105dBc/Hz at 10MHz offset from the center frequency of 24.3 GHz. Design optimization techniques for high performance ring oscillators in a 0.12 mum SiGe HBT technology are discussed
The proceedings contains 48 papers. Topics discussed include advanced power technology, mixed signal technology options, radio frequency circuit blocks, high speed circuits, substrate effects and modelling, heterojunc...
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The proceedings contains 48 papers. Topics discussed include advanced power technology, mixed signal technology options, radio frequency circuit blocks, high speed circuits, substrate effects and modelling, heterojunction bipolar transistor optimization, thermal parameter extraction and electrostatic discharges, emerging technologies, bipolar device physics, radio frequency transceivers, bicmos platforms and noise and high frequency characterization.
In this paper, the key design device parameter of SOI such as the buried oxide thickness, lateral scaling, and thermal effect are studied by 2D device simulator DESSIStrade
In this paper, the key design device parameter of SOI such as the buried oxide thickness, lateral scaling, and thermal effect are studied by 2D device simulator DESSIStrade
The authors demonstrate a low-cost, high-performance, high-voltage complementary SiGe:C bicmos process. This technology offers three npn SiGe:C devices with f T /BV CEO values of 40GHz/5V, 63GHz/3.5V, and 120GHz/2.1V...
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The authors demonstrate a low-cost, high-performance, high-voltage complementary SiGe:C bicmos process. This technology offers three npn SiGe:C devices with f T /BV CEO values of 40GHz/5V, 63GHz/3.5V, and 120GHz/2.1V together with a 32GHz f T /35GHz f max / 4.4V pnp SiGe:C HBT by adding only three bipolar masks to the underlying RF-CMOS process. With two additional implant masks, a 150GHz, 2.2V npn HBT and either a 43GHz f T / 65GHz f max 4.2V pnp or a 38GHz f T / 70GHz f max , 5.8V pnp device can be fabricated additionally (in the npn case) or alternatively (pnp case) to the devices of the 3-mask module
In this work, we investigate the characteristics of collector current (I C ) and breakdown voltage (BV CEO ) of SiGe HBTs under the mechanical uniaxial stress by a four-point bending apparatus. DeltaI c and DeltaBV C...
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In this work, we investigate the characteristics of collector current (I C ) and breakdown voltage (BV CEO ) of SiGe HBTs under the mechanical uniaxial stress by a four-point bending apparatus. DeltaI c and DeltaBV CEO is found to be strain-polarity dependent, and there is a trade-off between DeltaI c and DeltaBV CEO at the same stress condition
The following topics are dealt with: advanced power technology, mixed-signal technology options, RF circuit blocks, high speed circuits, substrate effects and modelling, HBT optimization, thermal parameter extraction ...
The following topics are dealt with: advanced power technology, mixed-signal technology options, RF circuit blocks, high speed circuits, substrate effects and modelling, HBT optimization, thermal parameter extraction and ESD, emerging technologies, bipolar device physics, RF transceivers, bicmos platforms; noise and HF characterization.
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