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International Electron Devices meeting (IEDM)

作者： B. Heinemann D. Knoll R. Barth D. Bolze K. Blum J. Drews K.-E. Ehwald G.G. Fischer K. Kopke D. Kruger R. Kurps H. Rucker P. Schley W. Winkler H.-E. Wulf IHP Frankfurt Germany

High performance HBTs with f/sub T/, f/sub max/ and BV/sub CEO/ values of 100 GHz, 130 GHz, and 2.5 V, respectively, are demonstrated in a 0.25 /spl mu/m bicmos technology without epitaxially-buried subcollector, and deep trench isolation. High voltage devices with BV/sub CEO/ values of up to 9 V and BV/sub CEO/ /spl times/ f/sub T/ products above 220 VGHz can be produced on the same chip with no special mask.

关键词： Heterojunction bipolar transistors Voltage Isolation technology bicmos integrated circuits CMOS technology Diffusion tensor imaging Frequency System-on-a-chip Silicon germanium Germanium silicon alloys

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HBT before CMOS, a new modular SiGe bicmos integration scheme

HBT before CMOS, a new modular SiGe BiCMOS integration schem...

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International Electron Devices meeting (IEDM)

作者： D. Knoll H. Rucker B. Heinemann R. Barth J. Bauer D. Bolze K.E. Ehwald T. Grabolla U. Haak B. Hunger D. Kruger R. Kurps S. Marschmeyer H.H. Richter P. Schley B. Tillack W. Winkler IHP Frankfurt Germany

Demonstrates a novel HBT-before-CMOS integration scheme to integrate SiGe:C HBTs with a 130 nm gate length CMOS frontend. This scheme entirely eliminates the impact of the HBT thermal steps on CMOS characteristics, opening the way for easy, modular integration of high-performance HBTs into highly scaled CMOS technologies. C doping of the SiGe layer prevents the degradation of HBT parameters by critical CMOS thermal steps. This is demonstrated for SiGe:C HBTs with f/sub T//f/sub max/ values of 80/90 GHz fabricated in the HBT-before-CMOS scheme and in a benchmark HBT-only process.

关键词： Heterojunction bipolar transistors Silicon germanium Germanium silicon alloys bicmos integrated circuits CMOS technology CMOS process Thermal degradation Doping Radio frequency Oxidation

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bicmos and BiFET integrated circuits engineers to meet at BCTM

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IEEE Solid-State circuits Society Newsletter 2001年第3期6卷 4-4页

The 2001 bipolar/bicmos circuits and technology meeting (BCTM) will be held in Minneapolis, MN from 30 September to 2 October 2001. BCTM provides a forum for technical communication focused on the needs and interests of bipolar and bicmos engineers. The conference covers the design, performance, fabrication, testing, and application of bipolar, bicmos, and BiFET integrated circuits. This year's conference includes a Short Course, an evening banquet, several invited papers, a vendor exhibition, and a Best Student Paper award.

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Proceedings of the 1998 IEEE bipolar/bicmos circuits and technology meeting

Proceedings of the 1998 IEEE Bipolar/BiCMOS Circuits and Tec...

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Proceedings of the 1998 IEEE bipolar/bicmos circuits and technology meeting

The proceedings contains 44 papers from the 1998 IEEE bipolar/bicmos circuits and technology meeting. Topics discussed include: electrostatic discharge and radiation effects;analog designs;power devices;modeling and simulations;SiGe process technologies;radio frequency circuits and technologies;process technology for radio frequency applications;communication circuits;advanced silicon bipolar process technologies;and distortion, noise, and transient effects in bipolar transistors.

关键词： CMOS integrated circuits

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Silicon-based optical receivers in bicmos technology for advanced optoelectronic integrated circuits

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MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING 2000年第5-6期3卷 395-398页

作者： Kieschnick, K Zimmermann, H Seegebrecht, P Univ Kiel Lehrstuhl Halbleitertech D-24143 Kiel Germany

A double photodiode (DPD) and a phototransistor were implemented in an industrial 0.8 mum bipolar complementary metal oxide semiconductor (bicmos) n-well process. Both devices are 100% bicmos compatible, so that no process modifications were necessary. A -3 dB bandwidth of more than 200 MHz was measured for the DPD. The rise and fall times of the photodiode are less than Ins. By an optimized antireflection coating layer for a wavelength of 638 nm a quantum efficiency of eta = 95%, which corresponds to a responsivity of R = 0.49 A/W, is achievable. A phototransistor with a light-sensitive area of 53 x 53 mum(2) was developed. Its current amplification of B = 300 results in a much larger responsivity compared to the photodiodes. Measurements have shown a -3 dB bandwidth of 7.8 MHz for the phototransistor. (C) 2001 Elsevier Science Ltd. All rights reserved.

关键词： silicon-based photodetectors phototransistor photodiode optoelectronic integrated circuit (OEIC)

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Proceedings of the 1998 bipolar/bicmos circuits and technology meeting (Cat. No.98CH36198)

Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technolo...

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bipolar/bicmos circuits and technology meeting

Presents the front cover of the proceedings record.

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bipolar issues in advanced power bicmos technology

Bipolar issues in advanced power BiCMOS technology

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bipolar/bicmos circuits and technology meeting

作者： T. Efland J. Devore A. Hastings S. Pendharkar R. Teggatz Mixed Signal Analog Technology Development Texas Instruments Inc. Dallas TX USA

technology is driven by the evolving CMOS roadmap, and as a consequence, it is increasingly difficult to integrate high performance bipolar devices without unduly increasing process complexity. Designers want and need good NPN devices for key circuits; a table of some of these is outlined. bipolar device needs and the difficulties of device performance vs. integration are described for typical advanced power bicmos technology with respect to design concerns. Other bipolar issues relating to guard-ring, parasitics, and ESD concerns are also briefly discussed.

关键词： bicmos integrated circuits CMOS technology CMOS process Electrostatic discharge Integrated circuit technology Analog circuits bipolar transistors Signal processing Low voltage Robustness

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COM2 SiGe modular bicmos technology for digital, mixed-signal and RF applications

COM2 SiGe modular BiCMOS technology for digital, mixed-signa...

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2000 IEEE International Electron Devices meeting

作者： Carroll, M. Ivanov, T. Kuehne, S. Chu, J. King, C. Frei, M. Mastrapasqua, M. Johnson, R. Ng, K. Moinian, S. Martin, S. Huang, C. Hsu, T. Nguyen, D. Singh, R. Fritzinger, L. Esry, T. Moller, W. Kane, B. Abeln, G. Hwang, D. Orphee, D. Lytle, S. Roby, M. Vitkavage, D. Chesire, D. Ashton, R. Shuttleworth, D. Thoma, M. Choi, S. Lewellen, S. Mason, P. Lai, T. Hsieh, H. Dennis, D. Harris, E. Thomas, S. Gregor, R. Sana, P. Wu, W. Bell Laboratories Lucent Technologies Orlando FL United States

The COM2 SiGe modular bicmos technology has been developed to allow efficient design and manufacturing of digital, mixed-signal, and RF integrated circuits, as well as enabling system-on-chip (SOC) integration. The technology is based on the 0.16μm COM2 digital CMOS process which features 1.5V NMOS and PMOS transistors with 2.4nm gate oxide, 0.135μm gate length, and up to 7 metal levels. technology enhancement modules including dense SRAM, SiGe NPN bipolar transistor, and a variety of passive components have been developed to allow the COM2 technology to be cost-effectively optimized for a wide range of applications.

关键词： CMOS integrated circuits

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ESD protection for bicmos circuits

ESD protection for BiCMOS circuits

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bipolar/bicmos circuits and technology meeting

作者： S. Joshi P. Juliano E. Rosenbaum G. Kaatz Sung-Mo Kang Coordinated Science Laboratory Department of Electrical and Computer Engineering University of Illinois Urbana-Champaign Urbana IL USA Motorola Inc. Libertyville IL USA

We introduce two new ESD protection elements suitable for use in bicmos process technology-a grounded gate NMOS built inside a junction-isolated p-well which acts as a lateral NPN, and a modified Zener-triggered verti... 详细信息

关键词： Electrostatic discharge Protection bicmos integrated circuits MOS devices Resistors Radio frequency Electric breakdown Parasitic capacitance Breakdown voltage Isolation technology

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A cost-effective 0.25 /spl mu/m L/sub eff/ bicmos technology featuring graded-channel CMOS (GCMOS) and a quasi-self-aligned (QSA) NPN for RF wireless applications

A cost-effective 0.25 /spl mu/m L/sub eff/ BiCMOS technology...

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bipolar/bicmos circuits and technology meeting

作者： F.K. Chai C. Kyono V. Ilderem M. Kaneshiro D. Zupac S. Bigelow C. Ramiah P. Dahl R. Braithwaite D. Morgan S. Hildreth G. Grynkewich Semiconductor Product Sector Motorola Digital DNA Laboratories Mesa AZ USA

A cost-effective 0.25 /spl mu/m L/sub eff/ graded-channel bicmos technology is reported. GCMOS devices offer superior transconductance and short-channel effects to transistors with conventional laterally uniform chann... 详细信息

关键词： CMOS technology bicmos integrated circuits MOSFETs Implants Isolation technology Capacitors Radio frequency bipolar transistors Doping Wireless communication

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