The proceedings contain 42 papers. The topics discussed include: an accurate and efficient simulation-based analysis for worst case interruption delay;automatic performance model construction for the fast software exp...
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ISBN:
(纸本)1595935436
The proceedings contain 42 papers. The topics discussed include: an accurate and efficient simulation-based analysis for worst case interruption delay;automatic performance model construction for the fast software exploration of new hardware designs;supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embeddedsystems;adapting compilation techniques to enhance the packing of instructions into registers;a network agent for diagnosis and analysis of real-time Ethernet networks;memory optimization by counting points in integer transformations of parametric polytopes;incremental elaboration for run-time reconfigurable hardware designs;adaptive and flexible dictionary code compression for embedded applications;automated compile-time and run-time techniques to increase usable memory in MMU-less embeddedsystems;and scalable subgraph mapping for acyclic computation accelerators.
The proceedings contain 33 papers from the cases 2003: internationalconference on compilers, architecture, and synthesis for embeddedsystems. The topics discussed include: Moving from embeddedsystems to embedded co...
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ISBN:
(纸本)1581136765
The proceedings contain 33 papers from the cases 2003: internationalconference on compilers, architecture, and synthesis for embeddedsystems. The topics discussed include: Moving from embeddedsystems to embedded computing;vectorizing for a SIMdD DSP architecture;simple offset assignment in presence of subword data;efficient spill code for SDRAM;cluster assignment of global values for clustered VLIW processors;extending STI for demanding hard-real-time systems;clustered calculation of worst-case execution times;task-level timing models for guaranteed performance in multiprocessor networks-on-chip;and system-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures.
The proceedings contain 33 papers. The topics discussed include: programming models and architectures for FGPA platforms;safely exploiting multithreaded processors to tolerate memory latency in real-time systems;dynam...
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ISBN:
(纸本)1581138903
The proceedings contain 33 papers. The topics discussed include: programming models and architectures for FGPA platforms;safely exploiting multithreaded processors to tolerate memory latency in real-time systems;dynamic on-chip memory management for chip multiprocessors;balancing design options with sherpa;disk drive energy optimization for audio-video applications;high level power analysis for on-chip networks;static program analysis of embedded executable assembly code;general loop fusion technique for nested loops considering timing and code size;and modular design through component abstraction.
The proceedings contain 32 papers. The topics discussed include: exploiting pipelining to relax register-file port constraints of instruction-set extensions;exploring the design space of LUT-based transparent accelera...
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ISBN:
(纸本)159593149X
The proceedings contain 32 papers. The topics discussed include: exploiting pipelining to relax register-file port constraints of instruction-set extensions;exploring the design space of LUT-based transparent accelerators;automating custom-precision function validation for embedded processors;energy management for commodity short-bit-width microcontrollers;anomalous path detection with hardware support;hardware support for code integrity in embedded processors;segment protection for embeddedsystems using run-time checks;compilation techniques for energy reduction in horizontally partitioned cache architectures;verfiable annotations for embedded Java environment;and optimizing stream programs using linear state space analysis.
The proceedings contain 6 papers. The topics discussed include: work-in-process: error-compensation-based energy-efficient MAC unit for CNNs;WIP: automatic DNN deployment on heterogeneous platforms: the GAP9 case stud...
ISBN:
(纸本)9798400702907
The proceedings contain 6 papers. The topics discussed include: work-in-process: error-compensation-based energy-efficient MAC unit for CNNs;WIP: automatic DNN deployment on heterogeneous platforms: the GAP9 case study;work-in-process: error-compensation-based energy-efficient MAC Unit for CNNs;work-in-progress: towards evaluating CNNs against integrity attacks on multi-tenant computation;designing an edge inferencing accelerator with high-level synthesis;and non-volatile memories: challenges and opportunities for embedded system architectures with focus on machine learning applications.
The proceedings contain 38 papers. The topics discussed include: a near-optimal instruction scheduler for a tightly constrained, variable instruction set embedded processor;components for embedded software: the PECOS ...
ISBN:
(纸本)1581135750
The proceedings contain 38 papers. The topics discussed include: a near-optimal instruction scheduler for a tightly constrained, variable instruction set embedded processor;components for embedded software: the PECOS approach;efficient architecture/compiler co-exploration for ASIPs;cycle-time aware architecturesynthesis of custom hardware accelerators;an adaptive chip-multiprocessor architecture for future mobile terminals;towards automatic synthesis of a class of application-specific sensor networks;bit section instruction set extension of ARM for embedded applications;code coverage and input variability: effects on architecture and compiler research;an integrated approach to reducing power dissipation in memory hierarchies;embedded cache architecture with programmable write buffer support for power and performance flexibility;increasing power efficiency of multi-core network processors through data filtering;cost effective memory disambiguation for multimedia codes;and leakage-proof program partitioning.
The proceedings contain 8 papers. The topics discussed include: detecting and defending vulnerabilities in heterogeneous and monolithic systems: current strategies and future directions;enabling energy-efficient AI co...
ISBN:
(纸本)9798350356373
The proceedings contain 8 papers. The topics discussed include: detecting and defending vulnerabilities in heterogeneous and monolithic systems: current strategies and future directions;enabling energy-efficient AI computing: leveraging application-specific approximations;efficient neural networks: from SW optimization to specialized HW accelerators;what do transformers have to learn from biological spiking neural networks?;primer on data in quantum machine learning;work-in-progress: ACPO: an AI-enabled compiler framework;and work-in-progress: temporal RegionDrop - frame difference sparsity for efficient video inference.
The proceedings contain 7 papers. The topics discussed include: run-time accuracy reconfigurable stochastic computing for dynamic reliability and power management: work-in-progress;effective profiling for data-intensi...
ISBN:
(纸本)9781728191928
The proceedings contain 7 papers. The topics discussed include: run-time accuracy reconfigurable stochastic computing for dynamic reliability and power management: work-in-progress;effective profiling for data-intensive GPU programs: work-in-progress;page reuse in cyclic thrashing of GPU under oversubscription: work-in-progress;the shift PUF: technique for squaring the machine learning complexity of arbiter-based PUFs: work-in-progress;a lifelong health monitoring framework in processors: work-in-progress;work-in-process: smart migration for reliability enhancement of 3D TLC NAND flash storage systems;and towards quality-driven approximate software generation for accurate hardware: work-in-progress.
The proceedings contain 25 papers. The topics discussed include: embedded system and application aware design of deregulated energy delivery systems;optimizing mobile display brightness by leveraging human visual perc...
ISBN:
(纸本)9781467383202
The proceedings contain 25 papers. The topics discussed include: embedded system and application aware design of deregulated energy delivery systems;optimizing mobile display brightness by leveraging human visual perception;quadseal: quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks;approximate acceleration: a path through the era of dark silicon and big data;does customizing inexactness help over simplistic precision (bit-width) reduction? a case study;energy-interference-free system and toolchain support for energy-harvesting devices;evaluating and exploiting impacts of dynamic power management schemes on system reliability;exploiting cache conflicts to reduce radiation sensitivity of operating systems on embeddedsystems;optimization of multi-channel BCH error decoding for common cases;program analysis for approximation-aware compilation;and approximation-aware multi-level cells STT-RAM cache architecture.
The proceedings contain 27 papers. The topics discussed include: a light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization;ZebraNet and beyond: applicati...
ISBN:
(纸本)9781605584690
The proceedings contain 27 papers. The topics discussed include: a light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization;ZebraNet and beyond: applications and systems support for mobile, dynamic networks;non-intrusive dynamic application profiler for detailed loop execution characterization;exploring and predicting the architecture/optimizing compiler co-design space;compiling custom instructions onto expression-grained reconfigurable architectures;dynamic coprocessor management for FPGA-enhanced compute platforms;power on demand for mobile computing devices;efficiency and scalability of barrier synchronization on NoC based many-core architectures;decoupled root scanning in multi-processor systems;and efficient code caching to improve performance and energy consumption for Java applications.
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