检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

350 篇 会议
31 篇 期刊文献

馆藏范围

381 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

266 篇 工学
- 259 篇 计算机科学与技术...
- 173 篇 软件工程
- 67 篇 电气工程
- 48 篇 电子科学与技术（可...
- 33 篇 信息与通信工程
- 23 篇 动力工程及工程热...
- 20 篇 控制科学与工程
- 6 篇 机械工程
- 5 篇 材料科学与工程（可...
- 4 篇 化学工程与技术
- 3 篇 力学（可授工学、理...
- 3 篇 光学工程
- 3 篇 生物工程
- 2 篇 仪器科学与技术
- 2 篇 生物医学工程（可授...
- 1 篇 建筑学
- 1 篇 土木工程
- 1 篇 测绘科学与技术
- 1 篇 石油与天然气工程
74 篇 理学
- 59 篇 数学
- 12 篇 系统科学
- 7 篇 物理学
- 5 篇 统计学（可授理学、...
- 3 篇 化学
- 3 篇 生物学
43 篇 管理学
- 36 篇 管理科学与工程(可...
- 29 篇 工商管理
- 9 篇 图书情报与档案管...
6 篇 经济学
- 6 篇 应用经济学
5 篇 法学
- 5 篇 社会学

主题

115 篇 embedded systems
29 篇 computer archite...
27 篇 hardware
18 篇 embedded system
16 篇 program processo...
10 篇 memory managemen...
9 篇 system-on-chip
8 篇 application soft...
8 篇 throughput
8 篇 random access me...
8 篇 high level synth...
8 篇 field programmab...
7 篇 energy consumpti...
7 篇 computational mo...
7 篇 computer aided s...
7 篇 energy efficienc...
6 篇 runtime
6 篇 reliability
6 篇 real time system...
6 篇 space exploratio...

机构

3 篇 department of co...
3 篇 tech univ denmar...
3 篇 center for embed...
3 篇 embedded systems...
3 篇 department of el...
3 篇 tech univ darmst...
2 篇 friedrich alexan...
2 篇 univ michigan 22...
2 篇 tu dresden
2 篇 center for embed...
2 篇 univ new south w...
2 篇 university of tw...
2 篇 instituto tecnol...
2 篇 school of comput...
2 篇 advanced compute...
2 篇 budapest univ te...
2 篇 univ new south w...
2 篇 univ lille crist...
2 篇 lamarr inst. for...
2 篇 center for embed...

作者

8 篇 dutt nikil
7 篇 shrivastava avir...
7 篇 barua rajeev
6 篇 palem krishna v.
5 篇 dean alexander g...
5 篇 jörg henkel
5 篇 henkel joerg
4 篇 raghunathan anan...
4 篇 ienne paolo
4 篇 madsen jan
4 篇 pozzi laura
4 篇 vahid frank
4 篇 pop paul
4 篇 andreas koch
3 篇 ha soonhoi
3 篇 homayoun houman
3 篇 koch andreas
3 篇 parameswaran sri
3 篇 hu xiaobo sharon
3 篇 marwedel peter

语言

380 篇 英文
1 篇 中文

检索条件"任意字段=CASES 2006: International Conference on Compilers, Architecture and Synthesis for Embedded Systems"

共 381 条记录，以下是331-340 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Moving from embedded systems to embedded computing

Moving from embedded systems to embedded computing

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Fisher, Joseph A. Hewlett Packard Labs United States

ISBN: (纸本)1581136765

In the middle of the last decade, there was a large gulf between embedded systems and general-purpose computing. Most researchers and advanced developers in general-purpose computing thought naively that real-time considerations added a little twist, but after that it was mostly a matter of size. Their impression was that embedded systems were just like general-purpose systems, but smaller. At the same time, those working in embedded systems were usually insufficiently aware of progress in computing that could be applied to what they were doing, and felt that theirs was a discipline apart. This talk address lessons my colleagues and I learned while working in embedded systems over the past decade. Many of these lessons are reflections of the coming fundamental shifts in embedded systems. The changes caused by higher silicon densities and greater performance are pulling embedded systems towards general-purpose computing, and the embedded field can no longer afford to ignore progress in architecture, compilers and general-purpose operating systems and tools. At the same time, there is a unique flavor to embedded, and some aspects of this different flavor will survive the changes. I'll discuss this shift in relation to questions of customization, special-purpose functionality in hardware vs. software, and similar topics.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Energy aware algorithm design via probabilistic computing: From algorithms and models to moore's law and novel (Semiconductor)devices

Energy aware algorithm design via probabilistic computing: F...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Palem, Krishna V. Center for Research in Embedded Systems and Technology School of Electrical and Computer Engineering Georgia Institute of Technology 777 Atlantic Drive Atlanta GA United States

ISBN: (纸本)1581136765

The significance of probabilistic computing to energy aware algorithm design, is discussed. The formulations of energy complexity characterizing the energy consumed in the context of RsBRAM and a network of switches, respectively, are dependent only on the thermodynamics and thus independent of specific technology parameters of a particular device implementation. Through the interpretation of probabilistic computing, energy savings can be achieved much as the purely mathematical formulations of probabilistic computing. They have been shown to yield algorithmic improvements using conventional measures of computational complexity such as the running time.

关键词： Semiconductor devices

来源：评论

学校读者我要写书评

暂无评论

A new look at exploiting data parallelism in embedded systems

A new look at exploiting data parallelism in embedded system...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Hunter, Hillery C. Moreno, Jaime H. Center for Reliable and High-Performance Computing Department of Electrical and Computer Engineering University of Illinois Urbana-Champaign United States IBM Research Division T.J. Watson Research Center Yorktown Heights NY United States

ISBN: (纸本)1581136765

This paper describes and evaluates three architectural methods for accomplishing data parallel computation in a programmable embedded system. Comparisons are made between the well-studied Very Long Instruction Word (VLIW) and Single Instruction Multiple Packed Data (SIM pD) paradigms;the less-common Single Instruction Multiple Disjoint Data (SIM dD) architecture is described and evaluated. A taxonomy is defined for data-level parallel architectures, and patterns of data access for parallel computation are studied, with measurements presented for over 40 essential telecommunication and media kernels. While some algorithms exhibit data-level parallelism suited to packed vector computation, it is shown that other kernels are most efficiently scheduled with more flexible vector models. This motivates exploration of non-traditjonal processor architectures for the embedded domain. Copyright 2003 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Reducing code size for heterogeneous-connectivity-based VLIW DSPs through synthesis of instruction set extensions

Reducing code size for heterogeneous-connectivity-based VLIW...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Biswas, Partha Dutt, Nikil Center for Embedded Computer Systems School of Information and Computer Science University of California Irvine CA 92697 United States

ISBN: (纸本)1581136765

VLIW DSP architectures exhibit heterogeneous connections between functional units and register files for speeding up special tasks. Such architectural characteristics can be effectively exploited through the use of complex instruction set extensions (ISEs). Although VLIWs are increasingly being used for DSP applications to achieve very high performance, such architectures are known to suffer from increased code size. This paper addresses how to generate ISEs that can result in significant code size reduction in VLIW DSPs without degrading performance. Unfortunately, contemporary techniques for instruction set synthesis fail to extract legal ISEs for heterogeneous-connectivity-based architectures. We propose a Heuristic-based algorithm to synthesize ISEs for a generalized heterogeneous-connectivity-based VLIW DSP architecture. We achieve an average code size reduction of 25% on the MiBench suite with no penalty in performance by applying our ISE generation algorithm on the TI TMS320C6xx, a representative VLIW DSP. Copyright 2003 ACM.

关键词： Digital signal processing

来源：评论

学校读者我要写书评

暂无评论

Frequent loop detection using efficient non-intrusive on-chip hardware

Frequent loop detection using efficient non-intrusive on-chi...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Gordon-Ross, Ann Vahid, Frank Department of Computer Science and Engineering University of California Riverside United States Center for Embedded Computer Systems UC Irvine United States

ISBN: (纸本)1581136765

Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting frequently executed code, or "critical regions." Previous critical region detectors have been targeted to desktop processors. We introduce a critical region detector targeted to embedded processors, with the unique features of being very size and power efficient, and being completely non-intrusive to the software's execution - features needed in timing-sensitive embedded systems. Our detector not only finds the critical regions, but also determines their relative frequencies, a potentially important feature for selecting among alternative dynamic optimization methods. Our detector uses a tiny cache coupled with a small amount of logic. We provide results of extensive explorations across seventeen embedded system benchmarks. We show that highly accurate results can be achieved with only a 0.02% power overhead and acceptable size overhead. Our detector is currently being used as part of a dynamic hardware/software partitioning approach, but is applicable to a wide-variety of situations. Copyright 2003 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

A hierarchical approach for energy efficient application design using heterogeneous embedded systems

A hierarchical approach for energy efficient application des...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Mohanty, Sumit Prasanna, Viktor K. University of Southern California 3740 McClintock Ave. Los Angeles CA 90089 United States

ISBN: (纸本)1581136765

Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application design using heterogeneous embedded systems. However, more choices during application design results in a large design space that must be traversed efficiently. In this paper, we propose a hierarchical methodology that integrates optimization heuristics, high-level performance estimators, and low-level simulators to enable efficient exploration of large design spaces. Our methodology is fast, robust against approximation errors due to high-level modeling, and can evaluate a much larger design space than an optimization heuristic only design space exploration technique. We have augmented MILAN, a model-based integrated simulation framework for embedded systems, to develop an environment to perform hierarchical design space exploration. Using our methodology for a beamforming application, we identify an energy-efficient mapping onto a heterogeneous embedded system while meeting a given latency constraint. We also demonstrate the use of our methodology in identifying an energy and latency efficient heterogeneous embedded system based on user-specified performance requirements for a personnel detection algorithm from a set of devices that includes FPGAs, DSPs, and traditional processors. Copyright 2003 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

A scalable wide-issue clustered VLIW with a reconfigurable interconnect

A scalable wide-issue clustered VLIW with a reconfigurable i...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Colavin, Osvaldo Rizzo, Davide STMicroelectronics Inc. 4690 Executive Dr. San Diego CA 92121 United States

ISBN: (纸本)1581136765

Clustered VLIW architectures have been widely adopted in modern embedded multimedia applications for their ability to exploit high degrees of ILP with reasonable trade-off in complexity and silicon costs. Studies have however shown limited performance scaling for wide-issue machines. In this paper we describe the architecture of a clustered VLIW with a runtime reconfigurable inter-cluster bus suitable to address such scalability problem. The architecture is aimed at kernel loops acceleration through a coprocessor approach and allows a customization of the interconnect between neighboring register files before each loop execution. We have adopted an inter-cluster communication mechanism based on a constant-complexity interconnect. The complexity and latency independent of the number of clusters preserve the scalability on issue-width. To handle the limited connectivity, the interconnection resources in the inter-cluster bus are exposed to the compiler, and scheduled like other resources with an adapted version of modulo scheduling. Other relevant features include the capability to define shifting queues in the register files, for a more effective software pipelining support. The addition of a limited amount of reconfigurability to the well established VLIW programming model results in low-overhead inter-cluster communications and a scalable ILP architecture. Simulation results show that we can achieve near linear scalability for certain classes of kernel loops. Copyright 2003 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Task-level timing models for guaranteed performance in multiprocessor networks-on-chip

Task-level timing models for guaranteed performance in multi...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Poplavko, P. Basten, T. Bekooij, M. Van Meerbergen, J. Mesman, B. Department of Electrical Engineering Eindhoven University of Technology P.O. Box 513 NL-5600 MB Eindhoven Netherlands Embedded Systems and Architectures on Silicon Philips Research Laboratories Eindhoven WDC 31 Prof. Holstlaan 4 NL-5656 AA Eindhoven Netherlands

ISBN: (纸本)1581136765

We consider a dynamic application running on a multiprocessor network-on-chip as a set of independent jobs, each job possibly running on multiple processors. To provide guaranteed quality and performance, the scheduling of jobs, jobs themselves and the hardware must be amenable to timing analysis. For a certain class of applications and multiprocessor architectures, we propose exact timing models that effectively co-model both the computation and communication of a job. The models are based on interprocessor communication (IPC) graphs [4]. Our main contribution is a precise model of network-on-chip communication, including buffer models. We use a JPEG-decoder job as an example to demonstrate that our models can be used in practice to derive upper bounds on the job execution time and to reason about optimal buffer sizes. Copyright 2003 ACM.

关键词： Interconnection networks

来源：评论

学校读者我要写书评

暂无评论

Encryption overhead in embedded systems and sensor network nodes: Modeling and analysis

Encryption overhead in embedded systems and sensor network n...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Venugopalan, Ramnath Ganesan, Prasanth Peddabachagari, Pushkin Dean, Alexander Mueller, Frank Sichitiu, Mihail Center for Embedded Systems Research Depts. of ECE and CS North Carolina State University Raleigh NC 27695

ISBN: (纸本)1581136765

Recent research in sensor networks has raised issues of security for small embedded devices. Security concerns are motivated by the deployment of a large number of sensory devices in the field. Limitations in processing power, battery life, communication bandwidth and memory constrain the applicability of existing cryptography standards for small embedded devices. A mismatch between wide arithmetic for security (32 bit word operations) and embedded data bus widths (often only 8 or 16 bits) combined with lack of certain operations (e.g., multiply) in the ISA present other challenges. This paper offers two contributions. First, a survey investigating the computational requirements for e a number of common cryptographic algorithms and embedded architectures is presented. The objective of this work is to cover a wide class of commonly used encryption algorithms and to determine the impact of embedded architectures on their performance. This will help designers predict a system's performance for cryptographic tasks. Second, methods to derive the computational overhead of embedded architectures in general for encryption algorithms are developed. This allows one to project computational limitations and determine the threshold of feasible encryption schemes under a set of the constraints for an embedded architecture. Experimental measurements indicate uniform cryptographic cost for each encryption class and each architecture class and negligible impact of caches. RC4 is shown to outperform RC5 for the Atmega platform. But when message authentication is required in addition to encryption, hash or block ciphers, such as RC5, have the advantage of providing support for both authentication and encryption. The analytical model allows to assess the impact of arbitrary embedded architectures as a multi-variant function for each encryption scheme. Overall, our results are not only valuable to assess the feasibility of encryption schemes for existing embedded architectures, they als

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Power efficient encoding techniques for off-chip data buses

Power efficient encoding techniques for off-chip data buses

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Suresh, Dinesh C. Agrawal, Banit Yang, Jun Najjar, Walid Bhuyan, Laxmi Computer Science and Engineering University of California Riverside CA 92521 United States

ISBN: (纸本)1581136765

Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as they consume a significant amount of total power. Since the bus power consumption is proportional to the switching activity, reducing the bus switching is an effective way to reduce bus power. While numerous techniques exist for reducing bus power in address buses, only a handful of techniques have been proposed for data-bus power reduction, where Frequent Value Encoding (FVE) is the best existing scheme to reduce the transition activity on the data buses. In this paper, we propose improved frequent value data-bus encoding techniques aimed at reducing more switching activity and hence, more power consumption. We propose three new schemes and five new variations to exploit bit-wise temporal and spatial locality in the data bus values. Our technique does not use additional external control signal and captures bit-wise locality to efficiently encode data values. For all the embedded and SPEC applications we tested, the overall average switching reduction is 53% over unencoded data and 11% more than the conventional FVE scheme. Copyright 2003 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共39页 << < 30 31 32 33 34 35 36 37 38 39 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：