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检索条件"任意字段=CASES 2006: International Conference on Compilers, Architecture and Synthesis for Embedded Systems"
381 条 记 录,以下是331-340 订阅
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Dynamic template generation for resource sharing in control and data flow graphs
Dynamic template generation for resource sharing in control ...
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international conference on VLSI Design
作者: D.C. Zaretsky G. Mittal R.P. Dick P. Banerjee Department of Electrical Electrical & Computer Science Northwestern University Evanston IL USA College of Engineering University of Illinois Chicago Chicago IL USA
High-level synthesis compilers often produce reoccurring patterns in intermediate CDFGs during translation. By identifying large reoccurring patterns, one may reduce area and communication overhead by efficiently reus... 详细信息
来源: 评论
Efficient Tracing Methodology Using Automata Processor
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ACM TRANSACTIONS ON embedded COMPUTING systems 2019年 第5期18卷 80-80页
作者: Seo, Minjun Kurdahi, Fadi Univ Calif Irvine Ctr Embedded Cyber Phys Syst Irvine CA 92617 USA
Tracing or trace interface has been used in various ways to find system defects or bugs. As embedded systems are increasingly used in safety-critical applications, tracing can provide useful information during system ... 详细信息
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An Area-Efficient Reed-Solomon Decoder for HDTV Channel Demodulation
An Area-Efficient Reed-Solomon Decoder for HDTV Channel Demo...
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IEEE/ASME international conference on Mechtronic and embedded systems and Applications, MESA
作者: Yan Fei Guo Zhan Cai Li Qin Wang Information Engineering School University of Science and Technology Beijing China
In this paper, an area-efficient pipelined very large scale integration (VLSI) architecture is proposed for Reed-Solomon (RS) decoding. The proposed architecture is exploited based on the features of vector operations... 详细信息
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TLM/network design space exploration for networked embedded systems
TLM/network design space exploration for networked embedded ...
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international conference on Hardware/Software Codesign and System synthesis (CODES)
作者: D. Quaglia F. Fummi N. Bombieri Dipartimento di Informatica Universitá di Verona Verona Italy
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design dimension is added to the traditional TL... 详细信息
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Proceedings of the 2006 international conference on Computer-Aided Design
Proceedings of the 2006 International Conference on Computer...
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IEEE international conference on Computer-Aided Design
The following topics are dealt with: parasitic simulation; parasitic modeling; post-placement optimization; variation modeling; multicore systems; embedded systems; UML; systemC; industrial ESL design; delay test gene...
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Deriving Equations from Sensor Data Using Dimensional Function synthesis
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ACM TRANSACTIONS ON embedded COMPUTING systems 2019年 第5期18卷 84-84页
作者: Wang, Youchao Willis, Sam Tsoutsouras, Vasileios Stanley-Marbell, Phillip Univ Cambridge 9 JJ Thomson Ave Cambridge CB3 0FA England
We present a new method for deriving functions that model the relationship between multiple signals in a physical system. The method, which we call dimensional function synthesis, applies to data streams where the dim... 详细信息
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CaffePresso: An optimized library for Deep Learning on embedded accelerator-based platforms
CaffePresso: An optimized library for Deep Learning on embed...
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Proceedings of the international conference on compilers, architectures and synthesis for embedded systems (cases)
作者: Gopalakrishna Hegde Siddhartha Nachiappan Ramasamy Nachiket Kapre School of Computer Science and Engineering Nanyang Technological University Singapore
Off-the-shelf accelerator-based embedded platforms offer a competitive energy-efficient solution for lightweight deep learning computations over CPU-based systems. Low-complexity classifiers used in power-constrained ... 详细信息
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End-to-End Timing Analysis of Sporadic Cause-Effect Chains in Distributed systems
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ACM TRANSACTIONS ON embedded COMPUTING systems 2019年 第5期18卷 58-58页
作者: Duerr, Marco Von Der Brueggen, Georg Chen, Kuan-Hsun Chen, Jian-Jia TU Dortmund Univ Dortmund Germany
A cause-effect chain is used to define the logical order of data dependent tasks, which is independent from the execution order of the jobs of the (periodic/sporadic) tasks. Analyzing the worst-case End-to-End timing ... 详细信息
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ILP-based modulo scheduling for high-level synthesis
ILP-based modulo scheduling for high-level synthesis
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Proceedings of the international conference on compilers, architectures and synthesis for embedded systems (cases)
作者: Julian Oppermann Andreas Koch Melanie Reuter-Oppermann Oliver Sinnen Embedded Systems and Applications Group Technische Universität Darmstadt Germany Discrete Optimization and Logistics Group Karlsruhe Institute of Technology Germany Parallel and Reconfigurable Computing Group University of Auckland New Zealand
In high-level synthesis, loop pipelining is a technique to improve the throughput and utilisation of hardware datapaths by starting new loop iterations after a fixed amount of time, called the initiation interval (II)... 详细信息
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D-PUF: An intrinsically reconfigurable DRAM PUF for device authentication in embedded systems
D-PUF: An intrinsically reconfigurable DRAM PUF for device a...
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Proceedings of the international conference on compilers, architectures and synthesis for embedded systems (cases)
作者: Soubhagya Sutar Arnab Raha Vijay Raghunathan School of Electrical and Computer Engineering Purdue University
Physically Unclonable Functions (PUFs) have proved to be an effective and low-cost measure against counterfeiting by providing device authentication and secure key storage services. Memory based PUF implementations ar... 详细信息
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