检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

350 篇 会议
31 篇 期刊文献

馆藏范围

381 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

266 篇 工学
- 259 篇 计算机科学与技术...
- 173 篇 软件工程
- 67 篇 电气工程
- 48 篇 电子科学与技术（可...
- 33 篇 信息与通信工程
- 23 篇 动力工程及工程热...
- 20 篇 控制科学与工程
- 6 篇 机械工程
- 5 篇 材料科学与工程（可...
- 4 篇 化学工程与技术
- 3 篇 力学（可授工学、理...
- 3 篇 光学工程
- 3 篇 生物工程
- 2 篇 仪器科学与技术
- 2 篇 生物医学工程（可授...
- 1 篇 建筑学
- 1 篇 土木工程
- 1 篇 测绘科学与技术
- 1 篇 石油与天然气工程
74 篇 理学
- 59 篇 数学
- 12 篇 系统科学
- 7 篇 物理学
- 5 篇 统计学（可授理学、...
- 3 篇 化学
- 3 篇 生物学
43 篇 管理学
- 36 篇 管理科学与工程(可...
- 29 篇 工商管理
- 9 篇 图书情报与档案管...
6 篇 经济学
- 6 篇 应用经济学
5 篇 法学
- 5 篇 社会学

主题

115 篇 embedded systems
29 篇 computer archite...
27 篇 hardware
18 篇 embedded system
16 篇 program processo...
10 篇 memory managemen...
9 篇 system-on-chip
8 篇 application soft...
8 篇 throughput
8 篇 random access me...
8 篇 high level synth...
8 篇 field programmab...
7 篇 energy consumpti...
7 篇 computational mo...
7 篇 computer aided s...
7 篇 energy efficienc...
6 篇 runtime
6 篇 reliability
6 篇 real time system...
6 篇 space exploratio...

机构

3 篇 department of co...
3 篇 tech univ denmar...
3 篇 center for embed...
3 篇 embedded systems...
3 篇 department of el...
3 篇 tech univ darmst...
2 篇 friedrich alexan...
2 篇 univ michigan 22...
2 篇 tu dresden
2 篇 center for embed...
2 篇 univ new south w...
2 篇 university of tw...
2 篇 instituto tecnol...
2 篇 school of comput...
2 篇 advanced compute...
2 篇 budapest univ te...
2 篇 univ new south w...
2 篇 univ lille crist...
2 篇 lamarr inst. for...
2 篇 center for embed...

作者

8 篇 dutt nikil
7 篇 shrivastava avir...
7 篇 barua rajeev
6 篇 palem krishna v.
5 篇 dean alexander g...
5 篇 jörg henkel
5 篇 henkel joerg
4 篇 raghunathan anan...
4 篇 ienne paolo
4 篇 madsen jan
4 篇 pozzi laura
4 篇 vahid frank
4 篇 pop paul
4 篇 andreas koch
3 篇 ha soonhoi
3 篇 homayoun houman
3 篇 koch andreas
3 篇 parameswaran sri
3 篇 hu xiaobo sharon
3 篇 marwedel peter

语言

380 篇 英文
1 篇 中文

检索条件"任意字段=CASES 2006: International Conference on Compilers, Architecture and Synthesis for Embedded Systems"

共 381 条记录，以下是341-350 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Extending STI for demanding hard-real-time systems

Extending STI for demanding hard-real-time systems

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Welch, Benjamin Kanaujia, Shobhit Seetharam, Adarsh Thirumalai, Deepaksrivats Dean, Alexander G. Center for Embedded Systems Research North Carolina State University Raleigh NC 27695-7256 United States

ISBN: (纸本)1581136765

Software thread integration (STI) is a compilation technique which enables the efficient use of an application's fine-grain idle time on generic processors without special hardware support. With STI, a primary function (with real-time requirements on specific instructions) is automatically interleaved with a secondary function to create a single implicitly multithreaded function which minimizes context switching and hence both improves performance and also offers very fine-grain concurrency. In this paper we extend STI techniques to address two challenges. First, we reduce response time for interrupts or other high-priority threads by introducing polling servers into integrated threads. Currently integrated threads disable interrupts, delaying all other work until their completion. Second, we enable integration with long host threads, expanding the domain of STI. With current techniques, if there are frequent interrupts, only host threads which can finish execution before the next interrupt can be integrated. We derive methods to evaluate the response time for threads in systems with and without these new integration methods. We demonstrate these concepts with the integration of various threads in a sample hard-real-time system on a highly-constrained microcontroller. We use an inexpensive 20 MHz AVR 8-bit microcontroller to generate monochrome NTSC video while servicing a high-speed (115.2 kbaud) serial communication link. We have built and tested this system and demonstrate graphics rendering speed-ups of 3.99x to 13.5x. Copyright 2003 ACM.

关键词： Real time systems

来源：评论

学校读者我要写书评

暂无评论

Compiler-decided dynamic memory allocation for scratch-pad based embedded systems

Compiler-decided dynamic memory allocation for scratch-pad b...

引用

cases 2003: international conference on compilers, architecture, and synthesis for embedded systems

作者： Udayakumaran, Sumesh Barua, Rajeev Department of Electrical and Computer Engineering University of Maryland College Park MD 20742 United States

ISBN: (纸本)1581136765

This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-managed SRAM memory that replaces the hardware-managed cache. It is motivated by its better real-time guarantees vs cache and by its significantly lower overheads in energy consumption, area and overall runtime, even with a simple allocation scheme [4]. Existing scratch-pad allocation methods are of two types. First, software-caching schemes emulate the workings of a hardware cache in software. Instructions are inserted before each load/store to check the software-maintained cache tags. Such methods in-cur large overheads in runtime, code size, energy consumption and SRAM space for tags and deliver poor real-time guarantees just like hardware caches. A second category of algorithms partitions variables at compile-time into the two banks. For example, our previous work in [3] derives a provably optimal static allocation for global and stack variables and achieves a speedup over all earlier methods. However, a drawback of such static allocation schemes is that they do not account for dynamic program behavior. It is easy to see why a data allocation that never changes at runtime cannot achieve the full locality benefits of a cache. In this paper we present a dynamic allocation method for global and stack data that for the first time, (i) accounts for changing program requirements at runtime (ii) has no software-caching tags (iii) requires no run-time checks (iv) has extremely low overheads, and (v) yields 100% predictable memory access times. In this method data that is about to be accessed frequently is copied into the SRAM using compiler-inserted code at fixed and infrequent points in the program. Earlier data is evicted if necessary. When compared to a provably optimal static allocation our results show runtime reductions ranging from 11% to 38%, averaging 31.2%, using no additional hardware

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

cases 2001 - Proceedings of the 2001 international conference on compilers, architecture, and synthesis for embedded systems

CASES 2001 - Proceedings of the 2001 International Conferenc...

引用

2nd international conference on compilers, architecture, and synthesis for embedded systems, cases 2001

ISBN: (纸本)1581133995

The proceedings contain 31 papers. The topics discussed include: design space characterization for architecture/compiler co-exploration;storage allocation for embedded processors;an empirical evaluation of high level transformations for embedded processors;a novel approach to code analysis of digital signal processing systems;the very portable optimizer for digital signal processors;patchable instruction ROM architecture;hardware compilation of sequential Ada;a new method for compiling schizophrenic synchronous programs;transparent data-memory organizations for digital signal processors;a vision for embedded software;combined partitioning and data padding for scheduling multiple loop nests;heterogeneous memory management for embedded systems;establishing a tight bound on task interference in embedded system instruction caches;personal, handheld, wireless: the future of digital technology;pattern matching in reconfigurable logic for packet classification;personal, handheld, wireless: the future of digital technology;efficient longest executable path search for programs with complex flows and pipeline effects;and tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Cycle-time aware architecture synthesis of custom hardware accelerators

Cycle-time aware architecture synthesis of custom hardware a...

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Sivaraman, Mukund Aditya, Shail Hewlett-Packard Labs. MS 1166 1501 Page Mill Road Palo Alto CA 94304 United States

ISBN: (纸本)1581135750

We present the cycle-time aware architecture synthesis methodology used in PICO-NPA that automatically synthesizes minimal cost RT-level designs from high-level specifications to meet a given cycle-time. This allows subsequent physical synthesis to succeed on first pass with predictable performance. The core of the methodology is a static timing analysis engine that is used at multiple levels - program-level, architecture-level and RT-level - in order to identify, schedule and validate useful operator chains that are incorporated into the design automatically. We present architecture synthesis results for several embedded applications and evaluate the benefits of this technique. Copyright 2002 ACM.

关键词： High level synthesis

来源：评论

学校读者我要写书评

暂无评论

Iterative procedural abstraction for code size reduction

Iterative procedural abstraction for code size reduction

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Kim, Dae-Hwan Lee, Hyuk Jae School of Electrical Engineering and Computer Science Seoul National University San 56-1 Shilim-Dong Kuanak-Gu Seoul Korea Republic of

ISBN: (纸本)1581135750

For code size reduction, an iterative approach for procedural abstraction is proposed. Contrary to the previous approaches, the proposed technique iterates saving estimation and procedural abstraction repeatedly based on estimated global saving. The global saving is dynamically re-calculated in each iteration. Experimental results show that the proposed approach achieves additional code size reduction on an average of 14.9% in 8 benchmarks when compared to the previous conventional approach. Copyright 2002 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors

Dynamic voltage leveling scheduling for real-time embedded s...

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Kuo, Jian-Liang Chen, Tien-Fu Department of Computer Science National Chung Cheng University Chiayi 621 Taiwan

ISBN: (纸本)1581135750

One of the energy reduction techniques for embedded systems is Dynamic Voltage Scaling (DVS), which varies processor voltage and clock to achieve desired performance while using minimal amount of energy. By using system control instruction on the voltage and clock-rate, the scheduler in operating systems can vary the execution environment to obtain energy deduction at a cost of the propagation delay and transition time. So minimizing energy and meeting the deadline of tasks are critical problems in hard real-time scheduling policy. In this paper, we propose off-line scheduling policies by leveling the voltage switching for hard real-time embedded systems as well as an online scheduling to take advantages of slack times. Copyright 2002 ACM.

关键词： Real time systems

来源：评论

学校读者我要写书评

暂无评论

Energy aware task scheduling with task synchronization for embedded real time systems

Energy aware task scheduling with task synchronization for e...

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Jejurikar, Ravindra Gupta, Rajesh Center for Embedded Computer Systems Department of Information and Computer Science University of California at Irvine Irvine CA 92697 United States

ISBN: (纸本)1581135750

Slowdown factors determine the extent of slowdown a computing system can experience based on functional and performance requirements. Dynamic Voltage Scaling (DVS) of a processor based on slowdown factors can lead to considerable energy savings. The problem of DVS in the presence of task synchronization has not yet been addressed. We compute slowdown factors for tasks which synchronize for access to shared resources. Tasks synchronize to enforce mutually exclusive access to these resources and can be blocked by lower priority tasks. We compute static slowdown factors for the tasks which guarantee meeting all the task deadlines. Our simulation experiments show on an average 25% energy gains over the known slowdown techniques. Copyright 2002 ACM.

关键词： Voltage scaling

来源：评论

学校读者我要写书评

暂无评论

Components for embedded software: The PECOS approach

Components for embedded software: The PECOS approach

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Genßler, Thomas Nierstrasz, Oscar Schönhage, Bastiaan Christoph, Alexander Winter, Michael Ducasse, Stéphane Wuyts, Roel Arévalo, Gabriela Müller, Peter Stich, Chris Germany University of Bern Switzerland Netherlands University of Bern Switzerland ABB Research Center Germany

ISBN: (纸本)1581135750

Software is more and more becoming the major cost factor for embedded devices. Already today, software accounts for more than 50 percent of the development costs of such a device. However, software development practices in this area lag far behind those in the traditional software industry. Reuse is hardly ever heard of in some areas, development from scratch is common practice and component-based software is usually a foreign word. PECOS is a collaborative project between industrial and research partners that seeks to enable component-based technology for a certain class of embedded systems known as "field devices" by taking into account the specific properties of this application area. In this paper we introduce a component model for field device software. Furthermore we report on the PECOS component composition language CoCo and the mapping from CoCo to Java and C++. Copyright 2002 ACM.

关键词： embedded systems

来源：评论

学校读者我要写书评

暂无评论

Towards automatic synthesis of a class of application-specific sensor networks

Towards automatic synthesis of a class of application-specif...

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Bakshi, Amol Ou, Jingzhao Prasanna, Viktor K. Dept. of EE-Systems University of Southern California Los Angeles CA 90089 United States

ISBN: (纸本)1581135750

Automatic synthesis of sensor network-based systems can be described as the process of translating a formal specification of application functionality into a particular task mapping, settings of available hardware knobs, and communication and coordination mechanisms among the sensor nodes, so as to meet the performance requirements and constraints. We propose a general methodology to tackle a specific class of this problem, based on analytical performance modeling, multigranularity system simulation, and automatic refinement of model parameters. To demonstrate the utility and feasibility of our proposed methodology, we define a system model for a class of sensor networks, and implement a software framework for its modeling and simulation. Our graphical design environment supports plug-and-play integration of different performance models, simulation and visualization suites, and even automatic design space exploration and optimization tools. Copyright 2002 ACM.

关键词： Energy efficiency

来源：评论

学校读者我要写书评

暂无评论

Dynamic battery state aware approaches for improving battery utilization

Dynamic battery state aware approaches for improving battery...

引用

2002 international conference on compilers, architecture, and synthesis for embedded systems, cases '02

作者： Park, Sung Srivastava, Mani B. Networked and Embedded Systems Lab. Electrical Engineering Department UCLA Los Angeles CA 90095 United States

ISBN: (纸本)1581135750

In this paper we introduce novel battery state aware strategies that improve the performance of battery operated systems. In our analysis, we consider the total amount of work done (or service) as the metric instead of considering just the lifetime. Based on our analysis using service curves, we formulate our static approach which generalizes many of the battery aware approaches introduced in the literatures. The results show that the static approach increases the battery utilization by 600% over a non battery aware approach. Furthermore, we show that our dynamic battery state aware approach improves upon the static approach by dynamically adapting the system performance level based on batteryes voltage slope. The results indicate that the dynamic approach achieves improvement of up to 20% over the static approach. Copyright 2002 ACM.

关键词： Electric batteries

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共39页 << < 30 31 32 33 34 35 36 37 38 39 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：