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共 462 条记录，以下是311-320 订阅

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Cumulant slices for two-dimensional autoregressive signal modeling

Cumulant slices for two-dimensional autoregressive signal mo...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Stathaki, P.T. Constantinides, Anthony G. Imperial Coll. London UK

ISBN: (纸本)0819416207

The research work reported in this paper is concerned with the use of higher order spectral estimation techniques as a means to deriving the parameters of 2D autoregressive (AR) models. Image analysis is examined from a higher order statistical perspective and in the context of noise. The objective is to develop analysis techniques through which robust autoregressive parameter estimation is accomplished. The approach taken involves the use of 2D AR models derive from third order cumulants. The directionality of the cumulant space influences the AR parameter estimation in a decisive manner. The specific application of the developed methods is in mammography, an area in which it is very difficult to discern the appropriate features. The results show significant discriminating gains through such techniques.

关键词： Image analysis

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Cumulant-based cubic difference tone (CDT) detectors for otoacoustic emissions (OAE) signals

Cumulant-based cubic difference tone (CDT) detectors for oto...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Swami, Ananthram Rao, Preeti CS-3 Los Angeles CA USA

ISBN: (纸本)0819416207

Interactions among spontaneous otoacoustic emissions (SOEs), which are narrow-band signals emitted by the cochlea, include the cubic difference tone (CDT) that occurs at frequency 2f 1 - f2 due to the nonlinear coupling of primary SOEs at f1 and f2. We show that appropriately defined trispectra and tricoherence may be used to detect the CDTs. OAE signals are also characterized by temporal variations in the amplitudes and frequencies;this leads to polynomial phase models, and multiplicative noise processes;we give closed-form expressions for the large sample CRLB for the parameters of the resulting model. We also consider cyclic approaches, and we compare polyperiodogram and periodogram based approaches for the detection of arbitrary frequency coupling laws. Some of the techniques are validated against real data.

关键词： signal detection

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Pipelining multiple singular value decomposition (SVDs) on a single processor array

Pipelining multiple singular value decomposition (SVDs) on a...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Kota, Kishore Cavallaro, Joseph R. Rice Univ. Houston TX USA

ISBN: (纸本)0819416207

We present a new family of architectures for processor arrays to implement Jacobi SVD which allow systolic loading and unloading of input and result matrices. Unlike most of the previous SVD arrays in the literature, our architectures do not require special handling of external I/O and hence are closer to the traditional concept of systolic architectures. The boundary processors communicate with the host the same way any of the interior processors communicate with their neighbors. The arrays are surprisingly uniform and simple. The various architectures in the family represent different throughput-hardware tradeoffs corresponding to the degree to which the multiple sweeps have been unrolled and determine the number of independent SVDs which may be pipelined on the array. We achieved systolic loading by using the flexibility provided by the cyclic Jacobi method on the order in which pivot pairs may be chosen. The array operates on the matrix data even as it is being loaded. Once the pipeline is full, the ordering is very similar to odd-even ordering. Our ordering is equivalent to cyclic-by-rows ordering and hence the algorithm is guaranteed to converge. Our systolic loading scheme is very important in an I/O limited system, since it allows more communication to occur in parallel, where the communication includes the loading and unloading operations. The array with the highest throughput in our family of architectures, which implement one-sided Jacobi (either Hestenes' method or Eberlein and Park's method), is a linear array of processors with unidirectional links between neighbors. The architectures with lower throughput require fewer processors connected in a ring, allowing data to recirculate among the processors. The input matrix is loaded one column at a time from the left and the results stream out one column at a time from the right.

关键词： Pipeline processing systems

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Redundant finite rings for fault-tolerant signal processors

Redundant finite rings for fault-tolerant signal processors

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advanced signal processing: algorithms, architectures, and implementations V

作者： Jullien, Graham A. Bizzan, S.S. Wigley, N.M. Miller, W.C. Univ. of Windsor Windsor ON Can

ISBN: (纸本)0819416207

Redundant Residue Number Systems (RRNS) have been proposed as suitable candidates for fault tolerance in compute intensive applications. The redundancy is based on multiple projections to moduli sub-sets and conducting a search for results that lie in a so-called illegitimate range. This paper presents RRNS fault tolerant procedures for a recently introduced finite polynomial ring mapping procedure (modulus replication RNS). The mapping technique dispenses with the need for many relatively prime ring moduli, which is a major draw-back with conventional RRNS systems. Although double, triple, and quadrupole modular redundancy can be implemented in the polynomial mapping structure, polynomial coefficient circuitry, or the independent direct product ring computational channels, for error detection and/or correction, this paper discusses the implementation of redundant rings which are generated by (1) redundant residues, (2) spare general computational channels, or (3) a combination of the two. The first architecture is suitable for RNS embedding in the MRRNS, and the second for single moduli mappings. The combination architecture allows a trade-off between the two extremes. The application area is in fault tolerant compute intensive DSP arrays.

关键词： Fault tolerant computer systems

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Application of algorithm-based fault tolerance to high-level synthesis of signal flow graphs

Application of algorithm-based fault tolerance to high-level...

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advanced signal processing: algorithms, architectures, and implementations V

作者： Karnik, Tanay Ramaswamy, Shankar Kang, Steve M. Banerjee, Prithviraj Univ. of Illinois/Urbana-Champaign Urbana IL USA

ISBN: (纸本)0819416207

Algorithm based fault tolerance techniques have been used for systolic processors and general purpose multiprocessors. In this paper, we have applied an algorithm based fault tolerance technique to high-level synthesis of signal flow graphs. The technique incorporates reliability into synthesized DSP filters. Given a signal Flow Graph representation for these filters, our schemes synthesize a reliable schedule for the operations in them and allocate functional units to the operations subject to hardware and reliability constraints. We impose reliability constraints to avoid compensating errors in fault detection. Our first scheme uses the well known duplicate and compare approach, while the second uses a novel linearity based checking approach used in algorithm based fault tolerance methods for matrix computations. The schemes have been implemented and results obtained by using them on sample signal flow graphs are presented. These results show the linearity based scheme to have a low time overhead. For example, this scheme takes about 10% extra time for the reliable synthesis of a 10th order IIR filter. Our proposed work extends previous work in the area in three directions: (1) use of linearity based checks, over duplication based checks, (2) handling cyclic flow graphs, over previous proposals for acyclic graphs, and (3) reliability constrained hardware mapping. Extensions of the schemes to nonlinear flow graphs is also proposed.

关键词： Fault tolerant computer systems

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AdaptLab: adaptive signal processing environment for education

AdaptLab: adaptive signal processing environment for educati...

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Asilomar conference on signals, Systems & Computers

作者： R.W. Stewart P. Aaserud Signal Processing Division Department of Electronic and Electrical Engineering University of Strathclyde Glasgow UK

Presents a software package to be used for the teaching adaptive signal processing. The aim of the Adapt-Lab software is to allow students to understand the fundamentals of real world adaptive signal processing by presenting adaptive algorithms, architectures and applications in a visual form. AdaptLab allows the single channel architectures of system identification, inverse system identification, noise cancellation, prediction and filtered-x implementations to be set up. The user can select adaptive filter type and length, algorithm parameters (such as step size, forgetting factor, leakage, update rate, etc), and an appropriate input signal from a signal generator or the on-disk signal library of typical input signals. The simulation can be started and the user can open signal windows (digital oscilloscope or spectrum analysis) at various points in the algorithm architecture. The simulation can be frozen or stopped at any point and algorithm parameters updated, or the simulation signal results and parameters stored.< >

关键词： Adaptive signal processing signal processing algorithms Computer architecture System identification Software packages Education Adaptive algorithm Application software Noise cancellation Adaptive filters

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UNIFYING PARAMETRIZED VLSI JACOBI algorithms AND architectures 4

UNIFYING PARAMETRIZED VLSI JACOBI ALGORITHMS AND ARCHITECTUR...

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： DEPRETTERE, EF MOONEN, M Delft Univ. of Technology (Netherlands) Katholieke Univ. Leuven (Belgium)

ISBN: (纸本)0819412767

Implementing Jacobi algorithms in parallel VLSI processor arrays is a non-trivial task, in particular when the algorithms are parametrized with respect to size and the architectures are parametrized with respect to space-time trade-offs. The paper is concerned with an approach to implement several time-adaptive Jacobi-type algorithms on a parallel processor array, using only Cordic arithmetic and asynchronous communications, such that any degree of parallelism, ranging from single-processor up to full-size array implementation, is supported by a `universal' processing unit. This result is attributed to a gracious interplay between algorithmic and architectural engineering.

关键词： Array processing signal processing Very large scale integration Computer aided design Parallel computing Process control MATLAB Computer architecture Detection and tracking algorithms Electrical engineering

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SYSTEMATIC CONSTRUCTION OF ORDER-RECURSIVE LS ESTIMATION algorithms WITH ELEMENTARY ORTHOGONAL TRANSFORMATIONS 4

SYSTEMATIC CONSTRUCTION OF ORDER-RECURSIVE LS ESTIMATION ALG...

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： LING, F Motorola (United States)

ISBN: (纸本)0819412767

This paper demonstrates that order-recursive least squares (ORLS) algorithms based on orthogonal transformations and hyperbolic transformations can be systematically constructed in two steps. The first step is to determine the structure of the ORLS algorithm according to the property of the data vector in the LS estimation and the requirements to the output. The second step is to determine the proper implementation of building blocks of the ORLS structure using orthogonal or hyperbolic transformations. The canonical ORLS structure and some possible orthogonal/hyperbolic implementations of their building blocks are presented. It is also shown that some of the orthogonal transformations are only applicable to certain types of ORLS structures and not to others.

关键词： Algorithm development Error analysis Detection and tracking algorithms Digital signal processing Expectation maximization algorithms Statistical analysis Factor analysis Magnesium Roads Telecommunications

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ERROR PROPAGATION OF SOME FAST RLS algorithms 4

ERROR PROPAGATION OF SOME FAST RLS ALGORITHMS

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： QIAO, SZ McMaster Univ. (Canada)

ISBN: (纸本)0819412767

The fast recursive least squares (RLS) algorithms have wide applications in signal processing and control. They are computationally efficient. Thus their stability is of major concern. In this paper, we investigate the error propagation and stability of some typical fast RLS algorithms. Through a random example, we show that a typical conventional fast RLS algorithm is weakly unstable in computing both the residuals and the gain vectors and a QR based algorithm is expected to be weakly stable in computing the residuals but weakly unstable in computing the gain vectors. We propose an error correction scheme for computing the gain vectors.

关键词： Algorithm development Condition numbers MATLAB Lead Process control signal processing Analytical research

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HIGHLY PIPELINED VLSI ARCHITECTURE FOR COMPUTATION OF FAST FOURIER-TRANSFORMS 4

HIGHLY PIPELINED VLSI ARCHITECTURE FOR COMPUTATION OF FAST F...

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4TH CONF ON advanced signal processing algorithms, architectures, AND implementations

作者： YEH, HJ Ecole Normale Superieure de Lyon (South Korea)

ISBN: (纸本)0819412767

An on-chip VLSI architecture for computation of Fourier transforms is presented. It performs the arithmetic operations in a digit-level pipeline fashion. For this purpose, the implementation of arithmetic operators is based on on-line (i.e., digit-serial and most significant digit first) arithmetic, and the transforms are performed by a parallel-pipeline version of the Cooley- Tukey fast Fourier transform (FFT) algorithm.

关键词： Fourier transforms Very large scale integration Transform theory Binary data Computer architecture Computing systems Matrices Network architectures Digital signal processing signal processing

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