The authors point out that the LBG algorithm (see Y. Linde et al., (1980)) requires a lot of computation as the training vectors increase, and proposes a fast VQ (vector quantization) algorithm for a large amount of t...
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The authors point out that the LBG algorithm (see Y. Linde et al., (1980)) requires a lot of computation as the training vectors increase, and proposes a fast VQ (vector quantization) algorithm for a large amount of training data. This algorithm consists of three steps: first, divide training vectors into small groups; second, quantize each group into a few codewords by the LBG algorithm; finally, construct a codebook by clustering these codewords using the LBG algorithm again. The authors also report they can reduce the distortion error of the algorithm by adapting an effective data-dividing method. In experiments of quantizing 17500 training vectors into 512 codewords, this algorithm requires only 1/6 computation time compared with the conventional algorithm, while the increase of distortion is only 0.5 dB.< >
The two-dimensional fast Fourier transform (2-D FFT), which has a wide application in areas such as digital signalprocessing, speech recognition and image processing, require quite high-speed computing to handle a hu...
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The two-dimensional fast Fourier transform (2-D FFT), which has a wide application in areas such as digital signalprocessing, speech recognition and image processing, require quite high-speed computing to handle a huge amount of data. Many parallel hardware FFT algorithms have been proposed. The paper discusses 2-D FFT hardware algorithms which are implemented on an eight-neighbor processor array. They allow 2-D FFT computation to be processed by iterating a 2-D butterfly operation and a data transfer alternately. These algorithms combine effectively the direct 2-D FFT algorithm and the communication capability of the 8-neighbor processor array.< >
advanced genetic algorithms (GAs) are used to automatically carry out the fine-tuning of the parameter settings of classical PID (proportional plus integral plus derivative) controllers. The basic concept and working ...
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advanced genetic algorithms (GAs) are used to automatically carry out the fine-tuning of the parameter settings of classical PID (proportional plus integral plus derivative) controllers. The basic concept and working principle of GAs are introduced and compared with those of traditional optimization techniques. An advanced GA which can rapidly optimize the parameter auto-tuning process of classical PID controllers is designed based on the GA theory, the authors' experience, and different performance indices, including nonlinear or multiple criteria. The computer implementation of this GA has been accomplished and tested against some benchmark examples. Simulation results demonstrate the efficiency and effectiveness of the proposed tuning technique.< >
The W-160 naval fire control radar described includes advanced measurement algorithms which minimize the RMS range and angle tracking errors by minimizing the effects of bias errors. These W-160 algorithms have been s...
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The W-160 naval fire control radar described includes advanced measurement algorithms which minimize the RMS range and angle tracking errors by minimizing the effects of bias errors. These W-160 algorithms have been separately shown to be asymptotically unbiased as the number of samples increases. Under the conditions simulated, for the 5 dB SNR case and a tracker improvement factor of five, results indicate that the W-160 split gate algorithm produced an RMS angle error which is four times lower than the Kanter algorithm. Under these same conditions the W-160 split gate algorithm produced an RMS range error which is six times lower than the classical algorithm to which it was compared. The performance of a second set of W-160 algorithms, the central gate algorithms, is also presented. It is shown that, as expected, the central gate algorithms provide better angle measurements at the expense of poorer range measurements.< >
The design of a high-speed ASIC that combines the operations of multiplication, division and square root is described. The chip is based on a systolic array architecture that uses a redundant number system and allows ...
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The design of a high-speed ASIC that combines the operations of multiplication, division and square root is described. The chip is based on a systolic array architecture that uses a redundant number system and allows multiplication, division, and square root to be combined on the same hardware. The chip has been designed using a 1.5- mu m, double-metal CMOS technology, operates on 16-b sign magnitude data, and has a throughput rate of 40 Msample/s for each operation.< >
Telerobot systems require the commitment of robots and provision of mockup environments to permit training and facilitate the development of new techniques. Simulation in real time can test control strategies. Each of...
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Telerobot systems require the commitment of robots and provision of mockup environments to permit training and facilitate the development of new techniques. Simulation in real time can test control strategies. Each of the possible configurations for an operation can be tested and the response can be used to produce optimum path and task plans. Parallel processing on transputers is considered to perform real-time dynamic simulation, for a seven degree-of-freedom robot, by a balanced division of the Newton-Euler formulation. Interfaces are provided to the actual hardware through both an advanced transputer/robot hardware interface and also a graphical interface to the user on a low-cost PC displaying real-time force and position information.< >
An advanced binary decision machine (ABDM) is proposed. A BDM tests a Boolean input variable and branches according to the state of the input. The input, test, and branch operations are performed in one microinstructi...
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An advanced binary decision machine (ABDM) is proposed. A BDM tests a Boolean input variable and branches according to the state of the input. The input, test, and branch operations are performed in one microinstruction. The architecture of the ABDM is shown. It consists of three main components: a control storage; a microsequencer; and an input/output (I/O) subsystem. The ABDM has a powerful instruction set and a high operating speed. It exhibits several features that are essential in complex on/off control applications, including forking, latching and unlatching of an entire input bank, outputting of either a scalar output or a vector output, looping, conditional looping, and nesting of subroutines.< >
Layered neural networks are used in a nonlinear adaptive control problem. The plant is an unknown feedback-linearizable continuous-time system, represented in a state space form. A transformation is made on the plant ...
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Layered neural networks are used in a nonlinear adaptive control problem. The plant is an unknown feedback-linearizable continuous-time system, represented in a state space form. A transformation is made on the plant to decompose the plant into two parts: The first part is modeled and controlled by multilayer neural networks. The second part is unobservable and can not be directly influenced by the control; this part is assumed to be stable. The control law is defined in terms of the neural network model to control the plant to track a reference command. The network parameters are updated on-line according to the tracking error. A theorem is given on the convergence of i) the tracking error and ii) the weight updating. The simulation is performed using advanced Continuous Simulation Language (ACSL).
The Volume contains 44 conference papers. The topic covered include Toeplitz matrices, time-frequency distribution and nonstationary signals, bit-level systolic arrays and computer arithmetic, radar signalprocessing,...
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ISBN:
(纸本)0819406945
The Volume contains 44 conference papers. The topic covered include Toeplitz matrices, time-frequency distribution and nonstationary signals, bit-level systolic arrays and computer arithmetic, radar signalprocessing, signal estimation, array processing and beamforming.
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