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30th Asia and South Pacific Design Automation conference, ASP-DAC 2025

作者： Guan, Zhongyu Liu, Qiang Lin, Guangdong School of Microelectronics Tianjin Univ. Tianjin China Anhui Siliepoch Technology Company Anhui Hefei China

ISBN: (纸本)9798400706356

Approximate computation is a method that effectively reduces design complexity and resource consumption of computing systems. Floating-point (FP) multiplication is a computationally complex and resource-intensive operation and is widely used. Therefore, the approximate FP multiplier has been a promising alternative for improving computation efficiency. In this paper, we propose an accuracy-configurable logarithmic FP multiplication algorithm (ACLAM) and design an efficient circuit structure for it. ACLAM simultaneously computes the approximate product and the error of the logarithmic multiplication. Then a part of the error is added to the product to achieve different levels of accuracy. The complexity of the circuit is reduced by approximating the error expression and calculating the error only based on the Most Significant Bits (MSBs) of the mantissas. Experimental results show that, compared to the exact FP multiplier, ACLAM can reduce 88.1% of area, 89.8% of energy, and 28.1% of delay while maintaining an average accuracy of 99.07%. The proposed ACLAM is also applied to two real applications to demonstrate its efficiency and effectiveness. © 2025 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Multiplying circuits

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Enhanced process-aware memory deduplication with dynamic fine-tuning method: implementation and applications

Enhanced process-aware memory deduplication with dynamic fin...

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2024 International conference on Computer Application and Information Security, ICCAIS 2024

作者： Dong, Yuquan Shi, Guangyin Xiao, Xue Gao, Chuanji Cai, Weiwei Hou, Yongkang Wang, Jibao Cloud Platform Product Department Inspur Cloud 1036 LANGCHAO RD Shandong Jinan 250000 China

ISBN: (纸本)9781510689312

Modern cloud computing environments demand efficient memory resource utilization and cost-effectiveness. Existing memory merging technologies, such as Kernel Samepage Merging (KSM), suffer from limitations in flexibility and dynamic adaptation to diverse applications. This paper introduces Process-Aware Memory Deduplication (PAMD), a novel approach that employs dynamic fine-tuning to address these challenges. PAMD implements a memory merging service architecture that integrates a new kernel module, enabling specific running processes to dynamically join or exit the KSM scanning list, thus achieving more granular memory merging management. Furthermore, PAMD incorporates a dynamic adjustment algorithm that prioritizes memory merging benefits for individual processes. By setting configurable threshold parameters, the algorithm dynamically adjusts the memory merging status of processes, improving efficiency. Experiment results demonstrate that PAMD significantly surpasses traditional KSM methods in terms of flexibility and applicability of memory merging. PAMD technology achieves more efficient memory management and higher memory utilization in modern cloud computing environments. © The Authors.

关键词： Clouding computing dynamic fine-tuning memory deduplication PAMD

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HEAPS: A Novel Energy-Based configurable HPC Scheduler 15th

HEAPS: A Novel Energy-Based Configurable HPC Scheduler

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15th International conference on Parallel Processing and Applied Mathematics, PPAM 2024

作者： Stafford, Esteban Cruz, Luis Bosque, Jose Luis Department of Computer Engineering and Electronics Universidad de Cantabria Santander Spain

ISBN: (纸本)9783031856990

High Performance computing (HPC) is conducted in large computer clusters to support complex scientific applications and simulations. These infrastructures are notoriously power-hungry, creating a pressing need to optimise their usage. Additionally, modern clusters are often considered heterogeneous as they consist of groups of nodes with varying characteristics. This article presents a novel scheduling algorithm, the Heterogeneous Energy-Aware Pairing Scheduler (HEAPS), which aims to reduce energy consumption by performing an a priori estimation of the energy consumption of jobs across available nodes to achieve optimal job-node pairings. The evaluation compares its behaviour to that of different schedulers for homogeneous and heterogeneous clusters, demonstrating that certain configurations of HEAPS can reduce energy consumption in various cluster types and sizes, and in several cases, improve makespan and energy efficiency. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Energy consumption Energy efficiency Heterogeneous clusters Workload manager

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Proceedings of SPIE: configurable computing: technology and applications

Proceedings of SPIE: Configurable Computing: Technology and ...

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Configuralble computing: technology and applications

This Volume 3526 of the conference proceedings contains 29 papers. Topics discussed include configurable computing technology and applications, image processing, applications development, architectures, digital signal... 详细信息

关键词： Parallel processing systems

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Spatio-temporal partitioning of computational structures onto configurable computing machines

Spatio-temporal partitioning of computational structures ont...

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conference on configurable computing - technology and applications

作者： Hudson, RD Lehn, D Hess, J Atwell, J Moye, D Shiring, K Athanas, P Virginia Tech Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA

ISBN: (纸本)0819429872

A complete computing system supports a design path from problem description to implementation. The: term configurable computing refers to complete computing systems that support the development of applications for configurable computing machines (CCMs). configurable computing systems generally include a microprocessor-based host a configurable processing array and the tools necessary far capturing the problem and mapping if into software for the host and configurations for the hardware This work proposes a framework for a set of platform independent configurable computing tools The proposed tools temporally partition large designs, described in a textual language, into stages that can be mapped onto the computing array. The temporal partitions are spatially partitioned to support multiple FPGA arrays. These results are then given to platform specific backends that convert the fool's description of the design into functional FPGA configurations hardware controllers and host-based control code.

关键词： run-time reconfiguration FPGA CCM temporal partitioning spatial partitioning

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A development environment for configurable computing

A development environment for configurable computing

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conference on configurable computing - technology and applications

作者： Boysen, B DeBardeleben, N Hazelwood, KM Ligon, WB Sass, R Stanzione, DC Underwood, KD Clemson Univ Holcombe Dept Elect & Comp Engn Parallel Architecture Res Lab Clemson SC 29634 USA

ISBN: (纸本)0819429872

As FPGA density increases, so does the potential for configurable computing machines. Unfortunately, the larger designs which take advantage of the higher densities require much more effort and longer design cycles, making it even less likely to appeal to users outside the held of configurable computing. To combat this problem, we present the Reconfigurable computing Application Development Environment (RCADE). The goals of RCADE are to produce high performance applications, to make FPGA design more accessible to those who are not hardware engineers, to shorten the design lifecycle, and to ease the process of migration fi-om one platform to another. Here, we discuss the environment architecture, the current set of agents, and other agents to be developed.

关键词： design environments configurable computing FPGA components field programmable gate arrays

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configurable computing: Concepts and issues

Configurable computing: Concepts and issues

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30th Hawaii International conference on System Sciences (HICSS 30)

作者： Mangione-Smith, W Univ Calif Los Angeles Los Angeles CA 90024 USA

ISBN: (纸本)0818677430

configurable computing is an area of active research that has sprung up over the last several years. By combining aspects of traditional computing, such as high performance microprocessor and commodity memory devices, with programmable hardware devices, configurable computing attempts to gain the benefits of both adaptive software and optimized hardware. Different types of configurable computing systems that have been either proposed of developed are discussed, along with their applications and the issues in tool design.

关键词： Computer architecture

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Design, debug, deploy: The creation of configurable computing applications

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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO technology 2008年第1-2期53卷 187-196页

作者： Nelson, Brent E. Hutchings, Brad L. Wirthlin, Michael J. Brigham Young Univ Dept Elect & Comp Engn Provo UT 84602 USA

configurable computing Machines (CCMs) are computing machines based on reconfigurable circuit technology such as field programmable gate-arrays. Early researchers recognized CCMs as a new, flexible, and powerful class of computer. The earliest CCMs featured rudimentary but significant integrated design, debug, and deployment (runtime) environments. This paper reviews those environments and the contributions they made and considers the progress made over the past 20 years in providing support for the "3 D's" of configurable computing application development: design, debug, and deployment. It then introduces an integrated CAD framework for the creation of CCM CAD tools and describes a series of experiments in creating such a CAD tool suite - the JHDL system. The paper reviews lessons learned from that work and concludes by discussing the role integrated design, debug, and runtime environments will play in future CCM-based systems.

关键词： configurable computing FPGA CAD for configurable computing design environments

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A low cost re-configurable DSP-based parallel image processing computer

A low cost re-configurable DSP-based parallel image processi...

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conference on configurable computing - technology and applications

作者： Murphy, CW Harvey, DM Nicolson, LJ Liverpool John Moores Univ Coherent & Electroopt Res Grp Liverpool L3 5UX Merseyside England

ISBN: (纸本)0819429872

To develop a cost-effective re-configurable DSP engine, it has been proposed to upgrade an existing custom designed TMS320C40 based multi-processing architecture with run-time configuration capabilities. The upgrade will consist of four Xilinx XC6200 series field programmable gate arrays (FPGAs) which will enable concurrent algorithm structures to be efficiently mapped onto the system. Furthermore, the upgraded architecture will provide a platform for the development of adaptive routing structures, self-configuration techniques and facilitate the merging of instruction and hardware based parallelism.

关键词： re-configurable computing parallel image processing environment field programmable gate array adaptive computing virtual hardware run-time configuration

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Tools for mapping applications to CCMs

Tools for mapping applications to CCMs

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conference on configurable computing - technology and applications

作者： Jones, MT Langston, MA Raghavan, P Virginia Polytech Inst & State Univ Blacksburg VA 24061 USA

ISBN: (纸本)0819429872

We report on our ongoing work in the development of automated CCM mapping and scheduling tools. We seek efficient methods to assign a high-level computational description across the processing elements of a target CCM. Such an assignment requires both a partitioning in space (the task map) and a partitioning in time (the execution schedule). We embrace a number of algorithmic design techniques, spanning the spectrum from the hugely theoretical to the extremely applied. Our goal is to produce suites of tools that meet a variety of design objectives.

关键词： configurable computing machines algorithm design automated tools software development

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