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检索条件"任意字段=Conference on Configurable Computing - Technology and Applications"

共 333 条记录，以下是301-310 订阅

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Framework for architecture-independent run-time reconfigurable applications

Framework for architecture-independent run-time reconfigurab...

引用

conference on Reconfigurable technology: FPGAs for computing and applications II

作者： Lehn, DI Hudson, RD Athanas, PM Virginia Tech Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA

ISBN: (纸本)0819438774

configurable computing Machines (CCMs) have emerged as a technology with the computational benefits of custom ASICs as well as the flexibility and reconfigurability of general-purpose microprocessors. Significant effort from the research community has focused on techniques to move this reconfigurability from a rapid application development tool to a run-time tool. This requires the ability to change the hardware design while the application is executing and is known as Run-Time Reconfiguration (RTR). Widespread acceptance of run-time reconfigurable custom computing depends upon the existence of high-level automated design tools. Such tools must reduce the designers effort to port applications between different platforms as the architecture, hardware, and software evolves. A Java implementation of a high-level application framework, called Janus, is presented here. In this environment, developers create Java classes that describe the structural behavior of an application. The framework allows hardware and software modules to be freely mixed and interchanged. A compilation phase of the development process analyzes the structure of the application and adapts it to the target platform. Janus is capable of structuring the run-time behavior of an application to take advantage of the memory and computational resources available.

关键词： RTR run-time reconfiguration CCM configurable computing FPGA automated design

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Hardware based image processing library for Virtex FPGA

Hardware based image processing library for Virtex FPGA

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conference on Reconfigurable technology: FPGAs for computing and applications II

作者： Gorgon, M Tadeusiewicz, R Stanislaw Staszic Univ Min & Met Biocybernet Lab PL-30059 Krakow Poland

ISBN: (纸本)0819438774

The payer considers hardware-based realization of image processing algorithms. Usage of single FPGA device - Virtex as a processing element capable to carry out image processing in real-time is thoroughly discussed. For implementation of the algorithms in hardware resources specialized IP cores architectures has been designed and tested, The image-processing library consists of individual cores able to be linked together on a software level and implemented in high capacity FPGA devices is proposed.

关键词： image processing real-time FPGA IP-cores re-configurable computing

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Dynamically reconfigurable vision for intelligent sensing

Dynamically reconfigurable vision for intelligent sensing

引用

conference on Enabling Technologies for Law Enforcement and Security

作者： Stack, DJ Kramer, CA McLoughlin, TH Pain, B Comptek Amherst Syst Inc Buffalo NY 14221 USA

ISBN: (纸本)0819439061

This paper introduces our Dynamically Reconfigurable Vision (DRV) technology, and discusses the significant benefits afforded by this technology to law enforcement applications employing unattended sensor networks. Despite improvements in both data compression and transmission technologies in recent years, video bandwidth constraints continue to limit performance for vision systems employed in sensor networks. DRV seeks to reduce, as much as possible, the amount of irrelevant spectral information that is collected, and thus to make more effective use of available bandwidth and computational resources than is possible with conventional imaging technology. This is achieved through the intelligent, dynamic allocation of spatial and temporal sensing resources in response to the dynamics of the scene itself. Minimization of irrelevant data in the video processing chain reduces local processing requirements and allows communication of more information in real-time over bandwidth-limited channels. This leads to a reduction in unit power consumption, complexity, cost, and size - minimizing these system parameters is critical to the performance of unattended sensor systems and networks. We have developed a prototype DRV camera system that demonstrates the significant performance advantages of this technology. Our DRV system employs a real-time reconfigurable CMOS image sensor which supports multiple variable-resolution, independently-configurable windows per exposure and operates in a snapshot capture mode to minimize motion artifacts. Data is output through multiple sensor video ports to minimize readout time and to provide a local contrast enhancement capability. Multiple, time-correlated windows allow a single sensor to fulfill multiple requirements concurrently, such as intruder detection and object tracking. This imager is capable of reconfiguring itself within several microseconds upon demand. Frame-by-frame configurable parameters include frame rate, integration time,

关键词： unattended sensors law enforcement security surveillance CMOS imager smart sensor video camera video tracking reconfigurable computing

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A framework for configurable workflow systems 31

A framework for configurable workflow systems

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31st International conference on technology of Object-Oriented Languages and Systems, TOOLS 1999

作者： Han, Yanbo Schaaf, Thorsten Pang, Hongbing Yalande New Technology Research Center Feng-Ti-Nan-Lu 2 Beijing100071 China Free University of Berlin Hindenburgdam 30 Berlin12200 Germany Beijing University of Aeronautics and Astronautics Beijing100083 China

ISBN: (纸本)0769503934

Workflow technology, which is characterized by extracting process logic from individual applications and manipulating it separately to achieve organization-wide business process integration and automation, asks for an appropriate infrastructure support and encourages new system architectural styles. This paper presents a framework for constructing wormow-based applications. Based on conjigurable models, software agents and business objects, the framework focuses on, in addition to supporting the basic requirements of workjlow-based computing, the flexibility issues that are identifed as a deficiency of many contemporary workflow systems. With the help of the framework, a workflow system can be more flexibly composed at runtime according to specific and changing needs. © 1999 IEEE.

关键词： Software architecture

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Proceedings of SPIE: configurable computing: technology and applications

Proceedings of SPIE: Configurable Computing: Technology and ...

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Configuralble computing: technology and applications

This Volume 3526 of the conference proceedings contains 29 papers. Topics discussed include configurable computing technology and applications, image processing, applications development, architectures, digital signal... 详细信息

关键词： Parallel processing systems

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Spatio-temporal partitioning of computational structures onto configurable computing machines

Spatio-temporal partitioning of computational structures ont...

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conference on configurable computing - technology and applications

作者： Hudson, RD Lehn, D Hess, J Atwell, J Moye, D Shiring, K Athanas, P Virginia Tech Bradley Dept Elect & Comp Engn Blacksburg VA 24061 USA

ISBN: (纸本)0819429872

A complete computing system supports a design path from problem description to implementation. The: term configurable computing refers to complete computing systems that support the development of applications for configurable computing machines (CCMs). configurable computing systems generally include a microprocessor-based host a configurable processing array and the tools necessary far capturing the problem and mapping if into software for the host and configurations for the hardware This work proposes a framework for a set of platform independent configurable computing tools The proposed tools temporally partition large designs, described in a textual language, into stages that can be mapped onto the computing array. The temporal partitions are spatially partitioned to support multiple FPGA arrays. These results are then given to platform specific backends that convert the fool's description of the design into functional FPGA configurations hardware controllers and host-based control code.

关键词： run-time reconfiguration FPGA CCM temporal partitioning spatial partitioning

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A development environment for configurable computing

A development environment for configurable computing

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conference on configurable computing - technology and applications

作者： Boysen, B DeBardeleben, N Hazelwood, KM Ligon, WB Sass, R Stanzione, DC Underwood, KD Clemson Univ Holcombe Dept Elect & Comp Engn Parallel Architecture Res Lab Clemson SC 29634 USA

ISBN: (纸本)0819429872

As FPGA density increases, so does the potential for configurable computing machines. Unfortunately, the larger designs which take advantage of the higher densities require much more effort and longer design cycles, making it even less likely to appeal to users outside the held of configurable computing. To combat this problem, we present the Reconfigurable computing Application Development Environment (RCADE). The goals of RCADE are to produce high performance applications, to make FPGA design more accessible to those who are not hardware engineers, to shorten the design lifecycle, and to ease the process of migration fi-om one platform to another. Here, we discuss the environment architecture, the current set of agents, and other agents to be developed.

关键词： design environments configurable computing FPGA components field programmable gate arrays

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A low cost re-configurable DSP-based parallel image processing computer

A low cost re-configurable DSP-based parallel image processi...

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conference on configurable computing - technology and applications

作者： Murphy, CW Harvey, DM Nicolson, LJ Liverpool John Moores Univ Coherent & Electroopt Res Grp Liverpool L3 5UX Merseyside England

ISBN: (纸本)0819429872

To develop a cost-effective re-configurable DSP engine, it has been proposed to upgrade an existing custom designed TMS320C40 based multi-processing architecture with run-time configuration capabilities. The upgrade will consist of four Xilinx XC6200 series field programmable gate arrays (FPGAs) which will enable concurrent algorithm structures to be efficiently mapped onto the system. Furthermore, the upgraded architecture will provide a platform for the development of adaptive routing structures, self-configuration techniques and facilitate the merging of instruction and hardware based parallelism.

关键词： re-configurable computing parallel image processing environment field programmable gate array adaptive computing virtual hardware run-time configuration

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Tools for mapping applications to CCMs

Tools for mapping applications to CCMs

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conference on configurable computing - technology and applications

作者： Jones, MT Langston, MA Raghavan, P Virginia Polytech Inst & State Univ Blacksburg VA 24061 USA

ISBN: (纸本)0819429872

We report on our ongoing work in the development of automated CCM mapping and scheduling tools. We seek efficient methods to assign a high-level computational description across the processing elements of a target CCM. Such an assignment requires both a partitioning in space (the task map) and a partitioning in time (the execution schedule). We embrace a number of algorithmic design techniques, spanning the spectrum from the hugely theoretical to the extremely applied. Our goal is to produce suites of tools that meet a variety of design objectives.

关键词： configurable computing machines algorithm design automated tools software development

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Comparing computing machines

Comparing computing machines

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conference on configurable computing - technology and applications

作者： DeHon, A Univ Calif Berkeley Berkeley CA 94720 USA

ISBN: (纸本)0819429872

Reconfigurable computing devices are emerging as a viable alternative to fixed-function components and programmable processors. To expand our knowledge of the role and optimization of these devices, it is increasingly imperative for us to compare implementations of tasks and subroutines across this wide spectrum of implementation options. The fact Chat most processors, FPGAs, ASICs, and memories are fabricated in a uniform technology medium, CMOS VLSI, where area scaling is moderately well understood eases our comparison task. Nonetheless, the rapid pace of technology, limited device size selection, and economic artifacts complicate the picture. In this paper, we look at the task of comparing computing machines, reviewing normalization techniques and many important issues which arise during comparisons. This paper includes examples intended to underscore the methodology and comparison issues, but does not attempt to make definitive conclusions about the merits of the technology alternatives from the small sample set. The immediate intent of this work is to help designers faced with tradeoffs between technological alternatives. The longer term intent is to help the community collect and analyze the broad-based data. needed to Better understand the range of available computing options.

关键词： configurable computing FPGA programmable architectures performance comparison computational density

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