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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

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modeling, design and simulation of tunable band pass filter using RF MEMS capacitance and transmission line

Modeling, design and simulation of tunable band pass filter ...

引用

conference on microelectronics - design, Technology and Packaging II

作者： Saha, SC Hanke, U Sæther, T Norwegian Univ Sci & Technol Dept Elect & Telecommun N-7491 Trondheim Norway SINTEF ICT N-7465 Trondheim Norway

ISBN: (纸本)0819460664

In this paper we have shown design of a RF MEMS band pass filter. A high capacitance ratio and low actuation voltage RF MEMS shunt switch was designed and modeled the switch as a variable capacitance. The capacitance can be varied as a function of the actuation voltage. The capacitance is modeled as a lumped component, as used in a conventional LC filter. The design uses a novel approach to implement both distributed transmission line and RF MEMS capacitance together to replace the lumped elements. The use of RF MEMS variable capacitance gives the flexibility of tuning the cut-off and center frequency of bandpass filter. In this paper we show a design of 5.8 GHz center frequency band pass filter using the theory of stepped impedance transmission line and MEMS capacitance filter.

关键词： high capacitance ratio RF MEMS switch stepped impedance filter compact Bandpass filter

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Drop test simulation and DOE analysis for design optimization of microelectronics packages

Drop test simulation and DOE analysis for design optimizatio...

引用

IEEE 56th Electronic Components and Technology conference

作者： Gu, Yu Jin, Daniel RF Micro Devices Inc. 7628 Thorndike Rd Greensboro NC 27409

ISBN: (纸本)1424401526

For better drop performances, there have been significantly increased research works focusing on different levels (e.g. product- and board-level) of reliabilities for microelectronics packages. Many important factors have been considered in the recent experimental and numerical studies. The interactions between these factors, e.g. sizes, materials, and etc, however, are relatively unknown. Based on finite element modeling and design of experiment (DOE), a novel approach was discussed in detail to investigate the impacts of all possible key factors as well as their weights and interactions on the dynamic responses of over-molded LGA (land grid array) RF packages. Molding compound, solder, and substrate materials, as well as the dimensions of die, die attach (DA), and solder layer, were considered to reduce the critical interfacial peeling stress so that an optimized design can be achieved. The DOE model was set-up through 3D full parametric modeling from which every key factor can be adjusted easily. Each DOE leg is a drop test simulation equivalent to JEDEC standard drop which has 1500g peak acceleration and 1ms impulse duration. The simulations were conducted through LS-DYNA explicit finite element analysis and the DOE analyses were carried out through JMP. The experiment record of acceleration vs. time was input as load and constrain on the base plate of the drop test vehicle. Two rounds of DOE and totally 20 drop simulations were carried out to deliver the valid analysis. The first round is a screening DOE to identify the most important 3∼4 factors. Then a full factorial DOE was carried out to study these key factors and their interactions. The final results could be used as a design guideline to improve the drop performance of microelectronics packages. © 2006 IEEE.

关键词： Electronics packaging

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Towards very high frequency simulators for active device modelling

Towards very high frequency simulators for active device mod...

引用

2nd conference on Ph D Research in microelectronics and Electronics

作者： Leuzzi, Giorgio Stornelli, Vincenzo Univ Aquila Dept Elect Engn I-67100 Laquila Italy

ISBN: (纸本)1424401569

In this paper physic based computer-aided simulation of microwave nonlinear circuits, completely performed in the frequency domain with Spectral Balance (SB), is addressed. The completely frequency-domain approach allows easy inclusion of frequency-dependent parameters of the semiconductor, especially important at very high frequencies (e.g. dielectric constant), and easy and straightforward coupling to the passive external environment. The absence of time-frequency domain transformations typical of Harmonic Balance schemes allows easy extension to multitone analysis. This technique is suitable for develop new CAD tools useful for the design of microwave integrated components and monolithic microwave intergrated circuits especially when "Global Analysis" is request and moltitone excitation is present simulation results, for both the SB and a classical FDTD methods, are presented and compared in terms of complexity and CPU load time, for a quasi-two-dimensional hydrodynamic physical model of a MOSFET device.

关键词： electron device modeling computer-aided analysis frequency domain analysis

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Combined fracture, delamination risk and fatigue evaluation of advanced microelectronics applications towards RSM/DOE concepts

Combined fracture, delamination risk and fatigue evaluation ...

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7th International conference on Thermal, Mechanical and Multiphysics simulation and Experiments in Micro-Electronics and Micro-Systems, EuroSimE 2006

作者： Auersperg, Jürgen Dudek, Rainer Michel, Bernd Dept. Mechanical Reliability and Micro Materials Gustav-Meyer-Allee 25 D-13355 Berlin Germany AMIC Angewandte Micro-Messtechnik GmbH Volmerstr. 9b D-12489 Berlin Germany

ISBN: (纸本)1424402751

Microelectronic assemblies are basically compounds of several high precision materials with quite different Young's moduli and thermal expansion coefficients (CTE). Additionally, various kinds of inhomogeneity, residual stresses generated by several steps of the manufacturing process and extreme thermal environmental conditions contribute to interface delamination, chip cracking and fatigue of solder interconnects. For that reason, numerical investigations by means of nonlinear FEA together with conventional strength hypotheses are frequently used for design optimizations and sensitivity analyses. So, design studies on the basis of parameterized FE-models and DOE/RSM-approaches help to optimize electronic components at early phases of the product development process. But, this methodology typically bases on classical stress/strain strength evaluations or/and life time estimations of solder interconnects using modified Coffin-Manson approaches, whereas delamination or bulk fracture mechanisms usually remain unconsidered. By means of a representative microelectronics assembly this contribution is going to figure out and discuss ways and challenges of using numerical fatigue evaluation and fracture mechanics approaches in connection with parameterized finite element modeling based DOE/RSM-concepts. That is, the evaluation of mixed mode interface delamination phenomena utilizing the VCCT-methodology, classical strength hypotheses along with fracture mechanics approaches and modified Coffin-Manson thermal fatigue estimation of solder joints will be simultaneously applied within a multi-objective optimization towards a thermo-mechanical reliable design. © 2006 IEEE.

关键词： microelectronics

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Proceedings - 2006 International conference on design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006

Proceedings - 2006 International Conference on Design and Te...

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2006 International conference on design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006

ISBN: (纸本)0780397266

The proceedings contain 83 papers. The topics discussed include: supply voltage glitches effects on CMOS circuits;modeling of pixel sensors for image systems with VHDL-AMS;an on-line software-based self-test framework for microprocessor cores;design of secure digital communication systems using DCSK chaotic modulation;accumulator - based compression in symmetric transparent ram BIST;design and optimization of RF filters for multistandard RF sub-sampling receiver;implementation of a neural network module for fourth generation mobile equipments;comparison of addition structures synthesis over commercial FPGAs;implementation of a fuzzy logic tracking path algorithm on a field programmable gate array;hybrid fault simulation with compiled and event-driven methods;synthesis of symmetric functions using quantum cellular automata;and dual band CMOS LNA design with current reuse topology.

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Strong and weak inversion mode of MOS in the design of direction sensitivity matrix

Strong and weak inversion mode of MOS in the design of direc...

引用

2006 NSTI Nanotechnology conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings

作者： Husak, M. Boura, A. Jakovenko Department of Microelectronics Faculty of Electrical Engineering Czech Technical University in Prague Technicka 2 CZ - 166 27 Prague 6 Czech Republic

In the article there is presented a new arrangement of a temperature sensor system for air velocity and direction measurement. The system utilizes temperature dependence of the current through the channel of MOS structure. The geometric arrangement of temperature sensors allows measurement of temperature gradient. Temperature gradient allows to compute direction of air flow over the chip. Optimal operating modes of weak and strong inversion of MOS structure operation have been selected for the design of integrated temperature matrix. The matrix has been used for the design of a probe for measurement. Various arrangements of MOS sensor structures have been designed. CoventorWare and CADENCE software tools have been used for simulation and modeling of sensor properties. The new circuit design of sensor temperature matrix was used. The new results of sensitivity and resolution of sensor systems was reached. The working efforts are focused on the sensitivity, angle resolution and small power consumption of the gas direction flow systems.

关键词： MOS devices

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Interface barrier abruptness and work function requirements for scaling Schottky source-drain MOS transistors

Interface barrier abruptness and work function requirements ...

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2006 International conference on simulation of Semiconductor Process and Devices, SISPAD '06

作者： Agrawal, Naveen Chen, Jingde Hui, Zhao Yeo, Yee-Chia Lee, Sungjoo Chan, Daniel S. H. Li, Ming-Fu Samudra, Ganesh S. Nanoscience and Nanoteclinology Initiative Faculty of Engineering National University of Singapore Singapore 117576 Singapore ECE Department National University of Singapore Singapore Singapore Institute of Microelectronics Singapore 117684 Singapore

ISBN: (纸本)1424404045

Schottky source-drain (S/D) MOS transistor coupled with metal gate is a promising alternative to the conventional poly-Si gate and doped S/D MOSFET technology [1-2]. This paper explores through simulations the effect of metal S/D WF and the gradual change of barrier profile at the metal-semiconductor interface and in the few nanometers space around it on the n/p channel device performance. We present the S/D workfunction (WF) requirements for ultra short channel device design for the first time. Through modeling and fabrication, we also present the underlying physical explanation behind the existence of dual slope in Id-Vg characteristics of metal S/D and Gate MOSFETs. © 2006 IEEE.

关键词： Schottky barrier diodes

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Separating modeling and simulation Aspects in Hardware/Software System design

Separating Modeling and Simulation Aspects in Hardware/Softw...

引用

International conference on microelectronics, ICM

作者： J. Lapalme E.M. Aboulhamid G. Nicolescu F. Rousseau Université de Montreal Canada École Polytechnique de Montreal Canada TIMA Grenoble France

Many are working on the productivity gap problem affecting the Electronic design Automation. None of the current paths seems to be a silver bullet but object-oriented framework-based solutions such as SystemC are gaining a great deal of momentum and acceptance. Despite all the efforts which have been spent one the development of these types of solutions, as well as the numerous satellite tools which add a lot of value to the approach; very few efforts have been spent on the cornerstone task of investigating which software design techniques and technologies should be used to develop effective framework-based solutions. The main objective of the article is to present how new software engineering technologies may be used to create better framework-based modeling solutions by promoting separation of concerns between modeling and simulation aspects.

关键词： Hardware Software systems Software design Object oriented modeling Electronic design automation and methodology Software engineering Context modeling Productivity Silver Satellites

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Extreme temperature SOS varactor modeling

Extreme temperature SOS varactor modeling

引用

IMAPS High Temperature Electronics conference, HiTEC 2006

作者： Wang, Jianning Zhang, Yumin Morris, Steven A. Venkataraman, Srinivasan Hutchens, Chris Oklahoma State University 202 Engineering South Stillwater OK 74078 United States

ISBN: (纸本)9781604236194

Accumulation-mode silicon-on-sapphire (SOS) varactors were fabricated using Peregrine's silicon on sapphire (SOS) technology, which has a 100 nm silicon film and a 250 um sapphire substrate. These devices were measured over a temperatures range of 25°C to 195 °C. The electrical characteristics of SOS varactors at extreme temperature have been presented. A new varactor model extraction method is presented, which can be applied to different process or technology. Gate resistance (Rg), gate inductance (Lg) and body resistance (Rb) are added to the equivalent circuit model to represent parasitic elements. The model can be used in SPICE circuit simulators with a wide range of MOS transistor geometries. Through simulation, we verify that the proposed model successfully predicts the behavior of the SOS varactors. Predicted variation of the varactor capacitance, series resistance and quality factor as a function of gate bias, temperature compare favorably with measurement results. Our results allow designers of high temperature RF electronics to reliably implement and design varactors for important applications such as voltage controlled oscillators, phase lock loops, and tunable RF filters for use in communication with remote harsh environment sensors. Copyright © 2006 International microelectronics And Packaging Society.

关键词： Varactors

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POSIX modeling in SystemC

POSIX modeling in SystemC

引用

Asia and South Pacific design Automation conference

作者： H. Posadas J. Adamez P. Sanchez E. Villar F. Blasco Microelectronics Engineering Group University of Cantabria Santander Spain Microelectronics Engineering Group University of Cantabria Santander Brazil DS2 Valencia Spain

Early estimation of the execution time of real-time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires taking into account the impact of the underlying RTOS. As a consequence, RTOS modeling is becoming an active research area. SystemC provides a framework for multiprocessing, HW/SW co-simulation at several abstraction levels. In this paper, a SystemC library for POSIX modeling and simulation is presented. By using the library, the SystemC specification using POSIX functions is converted automatically into a timed simulation estimating the execution time of the application SW running on the POSIX platform. The library works directly on the source code. Therefore, it provides an early and fast estimation of the performance of the system as a consequence of the architectural mapping decisions. Although accuracy is lower than when using lower-level techniques, it supports high-level design-space exploration as simulation time is significantly less than RT (ISS) simulation.

关键词： Embedded system Software libraries Costs Timing Application software Real time systems Embedded software Hardware Software design microelectronics

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