检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,367 篇 会议
46 篇 期刊文献
6 册 图书

馆藏范围

1,419 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

615 篇 工学
- 387 篇 电气工程
- 246 篇 电子科学与技术（可...
- 221 篇 计算机科学与技术...
- 128 篇 材料科学与工程（可...
- 119 篇 软件工程
- 89 篇 机械工程
- 66 篇 动力工程及工程热...
- 59 篇 控制科学与工程
- 42 篇 化学工程与技术
- 35 篇 信息与通信工程
- 31 篇 仪器科学与技术
- 23 篇 力学（可授工学、理...
- 15 篇 冶金工程
- 15 篇 生物医学工程（可授...
- 10 篇 建筑学
- 9 篇 光学工程
- 9 篇 土木工程
- 8 篇 交通运输工程
- 8 篇 安全科学与工程
- 7 篇 生物工程
255 篇 理学
- 146 篇 物理学
- 116 篇 数学
- 45 篇 化学
- 22 篇 系统科学
- 10 篇 生物学
- 10 篇 统计学（可授理学、...
38 篇 管理学
- 37 篇 管理科学与工程(可...
8 篇 医学
- 7 篇 临床医学
- 6 篇 基础医学(可授医学...
- 5 篇 药学(可授医学、理...
4 篇 法学
4 篇 艺术学
2 篇 农学
1 篇 经济学
1 篇 教育学

主题

272 篇 computational mo...
230 篇 integrated circu...
190 篇 circuit simulati...
179 篇 microelectronics
126 篇 semiconductor de...
115 篇 analytical model...
107 篇 solid modeling
96 篇 mathematical mod...
65 篇 simulation
61 篇 silicon
58 篇 predictive model...
53 篇 hardware design ...
53 篇 micromechanical ...
50 篇 load modeling
50 篇 hardware
49 篇 cmos technology
47 篇 spice
45 篇 design automatio...
43 篇 logic gates
42 篇 finite element a...

机构

13 篇 institute of mic...
13 篇 institute of mic...
12 篇 institute of mic...
7 篇 institute of mic...
6 篇 department of mi...
6 篇 institute of mic...
6 篇 department of mi...
6 篇 school of softwa...
5 篇 school of microe...
5 篇 nxp semiconducto...
5 篇 national microel...
5 篇 school of microe...
5 篇 institute of mic...
5 篇 philips applied ...
5 篇 imec leuven
5 篇 institute of mic...
5 篇 amic angewandte ...
5 篇 agilent technol ...
5 篇 delft university...
4 篇 shanghai researc...

作者

10 篇 xiaowu zhang
10 篇 roca e.
9 篇 castro-lopez r.
9 篇 a. napieralski
8 篇 rodriguez r.
8 篇 nafria m.
7 篇 l.j. ernst
7 篇 g.q. zhang
7 篇 martin-martinez ...
7 篇 sven rzepka
7 篇 fernandez f. v.
7 篇 s. selberherr
7 篇 zhang gq
6 篇 andrzej napieral...
6 篇 m.k. iyer
6 篇 ru huang
6 篇 n. ranganathan
6 篇 k.m.b. jansen
5 篇 khaoula mbarek
5 篇 sami ghedira

语言

1,398 篇 英文
10 篇 中文
8 篇 其他
3 篇 德文

检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

共 1419 条记录，以下是1011-1020 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

A Unified System-Level modeling and simulation Environment for MPSoC design: MPEG-4 Decoder Case Study 06

A Unified System-Level Modeling and Simulation Environment f...

引用

design, Automation and Test in Europe conference and Exhibition

作者： V. Reyes W. Kruijtzer T. Bautista G. Alkadi A. Nunez Institute for Applied Microelectronics University of Las Palmas Spain Philips Research Laboratories Eindhoven Netherlands

ISBN: (纸本)9783981080100

New generation electronic system-level design tools are the key to overcome the complexity and the increasing design productivity gap in the development of future multiprocessor systems-on-chip. This paper presents a SystemC-based system-level simulation environment, called CASSE, which helps in the modeling and analysis of complex SoCs. CASSE combines application modeling, architecture modeling, mapping and analysis within a unified environment, with the aim to ease and speed up these modeling steps. The main contribution of this tool is to enable this fast modeling and analysis at the very beginning of the design process, helping in the design space exploration phase. CASSE capabilities are disclosed in this work by means of a case study where an MPEG-4 decoder application is implemented on an Altera Excalibur platform

关键词： MPEG 4 Standard Decoding Computer aided software engineering Process design Space exploration Computer architecture Analytical models Embedded software microelectronics Consumer electronics

来源：评论

学校读者我要写书评

暂无评论

A Mission Level design Language Based on AleC++

A Mission Level Design Language Based on AleC++

引用

International conference on microelectronics, MIEL

作者： B. Andelkovic V. Litovski V. Zerbe Department of Electronics Faculty of Electronic Engineering University of Niš Nis Serbia Computer Science and Automation Faculty Technical University Ilmenau Germany

Modern complex system design demands modeling on a high level of abstraction together with the system environment components. Such model enables mission level system simulation in the context of its operational conditions. A mission level design language providing mission and system level verification is presented in this paper. Also, this language enables designers to describe some of the components at implementation level to test and validate the system implementation at mission level. In this way a uniform design framework is achieved from mission/system down to implementation level

关键词： Hardware Power system modeling System testing Context modeling Embedded software Process design Navigation System-on-a-chip Computer architecture Software systems

来源：评论

学校读者我要写书评

暂无评论

Fully Automated Electrothermal simulation Using Standard CAD Tools

Fully Automated Electrothermal Simulation Using Standard CAD...

引用

International conference on microelectronics, MIEL

作者： F.M. De Paola J.P. Nowakowski V. d'Alessandro N. Rinaldi Department of Electronics and Telecommunications Engineering University of Naples “Federico II” Naples Italy Dept. of Electron. & Telecommun. Eng. Naples "Federico II" Univ.

This contribution presents a novel simulation tool for the electrothermal analysis of solid-state devices and circuits in both static and transient conditions. The code relies on an effective analytical approach to describe the 3D thermal process, and exploits the engine of the commercial software ADS (Advanced design System) to consistently solve the electrical and thermal networks. Features like model accuracy, lack of convergence problems, low time/memory requirements, flexibility and user friendliness make the proposed software a good alternative to SPICE-like and fully numerical tools for the optimization of both reliability and performance of state-of-the-art devices/circuits

关键词： Electrothermal effects Circuit simulation design automation Solid modeling Analytical models Solid state circuits Transient analysis Engines Software design Convergence of numerical methods

来源：评论

学校读者我要写书评

暂无评论

Valuing Reliability Indices of Composite Embedded Systems

Valuing Reliability Indices of Composite Embedded Systems

引用

International conference on Perspective Technologies and Methods in MEMS design (MEMSTECH)

作者： Andriy Sydor Dariya Marunchak Automated Control Systems Department Lviv Polytechnic National University Lviv Ukraine

A method of investigation of reliability parameters of compound systems by means of generating functions is developed taking account of aging of the system's output elements. Main reliability indices of composite ... 详细信息

关键词： Embedded system Aging Weibull distribution microelectronics Power system reliability Power system modeling Computational modeling Circuit simulation Optical devices Microelectromechanical devices

来源：评论

学校读者我要写书评

暂无评论

A new synchronization policy between PSL checkers and SystemC designs at transaction level

A new synchronization policy between PSL checkers and System...

引用

International conference on design and Technology of Integrated Systems in Nanoscale Era (DTIS)

作者： Y. Lahbib M.-A. Ghrab M. Hechkel F. Ghenassia R. Tourki Electronics and Microelectronics Laboratory STMicroelectronics Inc. Monastir Tunisia

The authors present a technique to synchronize between PSL (property specification language) checkers and SystemC IPs at the highest abstraction level of the ST microelectronics system flow: transaction level modeling (TLM). A new assertion-based verification approach is proposed. It consists of a runtime simulation of the system-on-chip (SoC) under verification with PSL checkers. In this approach, the PSL checkers that represent the system specification are converted into C++ and therefore into a SystemC-TLM modules, which refer to us as TLM checkers. However, when integrating TLM checkers with SystemC models of SoC, the traditional clock-based synchronization at register transfer level and lower could not be applied. In fact, at the TLM abstraction level, the modeling rules forbid the use of a hardware clock. A new synchronization policy should be then proposed, hence the aim of this paper

关键词： Computer bugs Synchronization Hardware Object oriented modeling microelectronics Clocks Specification languages Consumer electronics Laboratories Runtime

来源：评论

学校读者我要写书评

暂无评论

Artificial Neural Network Based modeling of GaAs HBT and Power Amplifier design for Wireless Communication System

Artificial Neural Network Based Modeling of GaAs HBT and Pow...

引用

International conference on microelectronics, ICM

作者： M. S. Alam O. Farooq Izharuddin G.A. Armstrong Department of Electronics Engineering Z.H. College of Engineering & Technology Aligarh India Department of Electronics Engineering Aligarh India School of Electrical & Electronics Engineering Queen's University of Belfast UK

The power amplifier (PA) used in modern wireless system needs to perform better from point of view linearity and efficiency. A crucial perquisite for the design of PA is the availability of suitable device models. Artificial neural networks (ANN) recently gained attention as a fast and flexible way to develop HBT device model when compared to the conventional modeling approach based on empirical equations and can demonstrate better accuracy. The framework for this ANN based model is a common-emitter large-signal equivalent circuit model, which has been implemented in Agilent Advance design System (ADS) simulation environment. An excellent agreement between modeled and bias dependent DC and S -parameters and harmonic power in non-linear mode of operation was obtained. Using developed ANN based HBT model PA design was carried out. At collector voltage V c of 3.4 V, the power amplifier shows an excellent linearity (first ACPR

关键词： Artificial neural networks Power system modeling Gallium arsenide Heterojunction bipolar transistors Power amplifiers Wireless communication Linearity Power generation Multiaccess communication Availability

来源：评论

学校读者我要写书评

暂无评论

Dynamic Thermal simulation of Power Devices Operating with PWM Signals

Dynamic Thermal Simulation of Power Devices Operating with P...

引用

International conference on microelectronics, MIEL

作者： Z. Zhou M.S. Khanniche P. Igic S.N. Jankovic S.G. Batcup P.A. Mawby Electronics Systems Design Centre School of Engineering University of Wales UK

Fast power devices thermal simulation method based on averaging power losses over each cycle of PWM switching frequency is presented in this paper. For implementing a long real time dynamic thermal simulation of power devices, device power losses during transient process and static characteristics are defined as a function of device conduction current and junction temperature, and are represented by a lookup table. By carrying out the circuit electrical simulation, the device conduction current can be obtained. By combining the device conduction currents, global device temperature (GDT) and the data from the lookup table, the average power loss over each cycle of PWM switching frequency is then calculated for carrying out the thermal simulation. With the proposed method, a relative large simulation time step can be employed and simulation speed can be increased dramatically. The method is suitable for a long real time thermal simulation for complex power electronics systems

关键词： Pulse width modulation Circuit simulation Predictive models Vehicle dynamics Switching frequency Pulse width modulation inverters Power system modeling Electronic packaging thermal management Multichip modules Temperature

来源：评论

学校读者我要写书评

暂无评论

simulation of Multiple Gate FinFET Device Gate Capacitance and Performance with Gate Length and Pitch Scaling

Simulation of Multiple Gate FinFET Device Gate Capacitance a...

引用

International conference on simulation of Semiconductor Processes and Devices (SISPAD)

作者： Hui Zhao Naveen Agrawal Ramos Javier Subhash C. Rustagi M. Jurczak Yee-chia Yeo Ganesh S. Samudra Silicon Nano Device Laboratory (SNDL) ECE Department National University of Singapore Singapore IMEC Belgium Institute of Microelectronics Singapore

In this work, we simulate silicon-on-insulator (SOI) multiple gate FinFET (MuGFET) with the design targeting for the ITRS 2004 specifications for NMOSFET. A detailed fully 3D simulation and analysis of the parasitic capacitances is performed for the first time to study the impact of scaling and pitch spacing. Unlike planar devices, FinFET scaling does not always result in a straightforward performance improvement due to the current crowding effect and series resistance

关键词： FinFETs Parasitic capacitance Doping profiles Semiconductor process modeling Predictive models Dielectric measurements Laboratories microelectronics Silicon on insulator technology MOSFET circuits

来源：评论

学校读者我要写书评

暂无评论

Fault Diagnosis in Digital Part of Mixed-Mode Circuit

Fault Diagnosis in Digital Part of Mixed-Mode Circuit

引用

International conference on microelectronics, MIEL

作者： M. Andrejevic V. Litovski M. Zwolinski Department of Electronics University of Niš Niš Serbia & Montenegro University of Southampton England University of Southampton Southampton England

In this paper artificial neural networks (ANNs) are applied to diagnosis of catastrophic defects in the digital part of a nonlinear mixed-mode circuit. The approach is demonstrated on the example of a relatively complex sigma-delta modulator. A set of faults is selected first. Then, fault dictionary is created, by simulation, using the response of the circuit to an input ramp signal. It is represented in a form of a look-up table. Artificial neural network is then trained for modeling (memorizing) the look-up table. The diagnosis is performed so that the ANN is excited by faulty responses in order to present the fault codes at its output. There were no errors in identifying the faults during diagnosis

关键词： Fault diagnosis Circuit faults Circuit testing Artificial neural networks Table lookup Delta-sigma modulation Dictionaries Circuit simulation Signal design Intelligent networks

来源：评论

学校读者我要写书评

暂无评论

Drop test simulation and DOE analysis for design optimization of microelectronics packages

Drop test simulation and DOE analysis for design optimizatio...

引用

Electronic Components and Technology conference (ECTC)

作者： Yu Gu D. Jin RF Micro Devices Inc. Greensboro NC USA

For better drop performances, there have been significantly increased research works focusing on different levels (e.g. product- and board-level) of reliabilities for microelectronics packages. Many important factors have been considered in the recent experimental and numerical studies. The interactions between these factors, e.g. sizes, materials, and etc, however, are relatively unknown. Based on finite element modeling and design of experiment (DOE), a novel approach was discussed in detail to investigate the impacts of all possible key factors as well as their weights and interactions on the dynamic responses of over-molded LGA (land grid array) RF packages. Molding compound, solder, and substrate materials, as well as the dimensions of die, die attach (DA), and solder layer, were considered to reduce the critical interfacial peeling stress so that an optimized design can be achieved. The DOE model was set-up through 3D full parametric modeling from which every key factor can be adjusted easily. Each DOE leg is a drop test simulation equivalent to JEDEC standard drop which has 1500g peak acceleration and 1 ms impulse duration. The simulations were conducted through LS-DYNA explicit finite element analysis and the DOE analyses were carried out through JMP. The experiment record of acceleration vs. time was input as load and constrain on the base plate of the drop test vehicle. Two rounds of DOE and totally 20 drop simulations were carried out to deliver the valid analysis. The first round is a screening DOE to identify the most important 3~4 factors. Then a full factorial DOE was carried out to study these key factors and their interactions. The final results could be used as a design guideline to improve the drop performance of microelectronics packages

关键词： Testing Analytical models US Department of Energy design optimization microelectronics Packaging Finite element methods Vehicle dynamics Radio frequency Microassembly

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共142页 << < 98 99 100 101 102 103 104 105 106 107 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：