The rapid progress in microsystems technology is increasingly supported by MEMS-specific modeling methodologies and dedicated simulation tools. These do not only enable the visualization of fabrication processes and o...
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The rapid progress in microsystems technology is increasingly supported by MEMS-specific modeling methodologies and dedicated simulation tools. These do not only enable the visualization of fabrication processes and operational principles, but they also assist the designer in making decisions with a view to finding optimized microstructures under technological and economical constraints. Currently strong efforts are being made towards simulation platforms for the predictive simulation of microsystems, i.e. the "virtual fabrication" and "virtual experimentation and characterization" on the computer. We discuss the most important aspects to be focussed on and practicable methodologies for microdevice and system modeling, in particular the consistent treatment of coupled fields and coupled domains required for setting up physically-based models for full system mixed-level simulation, and for the reliable validation and accurate calibration of the models.
The following topics are dealt with: thermal management; thermal interface materials; experimental methods and procedures; natural convection and passive thermal management of electronics; thermal and packaging optimi...
The following topics are dealt with: thermal management; thermal interface materials; experimental methods and procedures; natural convection and passive thermal management of electronics; thermal and packaging optimization in telecommunications; forced convection cooling; refrigerated systems; thermal design and sustainability; airborne and space system; heat sinks; micro and meso scale thermal management; fundamentals and applications of conduction; thermal simulation and modeling; system level thermal design of electronic equipment; data center thermal management; package characterization and modeling; novel cooling methods for microelectronics; software tools and techniques; thermal management of microelectronic systems; heat pipes and thermosyphons; high flux liquid cooling techniques; mechanics of materials; lead free solder materials and reliability; constitutive modeling and viscoplasticity; failure mechanics and damage modeling; package level reliability; modeling and simulation; nanoscale phenomena in microelectronics; green packaging; optoelectronics; MEMS modeling and packaging; nanoscale thermal effects in electronics; MEMS thermal management.
A new electrical simulation model for photogate active pixel sensor in CMOS imagers is proposed. Review of three conventional models is done and shows lack of accuracy. Therefore photoelectric mechanisms and charges t...
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A new electrical simulation model for photogate active pixel sensor in CMOS imagers is proposed. Review of three conventional models is done and shows lack of accuracy. Therefore photoelectric mechanisms and charges transfer of photogate pixel are analysed and lead to the definition of a Verilog-A description model. This model is then simulated into the Cadence design tool environment and simulation results show great improvements in simulation accuracy of the proposed model versus others ones.
作者:
M.K. IyerMicrosystems
Modules and Components Laboratory Institute of Microelectronics Singapore
Summary form only given. Current and future microsystems require a set of fundamental technologies that include microelectronics, photonics, MEMS, biological and wireless functions. For these functions to be integrate...
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Summary form only given. Current and future microsystems require a set of fundamental technologies that include microelectronics, photonics, MEMS, biological and wireless functions. For these functions to be integrated into systems they have to be designed, fabricated, assembled, tested and reliability assured which means they have to be packaged at the system level. This talk addresses some of the trends and key challenges for tomorrow's microsystems and how the microsystems technologies form the drivers of this information age. Research challenges pertinent to design, modeling and simulation, materials and assembly are also covered.
The nonlinear harmonic distortion is an important feature in the design and analysis of devices and analog integrated circuits. The design process is usually performed using the SPICE type simulation programs. The SPI...
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The nonlinear harmonic distortion is an important feature in the design and analysis of devices and analog integrated circuits. The design process is usually performed using the SPICE type simulation programs. The SPICE programs use different methods, as Fourier analysis and non linearity coefficients, for analysis distortion but in most of the cases the results are not quite good, In this work we present results of applying the recently developed Integral Function Method (IFM) to the analysis of non-linear harmonic distortion of simulated devices in SPICE.
This study presents the development of a cache memory module in a component library, designed for fast and synthetic embedded system simulation. This paper also demonstrates the possibility of integrating an existing ...
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This study presents the development of a cache memory module in a component library, designed for fast and synthetic embedded system simulation. This paper also demonstrates the possibility of integrating an existing power consumption analytical model in a SystemC description at the cycle-accurate register-transfer level (RTL).
This paper presents hardware design of a Rayleigh fading simulator that efficiently generates Gaussian variates with Jakes power spectral density. The architecture is based on Komninakis design consisting of a fixed I...
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This paper presents hardware design of a Rayleigh fading simulator that efficiently generates Gaussian variates with Jakes power spectral density. The architecture is based on Komninakis design consisting of a fixed IIR filter followed by a polyphase interpolator for different Doppler rates. The hardware simulator facilitates real time error performance evaluation of wireless channels in Rayleigh fading environments. It also offers the potential of improving the evaluation speed by orders of magnitude over a software based simulation.
This contribution investigates the scalability of thermal resistance in modem RF bipolar transistors. Several different geometries of silicon-on-glass devices are numerically simulated in 3-D and the dependencies on g...
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This contribution investigates the scalability of thermal resistance in modem RF bipolar transistors. Several different geometries of silicon-on-glass devices are numerically simulated in 3-D and the dependencies on geometric features are evidenced. A convenient meshing procedure is specifically developed for very thin geometries. simulations are supported by a compact closed-form analytical model. The combination of both simulations and the model allows prediction of thermal resistance at device design stage.
We present a compact and scalable model for on-chip transformers fabricated in silicon IC technology. The model is driven from the layout and the process technology specifications. It is suitable for design optimizati...
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We present a compact and scalable model for on-chip transformers fabricated in silicon IC technology. The model is driven from the layout and the process technology specifications. It is suitable for design optimization and circuit simulation. EM-simulation is used to validate the model. The proposed model shows excellent agreement with EM-simulation over a large frequency range (1-15 GHz).
With the relentless trend towards ever increasing number of I/Os of IC chips, the pitch of chip-to-substrate interconnections are ever decreasing. As the pitch is decreased so also will be the stand-off. If the coeffi...
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With the relentless trend towards ever increasing number of I/Os of IC chips, the pitch of chip-to-substrate interconnections are ever decreasing. As the pitch is decreased so also will be the stand-off. If the coefficient of the thermal expansion of the chip and substrate remains the same, and the temperature cycling range remains the same, the stresses and strains induced in the interconnections will increase dramatically. This will probably decrease the fatigue life of the interconnections to an unacceptably low level unless novel designs and materials can be produced to address the problem. This paper describes the challenges in the design and thermomechanical modeling of the reliability of next generation ultra fine-pitch wafer level packages. Three designs of interconnections at 100 /spl mu/m pitch for 20 mm/spl times/20 mm wafer level packages are proposed and modeled. Two thermomechanical modeling approaches, namely, the equivalent beam approach and the small sector approach, have been developed to perform the the effective modeling of 40,000 interconnections per package. It was found that the key parameter is the coefficient of thermal expansion of the board which has to be made to match closer to that of the silicon chip in order to meet current reliability standards.
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