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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"
1419 条 记 录,以下是1271-1280 订阅
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Optimizing the simulation of bipolar transistor packages using sliding mode techniques
Optimizing the simulation of bipolar transistor packages usi...
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conference on design, Characterization, and Packaging for MEMS and microelectronics
作者: Mkrttchian, V Simonyan, A Mkrtchyan, K Stat Engn Univ Armenia Yerevan 375009 Armenia
modeling packaged electronic elements is encumbered by parasitic effects and discontinuities causing enlarged parameters and is done using numerical field simulation in reference to results of on-wafer measurements an... 详细信息
来源: 评论
Interconnect modeling in deep submicron design  6
Interconnect modeling in deep submicron design
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6th International conference on VLSI and CAD, ICVC 1999
作者: Oh, Soo-Young Jung, Won-Young Kong, Jeong-Taek Lee, Keun-Ho Verilux Design Technol. 830 E. Arques Avenue SunnyvaleCA94086 United States Samsung Electronics Co. LTD. San #24 Neungseo-Ri Kiheung-Eup Yongin-City Kyungki-Do Korea Republic of
As scaling has continued for more than 20 years, it has yielded faster and denser chips with ever increasing functionality. The scaling will continue down to or beyond 0.1 μm as proposed in the SIA Technical Road map... 详细信息
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A large signal elements' simulation of GaAs MESFET using neural network model
A large signal elements' simulation of GaAs MESFET using neu...
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1999 International conference on Computational Electromagnetics and its Applications. ICCEA 1999
作者: Gao, Yifan Gu, Cong Xi'An Highway Univ. China China Shannxi Lishan Microelectronics Institute Xi'an Shaanxi710054 China
Neural networks are important as fast and flexible tools for microwave modeling, simulation, optimization and design. A new approach of a neural-network based model is proposed to determine the large signal elements o... 详细信息
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A model of a 300 mm wafer fabrication line
A model of a 300 mm wafer fabrication line
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simulation Winter conference
作者: P.L. Campbell D. Rohan E.A. MacNair IBM Microelectronics Division East Fishkill NY USA IBM Thomas J. Watson Research Center Yorktown Heights NY USA
Semiconductor factories are very expensive to build and operate. It is critical to understand how to design and operate them efficiently. We describe a simulation model of a planned 300-mm wafer fabrication line that ... 详细信息
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A computationally efficient method for three-dimensional simulation of ion implantation
A computationally efficient method for three-dimensional sim...
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International conference on simulation of Semiconductor Processes and Devices (SISPAD)
作者: A. Burenkov K. Tietzel A. Hossinger J. Lorenz H. Ryssel S. Selberherr Bauelemente Technologie Fraunhofer Institut für Integrierte Schaltungen Erlangen Germany Institute for Microelectronics Technische Universitat Vienna Vienna Austria
The high accuracy which is necessary for modern process simulation often requires the use of Monte-Carlo ion implantation simulation methods, with the disadvantage of very long simulation times especially for three-di... 详细信息
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Implementation of statistical characterisation and design techniques for an industrial 0.5 /spl mu/m CMOS technology
Implementation of statistical characterisation and design te...
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IEEE International conference on Microelectronic Test Structures
作者: S. Healy E. Horan K. McCarthy A. Mathewson Zhenqiu Ning E. Rombouts W. Vanderbauwhede M. Tack National Microelectronics Research Centre Cork Ireland Alcatel Microelectronics Oudenaarde Belgium
This paper presents a methodology for statistical worst-case simulation using the BSIM3v3 model within commercially available tools. Statistical techniques such as principal component analysis and Box-Behnken designs ... 详细信息
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Computer aided optimum design of broadband microwave VCO's
Computer aided optimum design of broadband microwave VCO's
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International conference on microelectronics, ICM
作者: C. Ghennai M.J. Howes Institute of Electrical Eng University of Batna Algeria Department of Electronic & Electrical Eng University of Leeds UK
Microwave solid-state voltage-controlled oscillators (VCOs) are the keystone components in various microwave systems. Thus far, achievements in practical realisation of such circuits rely on measured data or approxima... 详细信息
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Detailed analysis of the gate delay variability in partially depleted SOI CMOS circuits
Detailed analysis of the gate delay variability in partially...
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IEEE SOI-3D-Subthreshold microelectronics Technology Unified conference (S3S)
作者: I. Aller K.E. Kroell IBM Entwicklung GmbH Boeblingen Germany
Circuit design using partially depleted (PD) SOI FETs must take into account a variable gate delay which is dependent on the switching history of the circuits (Gautier et al, 1997; Houston and Unnikrishnan, 1998). In ... 详细信息
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A two stages MMIC CDMA power amplifier using harmonic load pull simulation technique
A two stages MMIC CDMA power amplifier using harmonic load p...
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Asia-Pacific conference on Microwave
作者: Jiang Cao R. Singh Bo Liang Xinwei Wang Khoo Ee Sze H. Nakamura Institute of Microelectronics Singapore Oki Techno Centre Singapore Private Limited Singapore
This paper reports a two stages MMIC power amplifier with low quiescent current and high power added efficiency (PAE) for PCS CDMA application. Based on an accurate large signal PHEMT model, a systematic load (source)... 详细信息
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Operational simulation of an X-ray lithography cell: comparison of 200 mm and 300 mm wafers
Operational simulation of an X-ray lithography cell: compari...
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simulation Winter conference
作者: K.P. White W.J. Trybula Department of Systems Engineering Institute for Microelectronics University of Virginia Charlottesville VA USA International Sematech Inc. Austin TX USA
We review progress on a project to evaluate prospective operations in a semiconductor wafer fab that employs next generation, proximity X-ray lithography to pattern the critical dimensions of computer chips. A simulat... 详细信息
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