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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

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Statistical design of a multiplier using a low voltage square-law CMOS cell

Statistical design of a multiplier using a low voltage squar...

引用

IEEE Asia-Pacific conference on Circuits and Systems

作者： T.B. Tarim H. Hakan Kuntman M. Ismail Ohio State Uinversity Columbus OH USA Department of Electronics Engineering Istanbul Technical University Istanbul Turkey Department of Electrical Engineering Ohio State Uinversity Columbus OH USA

The statistical design of a new multiplier using the square-law characteristics of MOS transistors in the saturation region is discussed in this paper. The multiplier is statistically robust and has a good yield. Initial simulation results of the circuit have been given and the offset current and nonlinearity of the multiplier has been statistically examined. Response Surface Methodology and design of Experiment techniques were used as statistical VLSI design tools combined with the statistical MOS model. Device size optimization and yield enhancement have been demonstrated.

关键词： Low voltage Circuit simulation Process design Threshold voltage Transconductance MOSFETs Semiconductor device modeling Frequency response Very large scale integration Power supplies

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A mixed-level power estimator for CMOS circuits using pattern compaction techniques

A mixed-level power estimator for CMOS circuits using patter...

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IEEE Asia-Pacific conference on Circuits and Systems

作者： Wen-Liang Hsu Wen-Zen-Shen Jiing-Yuan Lin Science-Based Industrial Park Winbond Electronics Corporation HsinChu Taiwan Department of Electronics Engineering National Chiao Tung University HsinChu Taiwan

ISBN: (纸本)0780351460

This paper presents a novel methodology for the average power estimation. According to the power information obtained from logic-level simulation, we first perform pattern compaction and derive the relative weighting factors, and then perform accurate transistor-level power simulation by using the compact sequence. Combining both the weighting factors and the accurate power dissipation data, we calculate and report the estimated average power dissipation. Finally, we verify our method by using some practical industrial design examples with their functional simulation patterns. The experimental results show that our approach could speed up to two orders of magnitude without losing too much accuracy.

关键词： Compaction Circuit simulation Power dissipation Semiconductor device modeling Clocks Capacitance Industrial electronics Electronics industry SPICE Hardware design languages

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Some general approaches for performance analysis of the ALOHA-based satellite channel

Some general approaches for performance analysis of the ALOH...

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IEEE Asia-Pacific conference on Circuits and Systems

作者： S. Assavaruk S. Sittichevapak R. Varakulsiripunth Faculty of Engineering & Research Center for Communication and Information Technology King Mongkut's Institute of Technology Ladkrabang Bangkok Thailand

A satellite link has been employing as the minor part of a data network for many years, but it is a hard task for engineers to initially design and evaluate a network employing both terrestrial and satellite links, since the satellite scheme from each vendor has different aspects and conditions, though their basic structures are similar. This paper presents a general model of satellite channel with multiple access scheme. It employs a simple flow basis of the number of blocked stations to represent system behavior at equilibrium point. The model has a general and plain structure and, thus, has the benefit of: 1) easy conformation to different types of satellite channel where rudimentary structure is random access method, especially slotted ALOHA, for inroute channel; 2) results are expressed in terms of general performance measures which could be painlessly interfaced to a terrestrial network. Finally, results obtained from simulation and numerical computation are presented and compared.

关键词： Performance analysis Artificial satellites design engineering Data engineering Numerical simulation Throughput Information technology Electronic mail Computational modeling Analytical models

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New double charge-pumping circuit for high-voltage generation

New double charge-pumping circuit for high-voltage generatio...

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IEEE Asia-Pacific conference on Circuits and Systems

作者： M. Nozaki W. Tangsrirar Y. Suzuki M. Yoshid S. Saitoh M. Teramoto A. Yamaguchi Department of Communication Engineering School of Engineering Tokai University Hiratsuka Japan RISC Processor Design Sec. Micro & Custom LSI Design Department Micro & Custom LSI Division TOSHIBA Corporation Kawasaki Japan

We have proposed a double charge-pumping circuit composed of PMOS transistors. The circuit does not suffer from the threshold voltage loss of the PMOS transistors. Therefore, the circuit can generate a high voltage which is proportional to the number of pumping stages. Computer simulation was applied to a 24-stage circuit. As a result, the output voltage of the circuit was as high as +20 V under the condition of V/sub DD/=+ 1 V.

关键词： Charge pumps Circuits MOSFETs Threshold voltage Large scale integration Power supplies Nonvolatile memory MOS devices Clocks Computational modeling

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A new modeling approach for high-speed and high-frequency circuits and systems

A new modeling approach for high-speed and high-frequency ci...

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International conference on Microwave and Millimeter Wave Technology Proceedings

作者： F. Wang V. Devabhaktuni Q.J. Zhang Department of Electronics Carleton University Ottawa ONT Canada

A novel neural based modeling technique for high-speed/high-frequency circuits and systems has been developed. The feasibility and efficiency of neural models have been demonstrated through examples. The proposed knowledge based neural network (KBNN) combines engineering empirical knowledge with the learning power of neural networks. With the ultra fast recalling speed of neural models, it will have a significant impact on the development of interactive CAD tools.

关键词： Circuits and systems Neural networks Predictive models Training data Circuit simulation Testing Distributed parameter circuits Drives microelectronics design automation

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An improved simulation model of a brushless DC motor drive system for industrial applications

An improved simulation model of a brushless DC motor drive s...

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Mediterranean Electrotechnical conference (MELECON)

作者： R.A. Guinee C. Lyden Department of Electrical Engineering Cork Institute of Technology Cork Ireland National Microelectronics Research Centre University College Cork Ireland

An accurate and simplified model of a brushless DC motor drive (BLMD) system is presented as a simulation tool for performance related studies in industrial drive applications and for system identification in controller design. The model relies on the single Fourier series expression for pulsewidth modulation (PWM), which includes the effects of inverter dead time as a substantial part of the switching period T/sub s/, in the current control loop. This simplified approach obviates the need for very small time steps (/spl sim/0.5% T/sub s/), in the search of PWM edge transitions within a switching interval, for accurate simulation. Substantial improvement in simulation speed is achieved (up to fiftyfold) with a beneficial saving in computation (CPU) resources. Model integrity is validated when simulation results are checked against actual BLMD test data for coherence. Subsequent model simulations illustrate the effect of inverter delay on the reduction of generated torque and power transfer.

关键词： Brushless DC motors Pulse width modulation inverters Computational modeling Pulse width modulation Electrical equipment industry Industrial control System identification Control system synthesis Fourier series Pulse inverters

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Defect-oriented testing of analogue and mixed signal ICs

Defect-oriented testing of analogue and mixed signal ICs

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IEEE International conference on Electronics, Circuits and Systems (ICECS)

作者： M.B. Santos F.M. Goncalves M. Ohletz J.P. Teixeira IST INESC Lisboa Portugal Alcatel Microelectronics Brussels Belgium

The high costs of testing analogue and mixed-signal Integrated Circuits (ICs) are driving a large research effort on test preparation in the IC design environment. In this paper, we highlight the usefulness of using a Defect-Oriented (DO) approach for test preparation, in order to generate and validate low-cost, high-quality tests. DO fault modeling is carried out using an Inductive Fault Analysis (IFA) strategy. Analogue fault simulation feasibility is analyzed. Analog Test Stimuli (ATS) generation for mixed-signal ICs is performed using digital BIST test hardware, available on-chip. A DO test environment and tools are presented. simulation results are described, showing also how layout-driven design-For-Testability (DFT) can enhance product quality and reliability, while cutting test costs.

关键词： Circuit testing Circuit faults Costs Integrated circuit testing Mixed analog digital integrated circuits Analog integrated circuits Analytical models Performance evaluation Built-in self-test Hardware

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design and optimization of double-gate SOI MOSFETs for low voltage low power circuits

Design and optimization of double-gate SOI MOSFETs for low v...

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IEEE SOI-3D-Subthreshold microelectronics Technology Unified conference (S3S)

作者： L. Wei Z. Chen K. Roy Purdue University West Lafayette IN USA

With the growing use of portable and wireless electronic systems, design of high performance, low-voltage, low-power digital devices and circuits has become an important concern for VLSI applications. The double-gate (DG) fully-depleted (FD) silicon-on-insulator (SOI) MOSFET has an ideal subthreshold slope, high drive current and superb short channel effect immunity, which makes it very attractive in low-voltage, low-power, and high-performance CMOS designs. In this paper, by solving the Poisson equation, we propose a general model which has been verified by SOI-SPICE simulations. Based on this model, DGSOI MOSFETs are compared with conventional single gate FD SOI (SGSOI) MOSFETs, and the design and optimization of DGSOI MOSFETs in terms of circuit delay, power dissipation and power delay product are presented. In our analysis, we focus on FD DGSOI transistors without volume inversion, where the classical method is still valid.

关键词： design optimization MOSFETs Low voltage Semiconductor device modeling Delay Very large scale integration Silicon on insulator technology Poisson equations Circuit simulation Power dissipation

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Electrical modeling and simulation for mixed-signal interconnect and packaging

Electrical modeling and simulation for mixed-signal intercon...

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Proceedings of the 1997 2nd Annual IEEE International conference on Innovative Systems in Silicon

作者： Cangellaris, Andreas C. Univ of Illinois at Urbana-Champaign Urbana United States

The explosive growth of wireless communications, combined with the rapid advances in high-performance portable computing, are driving the microelectronics industry toward the development of a variety of multi-functional, low-cost, compact, mixed-signal electronic products. These new products call for novel, often revolutionary, practices in functional block integration and packaging. Some of the challenges associated with the electrical design and rapid prototyping of these systems are discussed in this paper. Examples are given of existing electromagnetic modeling methodologies and associated CAD tools that can be used today to facilitate the design of these novel packages. The paper concludes with a brief discussion of on-going research activities toward the enhancement of these modeling/simulation methodologies and the eventual establishment of an electromagnetic CAD environment for mixed-signal system electrical design.

关键词： microelectronics

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''Learning by virtual doing'': Protocol simulators for surface analysis in microelectronics

''Learning by virtual doing'': Protocol simulators for surfa...

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1997 IEEE International conference on Microelectronic Systems Education (MSE 97) - Doing More with Less in a Rapidly Changing Environment

作者： Pecheux, F Herve, Y Marchal, H Hertel, N Stoquert, JP Stuck, R CNRS/PHASE Strasbourg France

ISBN: (纸本)0818679964

The paper details how state-of-the-art technologies like multimedia computer modeling and simulation may be applied with profit for education in microelectronics. Be presents a set of multimedia courses on material characterization of VLSI wafers with different techniques. The major interest of the courses is the protocol simulator available for each technique. Such a simulator aims at giving the user a good look and feel of the real and complex experimental setup by allowing him to perform actions on its simulated model, according to the real protocol of use. Thanks to an appropriate design methodology, it is pretty easy to adapt the protocol simulator engine to any industrial or academic specific setup and to couple it with other simulators (like spectrum simulator), thus providing virtual instrumentation on surface analysis.

关键词： VLSI circuits

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