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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

共 1418 条记录，以下是1341-1350 订阅

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Investigation on the Radiation Emission Characteristics of Printed Circuit Boards with Integrated Isolation Chip

Investigation on the Radiation Emission Characteristics of P...

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Electronic Information Engineering and Computer Technology (EIECT), International conference on

作者： Fang Liu Tianmeng Zhang Tianting Zhao Yiming Chen Yue Zhuo Jianyu Feng Mengjiao Li Jinchun Gao Beijing Smart-chip Microelectronics Technology Co. Ltd. Beijing China Beijing Key Laboratory of Work Safety Intelligent Monitoring Beijing University of Posts and Telecommunications Beijing China

ISBN: (数字)9798331528850

ISBN: (纸本)9798331528867

Isolation technology is widely used in high-low voltage transformation and long-distance transmission to effectively improve the reliability of the system. However, the imperfect design of the transformer inside the isolation chip may lead to an interference path between the primary and secondary coils of the transformer, which causes radiation emission. Accordingly, in this current work, the radiation emission characteristic of the printed circuit board (PCB) was investigated by simulation analysis and experimental tests. The main radiation sources in isolation chip were extracted, and the electromagnetic interference (EMI) radiation model was developed in electromagnetic simulation software to analyze the maximum radiation intensity of the PCB. A series of experimental tests are conducted to validate the electromagnetic field model. The results of this study provide a better understanding of the radiation emission characteristic of isolation chips and theorical support for improving the electromagnetic compatibility in the electronic system.

关键词： Coils Analytical models Printed circuits Electromagnetic interference Voltage Transformers Three-dimensional printing Numerical models Electromagnetic fields Integrated circuit modeling

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An Automatic Chip-Package Co-design Flow for Multi-core Neuromorphic Computing SiPs

An Automatic Chip-Package Co-Design Flow for Multi-core Neur...

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Electronics Packaging Technology conference (EPTC)

作者： Jingjing Lan Vishnu P. Nambiar Rheeshaalaen Sabapathy Rahul Dutta Chai Tai Chong Mihai Dragos Rotaru Kuang Kuo Lin Surya Bhattacharya Kevin Tshun Chuan Chai Anh Tuan Do Institute of Microelectronics Agency for Science Technology and Research Singapore

ISBN: (数字)9781728189116

ISBN: (纸本)9781728189123

The complexity and cost of system-on-chip (SoC) designs keep increasing every year, which has progressively led to more opportunities for 2.5D System-in-Package (SiP) design. While 2.5D integration technology offers advantages for heterogeneous chiplet-based systems, it also poses challenges of a more complex overall design flow with limited EDA tools support, physical design optimization issues, interposer floor-planning difficulties and complex system-level verification. Furthermore, accurate inter-chiplet connection modeling, chiplet characterization and top-level simulation activities are also needed for comprehensive verification of SiPs. To tackle these challenges, we share an automated chiplet-based codesign flow: built on the backbone with standard EDA design tools, an automatic SiP register transfer language (RTL) generator is developed for top-level SiP netlist generation; inter-chiplet connection routing with chip assembly router and parasitic extraction tools; interposer design and bumps placement with the foundry defined redistribution layer (RDL).

关键词： Wires Generators Tools Routing Two dimensional displays Transistors Multicore processing

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Enabling Power Side-Channel Attack simulation on Mixed-Signal Neural Network Accelerators

Enabling Power Side-Channel Attack Simulation on Mixed-Signa...

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Omni-layer Intelligent Systems (COINS), International conference on

作者： Simon Wilhelmstätter Joschua Conrad Devanshi Upadhyaya Ilia Polian Maurits Ortmanns Institute of Microelectronics University of Ulm Ulm Germany Institute for Computer Architecture and Computer Engingeering University of Stuttgart Stuttgart Germany

ISBN: (数字)9798350349597

ISBN: (纸本)9798350349603

Due to the tremendous success of Deep Learning with neural networks (NNs) in recent years and the simultaneous leap of embedded, low-power devices (e.g. wearables, smart-phones, IoT, and smart sensors), enabling the inference of those NNs in power-constrained environments gave rise to specialized NN accelerators. One paradigm followed by many of those accelerators was the transition from digital domain computing towards performing operations in the analog domain, turning them from digital to mixed-signal NN accelerators. While power-efficiency and inference accuracy have been researched with increasing interest, security and protection against a side-channel attack (SCA) have not found much attention. However, side-channels pose a major security concern by allowing an attacker to steal valuable knowledge about proprietary NNs deployed on accelerators. In order to evaluate mixed-signal NNs accelerators concerning SCA robustness, its tendency to leak information through the side-channel needs investigation. In this work, we propose a methodology for enabling side-channel analysis of mixed-signal NNs accelerators, which shows reasonable accuracy in an early development stage. The approach enables the reuse of large portions of design sources for simulation and production while providing flexibility and fast development cycles for changes to the analog design.

关键词： Accuracy Computational modeling Artificial neural networks Side-channel attacks Production Turning Robustness

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A Novel Method for Air-Gap Formation around Via-Middle (VM) TSVs for Effective Reduction in Keep-Out Zones (KOZ)

A Novel Method for Air-Gap Formation around Via-Middle (VM) ...

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Electronic Components and Technology conference (ECTC)

作者： King-Jien Chui Woon Leng Loh Xiangyu Wang Zhaohui Chen Mingbin Yu Institute of Microelectronics A*STAR (Agency for Science Technology and Research) Singapore

Significant stress is induced in the crystalline Si area around a Cu-filled Through Silicon Via (TSV) due to the large mismatch in the co-efficient of thermal expansion (CTE) between Si and Cu. As a result, CMOS devices fabricated within the stressed Si region will show undesired variations in their electrical performance. This paper reports a novel method to isolate the TSV-induced stress from active CMOS devices through the formation of embedded air-gaps. As the air-gaps are embedded in the Si, stress isolation can be done without compromising on the usable Si area. Formation of the air-gaps have been demonstrated experimentally using a high temperature anneal in a de-oxidizing ambient. Stress reduction in the Si lattice, in the presence of the embedded air-gaps, will be studied through thermo-mechanical stress simulation. Effect of the impact of air-gap design will also be discussed.

关键词： Air gaps Silicon Through-silicon vias Stress Annealing Atmospheric modeling Surface treatment

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Silicon implementation of micro pressure sensor

Silicon implementation of micro pressure sensor

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International conference on Electronic Devices, Systems and Applications (ICEDSA)

作者： Yufridin Wahab Aladin Zayegh Rezaul Begg Centre for Industrial Collaboration School of Microelectronic Engineering Universiti Malaysia Pedis Kangar Malaysia Centre for Microelectronics and Telecommunication Centre for Ageing Rehab. Exercise & Sport Science Victoria University Melbourne Australia

ISBN: (纸本)9781424466290;9781424466320

Pressure sensing is one of the mostly performed measurement encompassing varieties of applications. The latest technology such as silicon based Micro-electromechanical Systems (MEMS) technology is favoured due to its competitive cost and proven performance. In our research, MEMS pressure sensor for biomedical application is investigated. There are a number of stages involved in our research for implementation of a MEMS pressure sensor which includes application review, conceptual design, modeling, simulation, tape-out, fabrication and characterization. A highly proven technology offered by Infineon Technologies SensorNor AS is used in this research and the requirements are discussed. Recently, the device is successfully implemented on silicon and our research is now entering the characterization stage. In this paper, the research work prior to fabrication, the fabrication result and the post foundry packaging tasks for full device characterization are discussed. Future works are also discussed in the final section.

关键词： Silicon Biosensors Micromechanical devices Fabrication Sensor phenomena and characterization Performance evaluation Biomedical measurements Pressure measurement Microelectromechanical systems Costs

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Analysis of the three-dimensional delamination behavior of stretchable electronics applications

Analysis of the three-dimensional delamination behavior of s...

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Thermal, Mechanical and Multiphysics simulation and Experiments in Micro-Electronics and Micro-Systems EuroSimE

作者： O. van der Sluis P.H.M. Timmermans E.J.L. van der Zanden J.P.M. Hoefnagels Philips Applied Technologies Eindhoven Netherlands Department of Precision and Microsystem Engineering Delft University of Technnology Delft Netherlands Department of Mechanical Engineering Eindhovan University of Technology Eindhoven Netherlands

Stretchable electronics offer potential application areas in biological implants interacting with human tissue. Furthermore, they facilitate increased design freedom of electronic products. Typical applications can be found in healthcare, wellness and functional clothes. A key requirement on these products is the ability to withstand large deformations during usage without losing their integrity (i.e., large stretchability). One of the possible basic designs for stretchable electronics is to interconnect small rigid semiconductor islands with thin metal conductor lines on top of a highly deformable substrate, such as a rubber material. In this case, large stretchability must also be provided by these thin metal conductor lines. The adhesion of the conductor lines to the rubber substrate is of major importance from a reliability point of view. Experimental observations show that delamination between the metal conductor lines and the stretchable substrate may eventually lead to short circuits while also the delaminated area could result in cohesive failure of the metal lines. To understand and quantify the behavior of the copper-rubber interface, peel tests are performed and analyzed by means of experiments and numerical simulations. Interestingly, experimental observations show that the rubber is severely lifted at the delamination front caused by its high compliance. To quantify the interface properties, numerical simulations of the peel test have been performed by developing a finite element model comprising of cohesive zone elements by which the transient delamination process during the peel test is described in detail. By means of an extensive model parameter sensitivity study combined with the measured peel-force curves and the rubber-lift geometry at the delamination front, the final set of model parameters has been determined. Finally, the thus obtained model parameters are used to simulate the delamination behavior of actual three-dimensional stretchable elec

关键词： Delamination Conducting materials Substrates Rubber Performance evaluation Numerical simulation Testing Solid modeling Implants Humans

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DAC technologist panel "the IC nanometer race - what will it take to win"

DAC technologist panel "the IC nanometer race - what will it...

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design Automation conference

作者： W.C. Rhines L. Parker G. Singer P. Magarshack D. Buss Fu-Chieh Hsu Ho-Kyu Kang Mentor Graphics Corporation Wilsonville OR USA Intel Corporation Santa Clara CA USA ST Microelectronics S.r.L. Crolles France Texas Instruments Inc. Dallas TX USA Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan Samsung Electronics Company Limited Seoul South Korea

Creating ICs in the nanometer age is a high-stakes race that few companies can afford to compete in - and even fewer can win. Hear how senior technologists from the world's top technology companies are striving to improve their chances of success. Will leakage constraints force power-sensitive applications to stay with older technologies, or will there be a bifurcation to a new process technology? Will ballooning capital equipment expenses delay new capacity or price out design rules for mainstream applications? Will silicon-on-insulator and new device structures like FinFETs force rethinking of design, modeling and simulation methodologies? And which EDA technologies, delivered when, will be critical for victory? These senior technologists, from some of the biggest companies in the high tech industry, will discuss and debate how they think the overall industry will successfully transition to the nanometer age. Specific examples from the technologists' broad exposure to industry trends and competitors will help illustrate their forecasts and predictions

关键词： Application specific integrated circuits Costs Silicon on insulator technology Graphics Economic forecasting Instruments Semiconductor device manufacture Bifurcation Delay FinFETs

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A Fully Static Scheduling Approach for Fast Cycle Accurate SystemC simulation of MPSoCs

A Fully Static Scheduling Approach for Fast Cycle Accurate S...

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2007 International conference on microelectronics (ICM'07)

作者： Richard Buchmann Alain Greiner LIP6/UPMC Université Pierre et Marie Curie Paris France

This paper presents principles and tools to facilitate Multi-Processor System on Chips (MPSoCs) design and modeling, and to speed up cycle accurate SystemC simulation. We describe an effective way to build an hardware architecture virtual prototype, using a library of SystemC simulation models based on communicating synchronous finite state machines. This modeling approach supports a fully static scheduling strategy, based on the analysis of the combinational dependency graph. Our static scheduling algorithm has been implemented in the SystemCASS simulator, and provides speed-up of one order of magnitude versus the standard event-driven SystemC simulation engine. The modeling approach proposed in this paper has been adopted by the SoCLIB french national project, that is an open modeling and simulation platform for multi-processors system on chips.

关键词： Computational modeling Hardware Job shop scheduling Virtual prototyping Discrete event simulation Dynamic scheduling Signal processing System-on-a-chip Libraries Automata

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The Impact of PTS Doping and Fin Angle on TID Response of 14-nm bulk FinFETs

The Impact of PTS Doping and Fin Angle on TID Response of 14...

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International conference on Solid-State and Integrated Circuit Technology

作者： Jia-Ning Wang Xia An Zhe-Xuan Ren Gen-Song Li Wan-Rong Zhang Ru Huang Faculty of Information Technology Beijing University of Technology Beijing China Institute of Microelectronics Peking University Beijing China

In this paper, the impact of punch-through stop (PTS) doping and fin angle on the total ionizing dose (TID) response of 14nm bulk FinFETs are investigated by 3D TCAD simulation. The off-state leakage current (I off ) degradation induced by TID irradiation is effectively reduced with the increase of PTS doping concentration and depth. The optimized PTS doping condition is illustrated to improve the TID hardness of bulk FinFETs. Besides, the impact of fin angle on TID response is also investigated, which shows limited impact on the performance degradation. The results may provide guideline for radiation hardening process design of bulk FinFETs.

关键词： FinFETs Doping Leakage currents Semiconductor process modeling Radiation effects Degradation Logic gates

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Impedance Spectroscopy Analysis of Cell-Electrode Interface

Impedance Spectroscopy Analysis of Cell-Electrode Interface

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Annual International conference of the IEEE Engineering in Medicine and Biology Society (EMBC)

作者： Lin Jianhui Wu Xiaoming Huang Pengsheng Ren Tianling Liu Litian Institute of Microelectronics Tsinghua University Beijing China

Many chronically implanted electrodes suffer sensitivity loss in their applications in brain computer interface systems. It is hard to diagnose the cause of the problem because few measures are available to analyze directly what happened on the cell-electrode interface. In this paper, the impedance characterization of the cell-electrode interface was discussed in detail using equivalent circuit approach, which was used to evaluate the cause of the electrode sensitivity loss. The impedance spectroscopy of the cell-electrode interface acts as a function of several parameters, such as the sealing resistance and the shunt capacitance between the microelectrode and the electrolyte. Changes of the impedance spectroscopy can be traced to the parameter changes of the equivalent circuit, which reflect the status of the cell-electrode interface, such as the cell-electrode gap change, the erosion of microelectrodes, and so on. The circuit impedance simulation results give an important reference for the monitor of the cell-electrode connection, and are also helpful for the improvement of the microelectrode design

关键词： Electrochemical impedance spectroscopy Immune system Frequency Capacitance Computational modeling Biomedical electrodes Mathematical model Equivalent circuits Biomembranes Analytical models

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