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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

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Hardware Implementation of Optimized LeNet-5

Hardware Implementation of Optimized LeNet-5

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Computational modeling, simulation and Data Analysis (CMSDA), International conference on

作者： Junlei Ju Cheng Liu School of Microelectronics Shanghai University Shanghai China

Convolutional Neural Network (CNN), a feedforward neural network, is widely used in large-scale machine learning tasks such as image recognition, image classification, and object detection. Although CNN has strong performance, its application in daily embedded systems is limited due to the complex network hierarchy and a large amount of data. In this paper, the LeNet-5 network structure is optimized. The recognition accuracy of the optimized network on the MNIST dataset is 98.32%, but the number of weights is reduced by more than ten times compared with the LeNet-5 network, and data quantization is used to convert the weights into 8-bit fixed-point numbers, which is more suitable for deployment in the hardware with limited resources and power consumption. At the same time, different hardware structures and optimization strategies are designed for each layer of the network, and the convolution, pooling and fully connected layers are computed in parallel and optimized using methods such as loop unrolling and pipelining. Finally, the feasibility of the hardware design is verified by simulating each layer using the MNIST dataset and quantized weights.

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Topology- and Resource-Based Distribution Scheme for Collaborative Security-Focused design Space Exploration in Large-Scale Static WSNs

Topology- and Resource-Based Distribution Scheme for Collabo...

引用

Australasian Telecommunication Networks and Applications conference, ATNAC

作者： Benjamin Förster Thomas Hinze Peter Langendorfer Cyber-Physical System Engineering IHP - Innovations for High Performance Microelectronics Frankfurt (Oder) Germany Brandenburg University of Technology Cottbus-Senftenberg Cottbus Germany Dpt. of Bioinformatics Faculty of Biological Sciences Matthias-Schleiden Institute University of Jena Jena Germany

ISBN: (数字)9798350379112

ISBN: (纸本)9798350379129

Security is a crucial aspect in wireless sensor networks (WSNs), ensuring protection of the network and its data against attackers. The resource-constrained nature of sensor nodes, however, poses a challenge for the implementation of security means. Instead of perfect security a trade-off between security, longevity and functional requirements is necessary. The problem of designing optimal security configurations for large-scale static WSNs, becomes even more complex when we intend to take advantage of the distributed nature. On the model of a neighbourhood watch, the advantage of distributed collaborative security is displayed, in which security coverage increases, while the individually induced workload for security tasks is reduced. Ensemble security frameworks provide similar solutions for WSNs by combining multiple security means. While they are capable of optimally utilising available resources to maximise security, they are highly specialised, hence not well adaptable to new applications and requirements. We propose a topology- and resource-based distribution scheme for the design of distributed collaborative security configurations in large-scale static WSNs. Further, we elaborate the application of our scheme and its suitability to be integrated into a design space exploration (DSE) concept. Moreover, we propose a DSE concept that combines exhaustive and heuristic exploration techniques and is able to integrate analytical and simulation models for evaluation. The computational efficiency of our distribution scheme is evaluated on lambda-precision unit disk graphs as models for WSNs with up to 300 nodes.

关键词： Wireless communication Wireless sensor networks Analytical models Computational modeling Collaboration Space exploration Computational efficiency Security Protection Optimization

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System-Level Evaluation of AOS Gain Cell eDRAMs for Low-Power Normally-Off Computing

System-Level Evaluation of AOS Gain Cell eDRAMs for Low-Powe...

引用

International conference on Solid-State and Integrated Circuit Technology

作者： Long Chen Yecheng Yang Wei Li Shao Hao Wang School of Advanced Manufacturing Fuzhou University Fujian Jinjiang China FZU-Jinjiang Joint Institute of Microelectronics Fuzhou University Fujian Jinjiang China

ISBN: (数字)9798350361834

ISBN: (纸本)9798350361841

Recent gain cell (GC) embedded dynamic random access memory (eDRAM) using short channel length amorphous oxide semiconductor (AOS) field-effect transistors (FETs) has demonstrated extremely low leakage current and promising three-dimensional integrating capacity. This makes AOS-GC eDRAM a promising technology for normally-off computing applications. However, the lack of comprehensive models and evaluation approaches prevents the exploration and optimization of its design space. We presented a system-level simulation approach, GCSim, to perform power analysis for low-power scenarios. The results indicate that AOS-GC eDRAM can provide higher density, lower static power, and dynamic energy compared to static random access memory (SRAM) and silicon-based GC (Si-GC) eDRAM. For normally-off computing applications, such as the intermittent wake-up deep neural network (DNN), the quasi-nonvolatile AOS-GC eDRAM can achieve up to 96.7% energy savings compared to SRAM when the wake-up interval exceeds one second.

关键词： Integrated circuit technology Computational modeling Field effect transistors Energy conservation Random access memory Artificial neural networks Leakage currents Optimization

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design of a Reconfigurable Information Collection and Identification System for Packages Storage and Checkout 3

Design of a Reconfigurable Information Collection and Identi...

引用

2021 3rd International conference on Computer modeling, simulation and Algorithm, CMSA 2021

作者： Shi, Yangao Qian, Guoming Shen, Jianghao College of Electronic and Optical Engineering College of Microelectronics Nanjing University of Posts and Telecommunications Nanjing210003 China

With the continuous and rapid development of e-commerce, the requirements of logistics informatization are also increasing. At present, the barcode collection and identification device used in the operation of packages storage and checkout is generally based on ASIC chip, which is not fast enough. Therefore, this paper proposes a reconfigurable information acquisition and identification system, which is applied to the operation of package storage and delivery. This system uses FPGA + ARM architecture to realize the functions of identifying, storing and uploading the barcode information on the outer surface of the package to the host computer through UDP protocol. Because the parallel operation structure of FPGA is used to design the barcode image processing accelerator circuit, the data processing capacity of the soft core processor is reduced, and the recognition speed of the system is improved as a whole. The test shows that this system is faster and more accurate than the package barcode information recognition device based on ASIC technology. © Published under licence by IOP Publishing Ltd.

关键词： Field programmable gate arrays (FPGA)

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Research on Low-Power Main Control Chip Architecture Based on Edge Computing Technology 7

Research on Low-Power Main Control Chip Architecture Based o...

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2020 7th International conference on Computer-Aided design, Manufacturing, modeling and simulation, CDMMS 2020

作者： Cui, Guoyu Ye, Wei Hou, Zhanbin Li, Tong Liu, Ruolin Beijing SmartChip MicroElectronics Technology Company Limited Beijing100192 China State Grid Zhejiang Electric Power Corporation Information and Telecommunication Branch Hangzhou310020 China State Grid Jilin Electric Power Company Changchun 130021 China

With the continuous development of the times, chip technology has also been innovated. In order to meet the needs of edge computing networks and data communication networks, it is necessary to make chips with shorter delay time and lower power consumption, which in turn brings challenges to chip architecture design. In the field of chip design, the problem of chip performance has been overcome. In many edge design networks, the core of the design is to allow the chip to meet low power consumption requirements, thereby extending the use time of edge devices. This article conducts research on a low-power master chip architecture to enable it to meet the needs of edge computing networks and enhance product competitiveness. © Published under licence by IOP Publishing Ltd.

关键词： Edge computing

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design and simulation of Millimeter-Wave Magnetrons 3

Design and Simulation of Millimeter-Wave Magnetrons

引用

3rd IEEE Ukraine conference on Electrical and Computer Engineering, UKRCON 2021

作者： Kopot, Mykhailo Kobzev, Igor Chetverykov, Grigorij Gritsunov, Alexander Bilotserkivska, Anzhela Kharkiv National University of Radio Electronics Department of Software Engineering Kharkiv Ukraine V.N.Karazin Kharkiv National University Department of Information Technologies and Control System Kharkiv Ukraine Kharkiv National University of Radio Electronics Department of Microelectronics Electronic Devices and Appliances Kharkiv Ukraine

ISBN: (纸本)9781665400947

Specific features and problems of the design of millimeter-wave magnetrons are described. Cold secondary-emission cathode usage is considered as a promising factor for the device life prolongation. Field-emission cathodes instead of thermionic ones are proposed as the trigger units for further increase of the magnetron working life. The problems of ensuring enough frequency separation between the operating eigenmode and neighboring modes are discussed;using the rising-sun delay system and operating on spatial harmonics are proposed as possible solutions. The methods of providing enough emitting current from cathodes without their fast burnout are considered;the solution of the problem could lie in using inverted design of the magnetron. Examples of 'cold' (electrodynamic) calculations of the delay systems of millimeter-wave magnetrons are given. 'Hot' (electronic) simulations with PIC algorithms have been performed using TULIPgm code for magnetron and amplitron modeling. © 2021 IEEE.

关键词： Millimeter waves

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A Study of the States Kinetics in NBTI and HCI Degradation based on TCAD

A Study of the States Kinetics in NBTI and HCI Degradation b...

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Electronics and Electrical Engineering Technology (EEET), International conference on

作者： Xinhuan Yang Mingyan Yu Xingyu Fang Liang Wang Chuanzheng Wang Yuanfu Zhao School of Electronic Information Hangzhou Dianzi University Hangzhou China Beijing Microelectronics Technology Institute Beijing Chinia

ISBN: (数字)9798350395594

ISBN: (纸本)9798350395600

The evaluation of MOSFET reliability requires aging model, which based on time-consuming and costly aging test. In order to reduce the costs of aging test, the parameters of trap (TP) and two-stage (TS) degradation models in TCAD framework were calibrated according to the data of aging test in this paper. Then the impact of parameters on the number of interface trap during degradation in PMOS were studied by using the two models. The results show that the calibrated model can basically replace the aging test and evaluate the lifetime of device. Finally, this paper proposed a decoupling method of hot carrier injection (HCI) and negative bias temperature instability (NBTI) by studying the relationship between the two effects and channel length. The purpose of this paper is to analyze the characteristic of aging effect through TCAD simulation and obtain the data establishing aging model. It provides convenience to the design of high-reliability device.

关键词： Degradation Negative bias temperature instability Semiconductor device modeling Costs Thermal variables control Voltage Aging

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An ANN-Physical Hybrid GaN HEMT Model for 5G Power Amplifiers

An ANN-Physical Hybrid GaN HEMT Model for 5G Power Amplifier...

引用

IEEE Asia-Pacific conference on Circuits and Systems

作者： Zhongzhiguang Lu Hanchao Li Yihao Zhuang Hanlin Xie Geok Ing Ng Yuanjin Zheng School of Electrical and Electronic Engineering Nanyang Technological University Singapore Agency for Science Technology and Research (A*STAR) Institute of Microelectronics (IME) Singapore

ISBN: (数字)9798350378771

ISBN: (纸本)9798350378788

Compared to other semiconductor technologies, GaN power amplifiers (PAs) demonstrate better efficiency, gain and thermal performance, which makes them very promising in the present 5G era. To design 5G GaN PAs, accurate and scalable GaN HEMT device modelling is very necessary. This paper proposes a hybrid physical GaN HEMTs model for 5G power amplifiers. Combine the concept of ASM-GaN-HEMT model and ANN technique, the simulation results of the proposed model in this paper are highly consistent with the test results in terms of the DC and RF characteristics. Multi-Objective Particle Swarm Optimization (MOPSO) is employed to derive the accurate surface potential values, which are the key parameters in ASM-GaN-HEMT. With the dimension information in the target equations, the derived GaN model will have certain scalability in device size. Also, artificial neural network (ANN) technique is utilized to build charge and nonlinear current models with the surface potential values. Effective self-heating and trapping effect models are introduced to demonstrate nonlinear effects. The proposed method significantly improves the accuracy of the S parameter compared to traditional models, reducing the large signal performance error to within 5%.

关键词： Performance evaluation Accuracy 5G mobile communication Scalability Power amplifiers HEMTs Mathematical models Hybrid power systems Gallium nitride Integrated circuit modeling

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Enhancing Quantum NLP Robustness - Analysis on Noisy Models for Quantum Sentiment Classification

Enhancing Quantum NLP Robustness - Analysis on Noisy Models ...

引用

International conference of Advanced Informatics: Concept, Theory and Application (ICAICTA)

作者： Fariska Zakhralativa Ruskanda Michael Jonathan Halim Farizki Kurniawan Infall Syafalni Rahmat Mulyawan Akio Higo School of Electrical Engineering and Informatics Bandung Institute of Technology Indonesia Artificial Intelligence Center Bandung Institute of Technology Bandung Indonesia University Center of Excellence on Microelectronics Bandung Institute of Technology Indonesia Systems Design Lab School of Engineering The University of Tokyo Tokyo Japan

ISBN: (数字)9798331520311

ISBN: (纸本)9798331520328

This research aims to improve the robustness of Quantum Natural Language Processing (QNLP) models in the presence of noise. Using Lambeq, an open-source library for quantum NLP, we focus on sentiment classification tasks to eval-uate the impact of noisy quantum models. Our study involves the application of three types of optimizers: Simultaneous Perturbation Stochastic Approximation (SPSA), Nelder-Mead, and Adam. The performance and resilience of these optimizers are assessed under various noise conditions to determine their effectiveness in maintaining model accuracy and stability. The research shows that the Adam optimizer outperforms SPSA and NelderMead in QNLP simple sentiment analysis tasks, both in noiseless and noisy environments. Adam achieved 96.67 % accuracy in noiseless conditions, significantly higher than SPSA's 83.33 % and Nelder-Mead's 53.33%, highlighting its superior performance in optimizing quantum circuits. Moreover, in noisy simulation, Adam outperforms others with 70.00% accuracy performance. The work is useful for NLP implementations in quantum computers. This research is essential because the noisy nature of current quan-tum computers makes it difficult for QNLP models to perform accurately and reliably.

关键词： Computers Sentiment analysis Accuracy Computational modeling Noise Quantum mechanics Stochastic processes Robustness Stability analysis Noise measurement

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Mechanical simulation and modeling for reliability of 6-in-1 power module

Mechanical simulation and modeling for reliability of 6-in-1...

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Electronic Components and Technology conference (ECTC)

作者： Rathin Mandal Kazunori Yamamoto Gongyue Tang Institute of Microelectronics A*STAR (Agency for Science Technology and Research) Singapore

numerical modeling and simulation of temperature cycling test (TCT) and power cycling test (PCT) are applied to the design reliability analysis for a proposed 6-in-1 power module (PM) package. The fatigue life for both 95Sn5Sb solder interconnect and sintered Ag die attach (DA) joints under TCT and PCT conditions are calculated and compared with a reference power module package which has already passed the reliability test. The Coffin-mansion life model ductility factor is calculated from the test data for the reference power module and applied to the analysis of the fatigue life for the PM. The reliability of solder interconnect is in the same level as the reference module which passed the 1000 cycles of TCT and 50000 cycles of PCT. Sintered Ag DA joint has a very high reliability life. The structural reliability of interconnect for the proposed PM could be further enhanced by using sintered Ag as both DA and interconnect materials. Effect of package parameters such as DA and copper clip thickness are also investigated in this study. The results provided important guidelines for the PM package design.

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