The parametric synthesis is one of the planning stages of infocommunication networks. Recent studies of network traffic properties have shown that models of self-similar processes (self-similar traffic) describe traff...
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The parametric synthesis is one of the planning stages of infocommunication networks. Recent studies of network traffic properties have shown that models of self-similar processes (self-similar traffic) describe traffic in networks more accurately. In this study, based on previously known studies of self-similar traffics, infocommunication network synthesis methods have been proposed. Using the proposed models and calculation expressions allow to solve the problems of parametric synthesis by the known characteristics of the input traffic flows. The solution method involves the distribution of traffic along the routes, determining the parameters of aggregated traffic in the communication channels, determining the bandwidth of the communication channels. The correctness of the results obtained by this method was verified using modeling by comparing them with estimated values, and also measured in segments of real networks. As a result of the simulation the reliability of the proposed method for determining the parameters of aggregated self-similar traffic and the method of parametric synthesis has been proven.
The current threshold elements of direct and reverse cyclic shift are developed. This logical elements are recommended as memory elements for the construction of relevant controllers and devices for tolerance control ...
The current threshold elements of direct and reverse cyclic shift are developed. This logical elements are recommended as memory elements for the construction of relevant controllers and devices for tolerance control of analog signals, which used in diagnosis of complex electronic equipment. The mathematical apparatus used in the design is a linear algebra. The basic equations and results of computer modeling of the developed cyclic shift schemes are presented. Computer simulation was carried out in the Cadence environment on models of field-effect transistors XB06.
A redundant double conversion (RDC) based digital background technique for successive approximation analogueto-digital converters (SAR ADCs) with convergence acceleration and assistance is presented. The convergence t...
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ISBN:
(纸本)9788363578145
A redundant double conversion (RDC) based digital background technique for successive approximation analogueto-digital converters (SAR ADCs) with convergence acceleration and assistance is presented. The convergence time of the RDC based calibration is reduced by monitoring the error between two raw conversion results of a sub-2 SAR ADC and increasing the step-size parameter of the least mean square (LMS) if the detected error is less than a threshold. The convergence assistance is accomplished by injecting a random perturbation signal to a stationary input. Behavioral simulation shows that the proposed technique reduces convergence time of the RDC calibration by 30% while maintains a comparable resolution and power consumption. With the random perturbation signal generated by a 5-bit digital-to-analog converter (DAC) RDC calibration can be started and an ENOB about 10 is obtainable.
This paper the analysis of a 3D model of MEMS Gyroscope is presented. The FEM analysis of the 3D structure has been performed in very popular COMSOL Multiphysit software. Authors took particular attention on mechanica...
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ISBN:
(纸本)9788363578145
This paper the analysis of a 3D model of MEMS Gyroscope is presented. The FEM analysis of the 3D structure has been performed in very popular COMSOL Multiphysit software. Authors took particular attention on mechanical behaviour particular parts of this device especially combs (used in electrostatical actuators and sensors) in drive and sense directions. For further electrostatic analysis (which is not covered in this article) this analysis has enormous meaning because any deformation of comb structure during operation influences on quality of electrostatic actuating and sensing. In this paper author performed stress results and deformation analysis in sense direction, however similar conclusions one can he drawn for drive direction.
A binary-weight hourglass network (B-HG) accelerator for landmark detection, built on the proposed look-up-table (LUT) based multi-level prediction-correction approach, is enabled for highspeed and energy-efficient pr...
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ISBN:
(纸本)9781728124261
A binary-weight hourglass network (B-HG) accelerator for landmark detection, built on the proposed look-up-table (LUT) based multi-level prediction-correction approach, is enabled for highspeed and energy-efficient processing on IoT edge devices. First, LUT with a unified mode is adopted to support convolutional neural network with fully variable weight bit precision to minimize operations of B-HG, which achieves 1.33×-1.50× speedup on multi-bit weight CNN relative to the similar solution. Second, multi-level prediction-correction model is proposed to achieve computationalefficient convolution with adaptive precision. The operations saved can be increase by about 30% than the two-stage model. Besides, nearly 77.4% of the operations in B-HG can be saved by using the combination of these two methods, yielding a 2.3× inference speedup. Third, block computing based pipeline is designed to improve the residual block deficiency in B-HG. It can not only reduce about 66.2% off-chip memory access than the baseline, but also save 60% and 31% on-chip memory space and access compared to the similar fused-layer accelerator. The proposed B-HG accelerator achieves 450 fps at 500MHz based on the simulation in TSMC 28 nm process. Meanwhile, the power efficiency is up to 8.5 TOPS/W, which is two orders of magnitude higher than the dedicated face landmark detection accelerator.
The single event transients (SETs) are a common source of malfunction in nano-scale CMOS integrated circuits. For this reason, evaluation of the SET effects and application of appropriate measures for their mitigation...
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ISBN:
(纸本)9781538625637
The single event transients (SETs) are a common source of malfunction in nano-scale CMOS integrated circuits. For this reason, evaluation of the SET effects and application of appropriate measures for their mitigation are fundamental tasks in the design of advanced radiation hardened integrated circuits. In general, SET analysis is based on the multi-scale modeling and simulation approach comprising four main phases: modeling and simulation of radiation-matter interactions, device-level modeling and simulation, circuit-level modeling and simulation and logic level modeling and simulation. In order to reduce the time and cost of the evaluation and design processes, a lot of effort is invested into the development of appropriate models which could provide accurate SET simulations at the circuit level. The circuit level simulations provide a good trade-off between the complexity and speed of simulations, and at the same time ensure very good accuracy. This paper reviews the approaches for modeling and simulation of SET effects at the circuit level, emphasizing the major advantages and disadvantages of each approach.
The ability of Through Crackstop Via (TCV) to prevent cracks from propagation is compared to conventional crackstop using a novel systematlc simulation methodology. The design of TCV is, then, optimized by varying the...
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ISBN:
(纸本)9781509043446
The ability of Through Crackstop Via (TCV) to prevent cracks from propagation is compared to conventional crackstop using a novel systematlc simulation methodology. The design of TCV is, then, optimized by varying the angle between the metal layers as well as the TCV width. The larger angle and Width result in a better TCV. The improvement in the TCV saturates at a specific TCV width.
In order to fully exploit the properties of diamond in electronic semiconductor applications, standard design and verification tools should be adopted, following the conventional TCAD design flow. However, diamond is ...
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ISBN:
(纸本)9781509065080
In order to fully exploit the properties of diamond in electronic semiconductor applications, standard design and verification tools should be adopted, following the conventional TCAD design flow. However, diamond is not included in the material's library of commercial TCAD simulation tools, due to the novelty of using this material in electronics. To this end the TCAD tools capabilities have been enhanced by developing an innovative numerical model for the simulations of advanced diamond devices conceived for particle detection in High-Energy Physics (HEP) experiments. This work focuses on the parameterization of the TCAD numerical model for polycrystalline diamond, on its validation against experimental data and on its application as a predictive tool for the electrical behavior of commercial polycrystalline diamond and Diamond-on-Iridium detectors.
We present an overview of neural network approaches for efficient modeling, simulation and optimization of high-frequency electronic and microwave circuits. Neural networks trained from electronic/microwave data are s...
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We present an overview of neural network approaches for efficient modeling, simulation and optimization of high-frequency electronic and microwave circuits. Neural networks trained from electronic/microwave data are subsequently used for circuit simulation and optimization. A brief introduction of the fundamentals of neural network structures and neural model development issues including data generation, and neural network training are summarized. Applications of neural networks for modeling, simulation and optimization of transmission line networks for interconnect analysis on printed circuit board design are illustrated.
Reliability considerations in multi-wafer, vacuum- packaged MEMS often require the usage of bonding pillars connecting the top and bottom capping wafers. Such bonding pillars in turn require the etching of holes into ...
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