This paper introduces a step forward towards memristor-MOS hybrid circuit to achieve any combinational function. The proposed design is based on reducing the area by replacing the complete pull-down network with just ...
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This paper introduces a step forward towards memristor-MOS hybrid circuit to achieve any combinational function. The proposed design is based on reducing the area by replacing the complete pull-down network with just one memristor and one comparator. The concept is then verified using an example of a simple function. Also, a proposed architecture for memristor based redundant multiplier circuit is introduced and verified using the SPICE simulation. Therefore, any redundant functions can be implemented using the same concept.
Electrical energy systems (EESs) represent a wide class of systems involving consumption, generation, distribution and storage of energy. Examples of such systems can be found at various scales, ranging from smart sys...
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Electrical energy systems (EESs) represent a wide class of systems involving consumption, generation, distribution and storage of energy. Examples of such systems can be found at various scales, ranging from smart systems-on-chip to smart grids. The conventional design methodology uses the model-based approach provided by commercial platforms such as Matlab/Simulink, and relying on built-in model libraries. This paper presents a modeling and simulation methodology for EESs based on the SystemC standard (and its Analog and Mixed-Signal extension SystemC-AMS). simulations show that the proposed approach provides accuracy comparable to Matlab/Simulink results, with higher modularity and an average speedup of 36x.
Green design features with ultra-low power consumption and ultra-low voltage supply. Considering on about 26 m V is the silicon power fed limit, below 100 mV level, two accurate ultra-compact I-V models for SMIC 0.18...
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ISBN:
(纸本)9781510806450
Green design features with ultra-low power consumption and ultra-low voltage supply. Considering on about 26 m V is the silicon power fed limit, below 100 mV level, two accurate ultra-compact I-V models for SMIC 0.18μm process Nand PMOS transistors will be extracted with which CMOS NOT gate and its amplifier are analyzed by comparing exponential power law and SPICE running tool. The modeling methodology on new device or circuit starts with a candidate for one region of features in a basic construction formulae set selected by mechanism standards, then compare the two classes of data resulted from in right side the input-output characteristic and in left side the respondings of your first to/or No.n candidate, to minimize the errors between the classes, doing in above steps in cycle, at last you met an apt of novel model group in state-of-theart kept in your mind. In general, the ultra-low subthrethod(5m V) MOSFETs are related to the input signals in parameters. From the single MOSFET to the two tubes we iterated from the simulation results to those models' grinded fruits in our computers, and focused on scanning the width length ratio. Our time-variant models are in form of e exponential term for NMOSFET and plus quadratic term for PMOSFET. All in all the works built up novel milestones for first author proposed brain health microelectronics(BHM).
This paper presents a behavioural model suitable for the simulation of low-power Sigma-Delta Modulators. Second-order effects affecting the settling behaviour of the switched-capacitor integrator was included, leading...
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This paper presents a behavioural model suitable for the simulation of low-power Sigma-Delta Modulators. Second-order effects affecting the settling behaviour of the switched-capacitor integrator was included, leading to improved accuracy. Due to the oversampling mode of the converter, transistor-level simulations are extremely time consuming. Accurate behavioural models are thus mandatory in the first design phase of the modulator, in particular when the involved analog blocks must be optimized for minimum power consumption at some converter resolution.
Technology and market evolutions in smart-systems call for a new design paradigm which is focused on the integration of the development processes in the various engineering disciplines through timely exchange of model...
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Technology and market evolutions in smart-systems call for a new design paradigm which is focused on the integration of the development processes in the various engineering disciplines through timely exchange of models, tuned to the specific needs of the different users. According to the vision of the SMAC consortium, these models should be generated automatically through appropriate abstraction flows. The present paper reviews the challenges related to the design of smart-systems and in particular multi-domain simulation and presents the solutions being experimented in the project.
To design effective and reliable probe heads, it is crucial to have a deep understanding of the thermo-electro-mechanical coupled behavior of these complex systems. This work aims to investigate the behavior of vertic...
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To design effective and reliable probe heads, it is crucial to have a deep understanding of the thermo-electro-mechanical coupled behavior of these complex systems. This work aims to investigate the behavior of vertical type microprobes for high-end wafer probing applications in high temperature/high current regimes, by adopting coupled thermo-electrical and structural numerical simulations. Probe electro-thermal heating, probe force degradation and current carrying capability are studied. The results obtained through the modelling framework introduced in this work are successfully compared to experimental data.
A non-typical approach to extended simulational analysis for rolling-shutter (switching power) binary readout pixel circuit is presented. Circuit solutions as well as simulation test results are presented and discusse...
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A non-typical approach to extended simulational analysis for rolling-shutter (switching power) binary readout pixel circuit is presented. Circuit solutions as well as simulation test results are presented and discussed. Previously undetected phenomenon is detected, its cause tracked down and the issue removed, solely by means of control signal sequence modifications, with no hardware modification required.
Today thermal issues are among the main bottlenecks of microelectronics and solid-state lighting. Mitigation to thermal problems of ICs is provided either by new, more efficient cooling technologies or by thermal awar...
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Today thermal issues are among the main bottlenecks of microelectronics and solid-state lighting. Mitigation to thermal problems of ICs is provided either by new, more efficient cooling technologies or by thermal aware design tools, including electro-thermal or logi-thermal simulation. In solid-state lighting the situation is somewhat similar: replacement of high-intensity discharge lamps is still hampered by cooling problems. In case of LEDs not only the thermal and electrical operation of the diode is to be modeled and simulated - the electro-thermal behavior also needs to be tightly coupled to modeling and simulation of the light output, hence, a real multi-domain characterization from measurements on component level to simulation on system level is required. This paper aims to provide an overview of measurement, modeling and simulation techniques in which the semiconductor devices are characterized in all of their relevant operating domains in a self-consistent way.
Porous Silicon Nanowires (PS-NWs) represent very promising electronic devices with a wide range of applications, all taking advantage of the irregular microscopic structure of PS. The strong variability of the electri...
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Porous Silicon Nanowires (PS-NWs) represent very promising electronic devices with a wide range of applications, all taking advantage of the irregular microscopic structure of PS. The strong variability of the electrical properties of the material with technological process makes computer simulation of PS-nanowires a cumbersome task. Here we present a simple model of PS-NWs which can be implemented for simulations in physics-based software TCAD Atlas thus giving a contribution to the investigation of the effects of the peculiar structure on the material resistivity. Extensive simulations have been performed on PS-Nws with microscopic characteristics deduced from our experimental fabricated devices. We investigated the dependence of current from applied voltage and channel doping also in relation with the electrical field inside the device and with the carriers' mobility. Finally we suggest an electrical model for PS-NWs easily implemented in commercial circuit simulators (Eldo in this case). It will allow to exploit the actual simulation tools also for the analysis and design of circuits where PS-based devices are present.
Analog circuit performance are degrading by effects like HCI and NBTI. These performance shifts need to be evaluated by the designer to meet given specifications. The evaluation on transistor level enables an accurate...
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Analog circuit performance are degrading by effects like HCI and NBTI. These performance shifts need to be evaluated by the designer to meet given specifications. The evaluation on transistor level enables an accurate prediction of degradation behavior for a chosen circuit. However, this task is very time-consuming for complex analog circuitry. This paper proposes the use of response surface modeling for age-dependent degradation. The generated model is used to extend analog behavioral descriptions and for an accelerated system level analysis. The proposed age-dependent degradation model is demonstrated on a common source amplifier and an analog frontend for the measurement of neural activities. simulation results demonstrate the accuracy and simulation acceleration of the proposed modeling method.
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