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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

共 1419 条记录，以下是581-590 订阅

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Microactuator modeling to develop a new template for the Braille

Microactuator modeling to develop a new template for the Bra...

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Thermal, Mechanical and Multiphysics simulation and Experiments in Micro-Electronics and Micro-Systems EuroSimE

作者： Sofiane Soulimane Med El Amine Brixi Nigassa Benyounes Bouazza Henri Camon CDTA Centre de Développement des Technologies Avancées Algies Algeria Biomedical Engineering and Electronic Department Tlemcen University 13000 Algeria Biomedical Engineering and Electronic Department Tlemcen University Algeria UPS Université de Toulouse Toulouse France

The results of this work are contributions to the modeling and design a original microactuator system that allows braille reading. Here, we propose to use one matrix composed by six actuators to form the 63 Braille combinations. To define the geometry of the matrix we used the physiological limits of perception.. In this work, we use a finite element model with the Comsol software for modelling this type of miniature actuator for integration into a test device. In order to lower the operating voltage of such systems, we focus our study on microsystem based piezoelectric material. We demonstrated that micro-actuators can exhibit non uniform compression. This deformation depends on thin films thickness and design of membrane arms.

关键词： Actuators Abstracts Gold Haptic interfaces Transducers Integrated optics Optical sensors

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Small signal performance of VES-BJT

Small signal performance of VES-BJT

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International conference on Mixed design of Integrated Circuits and Systems (MIXDES)

作者： Piotr Mierzwinski Institute of Microelectronics and Optoelectronics Warsaw University of Technology Warsaw Poland

VES-BJT is a novel bipolar device in VESTIC technology proposed by W. Maly. This paper extends previously published considerations about expected features of such a device. It contains important information about using earlier introduced definitions in context of calculating small signal parameters of VES-BJT i.e. an unit gain frequency and an unit power gain frequency. Theoretical considerations are illustrated with simulation results. Presented data and methodology are the basis for future development of complete compact model of VES-BJT. simulation and analytical results confirm the big potential of bipolar devices in VESTIC technology.

关键词： Transistors Capacitance Tin Analytical models Integrated circuit modeling Silicon simulation

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A behavior modeling method of integrated CMOS Hall element for circuit simulation

A behavior modeling method of integrated CMOS Hall element f...

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International conference on Solid-State and Integrated Circuit Technology

作者： Li Shao Ke Liu Renwei Zhang Zhankun Du Rongjiang Liu Xiaomin Pang Institute of Microelectronics The Chinese Academy of Sciences Beijing CHINA

ISBN: (纸本)9781479932849

A behavior modeling method for Hall element in standard CMOS technology is proposed in this work. Using equivalent parameters, the whole Hall device is represented by lumped circuit elements. The usually concerned factors including mismatch, temperature, stress, and geometry are taken into account in this model. Considering the convenience of integration with following readout and processing circuits, this modeling is set up by items that could be simulated together with other circuits in EDA environment.

关键词： Integrated circuit modeling Hardware design languages Abstracts Substrates

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Three dimemsional electro-thermal coupled Monte Carlo device simulation

Three dimemsional electro-thermal coupled Monte Carlo device...

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International conference on Solid-State and Integrated Circuit Technology

作者： Xiaoyan Liu Kangliang Wei Longxiang Yin Gang Du Hai Jiang Kai Zhao Lang Zeng Xing Zhang Institute of Microelectronics Peking University Beijing China

3D paralleled electro-thermal coupled full band ensemble MC simulation platform is developed for analysis of local heating effect on performance and reliability of semiconductor devices. This new developed simulation ... 详细信息

ISBN: (纸本)9781479932849

关键词： Heating Reliability Thermal conductivity Conductivity Logic gates Monte Carlo methods Solid modeling

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Analysis of RF-MEMS switches in failure mode: Towards a more robust design

Analysis of RF-MEMS switches in failure mode: Towards a more...

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Thermal, Mechanical and Multiphysics simulation and Experiments in Micro-Electronics and Micro-Systems EuroSimE

作者： Thomas Kuenzig Tatek Muschol Jacopo Iannacci Gabriele Schrag Gerhard Wachutka Institute for Physics of Electrotechnology Munich University of Technology Munich Germany Fondazione Bruno Kessler (FBK) Center for Materials and Microsystems (CMM) Trento Italy

We present comprehensive theoretical and experimental investigations on one of the most relevant failure mechanisms in RF-MEMS switches, namely electrically induced stiction. In particular, we analyze an RF-MEMS switch equipped with an embedded active thermal recovery appliance by deriving and applying a 3D, problem-adapted, coupled finite element (FE) model including all relevant mechanical, electrical, thermal, and fluidic effects. The accuracy and predictive power of the simulations is ensured by a dedicated calibration procedure based on highly accurate characterization techniques such as white light interferometry and laser Doppler vibrometry. Applying the calibrated model, we studied the switch operation during failure and recovery in all details and identified the most important design parameters affecting its reliability with a view to improving the recovery capability as well as optimizing the overall performance towards a more robust switch design.

关键词： Welding Abstracts Switches Solid modeling Three-dimensional displays Thermal force Deformable models

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Hardware design and Implementation of SM3 Hash Algorithm for Financial IC Card

Hardware Design and Implementation of SM3 Hash Algorithm for...

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International conference on Computational Intelligence and Security

作者： Ye Hu Liji Wu An Wang Beibei Wang Institute of Microelectronics Tsinghua University Beijing China

ISBN: (纸本)9781479974351

This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.

关键词： Hardware Registers Integrated circuit modeling Logic gates Algorithm design and analysis Standards

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A quantitative approach to testing in Quantum dot Cellular Automata: NanoMagnet Logic case

A quantitative approach to testing in Quantum dot Cellular A...

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Ph.D. Research in microelectronics and Electronics (PRIME)

作者： Giovanna Turvani Fabrizio Riente Mariagrazia Graziano Maurizio Zamboni Electronics and Telecommunications Department Politecnico di Torino Italy

With the approaching of CMOS scaling limits the interest on emerging technologies is rapidly growing. Among emerging technologies, Quantum dot Cellular Automata (QCA) is one of the most studied. Particularly the magnetic implementation, NanoMagnet Logic (NML), offers very low power consumption and it combines logic and memory on a unique device. Despite the advantages of these technologies, QCA and NML working principle relies on the electric or magnetic interaction among neighbor cells, so it is very sensitive to process variations. The behavior of circuits is therefore largely affected by defects and fabrication variations. To effectively design circuits with these technologies, proper tools for testing circuits are necessary. In this work we present an innovative test environment for NML technology. The test algorithm is integrated in ToPoliNano, our design and simulation tool for emerging technologies, and it is specifically tailored to support the analysis of faults in large complexity circuits. Thanks to this tool it is possible to design and test complex NML circuits considering the effect of process variations in terms of Yield and Output Error Rate. The approach gives then feedback to the technologists, remarkably helping the future development of this technology. Moreover, notwithstanding the methodology is applied here to NML circuits only, it can also be successfully applied to QCA technology in general, greatly enhancing the value of the work we proposed here.

关键词： Magnetic circuits Clocks Integrated circuit modeling Circuit faults Magnetic domains Solid modeling Algorithm design and analysis

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Structure design and reliability assessment of double-sided with double-chip stacking packaging

Structure design and reliability assessment of double-sided ...

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Thermal, Mechanical and Multiphysics simulation and Experiments in Micro-Electronics and Micro-Systems EuroSimE

作者： Yen-Fu Su Chun-Te Lin Tzu-Ying Kuo Kuo-Ning Chiang Dept. of Power Mechanical Engineering National Tsing Hua University Hsinchu Taiwan 300 R.O.C. Electronic and Optoelectronics Research Labs Industrial Technology Research Institute (ITRI)

Recently, consumer electronics demand has been geared towards lightweight, high efficiency, and small form factor devices. These characteristics can be accomplished by using three-dimensional (3D) integrated circuit (IC) technology. This study proposes a double-chip stacking structure in an embedded fan-out wafer level packaging (WLP) with double-sided interconnections. Regarding to the proposed structure, the finite element (FE) model is established to investigate the actual thermo-mechanical behavior during thermal cycling loading. The suitable geometry design of buffer layer and carrier can enhance the reliability of solder joint. The application of soft filler and passivation materials can increase the predicted fatigue life to more than 2,500 cycles. However, the high coefficient of thermal expansion (CTE) of soft filler material will induce significant deformation and excessive strain on the trace layer. Based on the above simulation methodology and life prediction model, the development of the proposed structure can be optimized within a feasible time. This effective methodology is necessary in the electronic packaging industry to reduce time-to-market and fabrication cost when a new packaging structure is being developed.

关键词： Abstracts Encapsulation Computational modeling Load modeling Silicon

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Investigation of retention behavior for 3D charge trapping NAND flash memory by 2D self-consistent simulation

Investigation of retention behavior for 3D charge trapping N...

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International conference on simulation of Semiconductor Processes and Devices (SISPAD)

作者： Zhiyuan Lun Shuhuan Liu Yuan He Yi Hou Kai Zhao Gang Du Xiaoyan Liu Yi Wang Institute of Microelectronics Peking University Beijing China

This paper presents a comprehensive investigation on retention behavior for three-dimensional charge trapping NAND flash memory by two-dimensional self-consistent simulation. Major physical mechanisms, including tunneling, charge trapping and de-trapping process as well as drift-diffusion have been incorporated into the simulator. The developed simulator is able to describe the charge transport along the bitline and in vertical direction in the memory structure. This work aims to help to design and optimize three-dimensional stackable CT-NAND architectures.

关键词： Electron traps Flash memories Tunneling Three-dimensional displays Logic gates Solid modeling

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Image container storage format for applications in echocardiography simulation

Image container storage format for applications in echocardi...

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International conference on Mixed design of Integrated Circuits and Systems (MIXDES)

作者： Maciej Borzęcki Bartosz Balcerzak Marek Kamiński Andrzej Napieralski Department of Microelectronics and Computer Science Łódź University of Technology Łódź Poland

The authors discuss a method for storage of medical imaging data in a format that is suitable for applications requiring low-latency access as well performing processing in a resource constrained environment. In particular, a Echocar-diography simulator is considered in the context of a web or a mobile application. The objectives are to allow the simulation input data to be accessed from network at run time, as well as convey information on the regions within the image that the simulation algorithm needs to process. The proposed format stores information (both data and geometrical properties) on sub-regions, while omitting the rest of the source image. Region definitions allow for reconstruction the original image at run time reusing already present platform interfaces and libraries. At the same time they clearly delineate the areas that will be processed by the simulation step, effectively limiting the actual processing only to the regions that are relevant to the application. The authors discuss the results of utilizing the proposed storage method on a set of angio-CT samples.

关键词： Indexes Containers Computational modeling DICOM Computed tomography Training

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