Portable battery-powered applications are heavily affected by the growing variety of provided functionalities. As the applications get more and more powerful, optimization of power-management-related issues is of grea...
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ISBN:
(纸本)9783800734429
Portable battery-powered applications are heavily affected by the growing variety of provided functionalities. As the applications get more and more powerful, optimization of power-management-related issues is of great importance. The reliable knowledge of cell parameters like its state of charge (SoC), state of health (SoH) or its internal impedance is essential for the optimization. Internal cell parameters show significant variations over a battery’s operational lifetime. Especially at the late stage of a battery’s cycle lifetime, parameter changes are of particular interest. To reproduce the battery behavior during a cell’s whole duration of life, dedicated simulation models are required. In this paper, an equivalent-circuit-based battery model is implemented by using the SystemC-AMS hardware description language. This innovative implementation is compared to both, a continuous- and a discrete-time MATLAB/Simulink realization of the considered model. The validation is done with respect to the reached accuracy and the required total simulation time. The presented methodology reduces the total simulation time by at least 18.6% in the considered cases.
Within the framework of Keldysh impact ionization model the calculation of effective threshold energy for silicon MOSFET with 100 nm channel length by means of ensemble Monte-Carlo simulation is performed. The possibi...
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Within the framework of Keldysh impact ionization model the calculation of effective threshold energy for silicon MOSFET with 100 nm channel length by means of ensemble Monte-Carlo simulation is performed. The possibility of impact ionization rate treatment with one-parameter Keldysh model in pre-breakdown and breakdown transistor operation mode using calculated effective threshold energy value is proposed.
In this paper, a DC/DC power converter devoted to electrical motor drive in motorbike racing application is designed and simulated in MATLAB Simulink environment, along with its control logic strategy. In particular, ...
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In this paper, a DC/DC power converter devoted to electrical motor drive in motorbike racing application is designed and simulated in MATLAB Simulink environment, along with its control logic strategy. In particular, we conceived, developed and simulated a thermal control strategy, to be implemented as the logic core of the power converter, which dynamically and automatically fits the electric power fed to motor, depending on its actual temperature. As a result, motor burnout during the race is avoided, improving the power train reliability without affecting the racing performance. simulation results, in which the whole power train system was modeled in Simulink, confirmed the proposed algorithm effectiveness.
This paper reports the design optimization of lateral nanoelectromechanical (NEM) relays for sub 1V actuation by COMSOL simulation with various materials and structures. Measured actuation voltages from fabricated rel...
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This paper reports the design optimization of lateral nanoelectromechanical (NEM) relays for sub 1V actuation by COMSOL simulation with various materials and structures. Measured actuation voltages from fabricated relays showed good matching with simulation.
In this paper we propose a novel design of a low power static random access memory (SRAM) cell for high speed operations. The model adopts the voltage mode method for reducing the voltage swing during the write operat...
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ISBN:
(纸本)9781467350655
In this paper we propose a novel design of a low power static random access memory (SRAM) cell for high speed operations. The model adopts the voltage mode method for reducing the voltage swing during the write operation switching activity. Dynamic power dissipation increases when the operating frequency of the SRAM cell increases. In the proposed design we use two voltage sources connected with the Bit line and Bit bar line for reducing the voltage swing during the write “0” or write “1” operation. We use 90 nm CMOS technology with 1 volt of power supply. simulation is done in Microwind 3.1 by using BSim4 model. Dynamic power for different frequencies is calculated. We compare it with conventional 6-T SRAM cell. The simulation results show that the power dissipation is almost constant even the frequency of the proposed SRAM model increases. This justifies the reduction of the dynamic power dissipation for high frequency CMOS VLSI design.
This paper presents the state space modeling approach of DC-DC Buck converter. The main aim of this work is, by considering the buck converter system of Ericsson BMR450 with the PID, Polynomial and PD controllers at f...
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This paper presents the state space modeling approach of DC-DC Buck converter. The main aim of this work is, by considering the buck converter system of Ericsson BMR450 with the PID, Polynomial and PD controllers at feedback loop, thus running a MATLAB file with an appropriate simu-link block diagram, and comparing the three controller's performance by verifying their appropriate output graphs. The third order controller design is complicated and slow in response. The second order design is simple and gives better responses than third order Polynomial, PID and PD controllers.
A new topology of CMOS floating and ground passive coil simulation are proposed in this work. The proposed active circuits are realized using the second-generation current conveyor integrator (CCII-Int). The ground co...
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A new topology of CMOS floating and ground passive coil simulation are proposed in this work. The proposed active circuits are realized using the second-generation current conveyor integrator (CCII-Int). The ground coil is modeled only using one current mode integrator. Moreover, the floating inductor is simulated by two current-mode integrators. The proposed inductor circuits are considered as low voltage and low power (LVLP) since it's used CMOS inverter as class AB transconductance circuit. The high input impedance of the CMOS inverter simplifies the op-amp design since it's loaded only by capacitive load. An LC passive butter worth filter is designed and realized using the proposed circuits. The proposed circuit is designed using the MOST parameters of the IBM 0.13μ CMOS technology.
Renewable Energy sources are the center of attraction for research and development all over the world nowadays, the demand of a lasting cheap source of energy that is environmental friendly, is the main challenge rece...
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Renewable Energy sources are the center of attraction for research and development all over the world nowadays, the demand of a lasting cheap source of energy that is environmental friendly, is the main challenge recently. Energy Harvesting is a new technology that is going to make a revolution in the coming decade. Energy Harvesting is a technique to provide alternative sources of energy that are environmental friendly and low in cost. Radio Frequency Energy Harvesting is one of the methods to provide electrical energy from the ambient Radio Frequency waves that already exists in the environment. Radio Frequency Energy Harvesting can provide a world with battery less devices. With Radio Frequency (RF) Energy Harvesting, the true mobility can be achieved where mobile devices do not depend on centralized power sources for charging, instead they make use of the existing energy in the environment. This paper presents a simulation survey on different frequencies and the effect of these frequencies on the output power efficiency. The simulation results provide an optimum novel relationship between the frequency used and the size of the circuit for a radio frequency energy harvesting model with optimum output efficiency.
This paper presents a 35μW SAW oscillator operating at 843MHz. The low power consumption is achieved through the co-design of SAW resonator and oscillator circuit with the aid of an accurate equivalent circuit model ...
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This paper presents a 35μW SAW oscillator operating at 843MHz. The low power consumption is achieved through the co-design of SAW resonator and oscillator circuit with the aid of an accurate equivalent circuit model of SAW resonator. The equivalent circuit model of SAW resonator is improved from idealized lumped circuit model by accurate extraction and derivation of design parameters from FEM simulation in ANSYS. The simulated phase noise is -139.8dBc/Hz at 100KHz offset.
The small-signal analysis of an oscillator relative to a periodic steady-state (PSS) would generate periodic time-varying characteristic poles. Analyzing periodic root-loci can provide useful design information, which...
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The small-signal analysis of an oscillator relative to a periodic steady-state (PSS) would generate periodic time-varying characteristic poles. Analyzing periodic root-loci can provide useful design information, which is not available from the existing circuit simulation tools. Although the numerical QZ algorithm can be used to generate periodic root-loci, this paper proposes an alternative symbolic computation method for repeated pole computation. It is demonstrated that the Muller algorithm can be used for finding the dominant periodic roots of a characteristic polynomial with periodic coefficients, whose efficiency is superior to the matrix-based numerical QZ method. Other advantages of symbolic root-locus analysis also are explored by applying the proposed method to the analysis of two oscillator circuits.
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