Silicon carbide (SiC) has proved to be a promising material for the development of high temperature and high power applications because of excellent thermal and physical properties. In this study, 2D numerical simulat...
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Today high speed signal transmission system for on chip global interconnect requires elaborate design of the transceiver. The design goal of transceiver is to ensure the transmission obtains an improvement in latency ...
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Laser forming is a technique consisting in the design and the construction of complex metallic work pieces with special shapes difficult to achieve with the conventional techniques. By using lasers, the main advantage...
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ISBN:
(纸本)9783037851074
Laser forming is a technique consisting in the design and the construction of complex metallic work pieces with special shapes difficult to achieve with the conventional techniques. By using lasers, the main advantage of the process is that it is contactless and does not require any external force. It offers also more flexibility for a lower price. This kind of processing interests the industries that use the stamping or other costly ways for prototypes such as in the aero-spatial, automotive, naval and microelectronics industries. The analytical modeling of laser forming process is often complex or impossible to achieve, since the dimensions and the mechanical properties change with the time and in the space. Therefore, the numerical approach is more suitable for laser forming modeling. Our numerical study is divided into two models, the first one is a purely thermal treatment which allows the determination of the temperature field produced by a laser pass, and the second one consists in the thermo-mechanical coupling treatment. The temperature field resulting from the first stage is used to calculate the stress field, the deformations and the bending angle of the plate.
In this paper several full-wave numerical tools were investigated in order to compare electromagnetic (EM) modeling quality, design and testing time of slot rhombic antenna (SRA). Possible mutual differences of the si...
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In this paper several full-wave numerical tools were investigated in order to compare electromagnetic (EM) modeling quality, design and testing time of slot rhombic antenna (SRA). Possible mutual differences of the simulations analized and in order to validate results SRA was fabricated and measured.
Parameterized wide-band geometry dependent SPICE models for on-chip planar spiral inductors are developed in the paper. Model descriptions are presented in the form of PSpice model and in schematic view. The models ar...
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Parameterized wide-band geometry dependent SPICE models for on-chip planar spiral inductors are developed in the paper. Model descriptions are presented in the form of PSpice model and in schematic view. The models are realized in the Cadence Capture and Cadence PSpice environment. The developed computer models can be used for adequate computer modeling and simulation of RF circuits. The geometry dependence of the model parameters allows geometry optimization and design automation of spiral inductors. The simulation results are compared to the measurement data for the model verification demonstrating the validity of the computer models.
A simulation model for the analysis of MEMS capacitor has been developed using mechanical equivalencies. The capacitor structure used in this paper has four parallel plates to improve the tuning range. Two of the plat...
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A simulation model for the analysis of MEMS capacitor has been developed using mechanical equivalencies. The capacitor structure used in this paper has four parallel plates to improve the tuning range. Two of the plates are suspended and the other two plates are fixed. The developed mechanical model is validated with the help of structure simulations performed using PolyMumps process. The simulation results show good correlation between the equivalent mechanical model and the structural model.
A 1.2V 10bit 83MS/s pipeline ADC implemented in 130nm CMOS Technology is described with practical design techniques and considerations. Emphasis was placed on noise analysis and capacitance optimization, which helps t...
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A 1.2V 10bit 83MS/s pipeline ADC implemented in 130nm CMOS Technology is described with practical design techniques and considerations. Emphasis was placed on noise analysis and capacitance optimization, which helps to reduce both die area and power consumption. design experiences of operational amplifier, comparator and switches were also shared. This design achieves INL and DNL of +0.65/-0.53LSB and +0.33/-0.33LSB respectively, while SNDR is 57.7dB.
In this work, the reliability of a pyramidal shape 3-layer stacked TSV die package has been studied by experiments and finite element analysis (FEA). The originally designed microbumps are located peripherally around ...
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In this work, the reliability of a pyramidal shape 3-layer stacked TSV die package has been studied by experiments and finite element analysis (FEA). The originally designed microbumps are located peripherally around the edge of the die, which induces a concentrated bending force on the lower die when stacking the upper die. FEA simulation results show that such bump design induces large stress and deflection in the lower die during die stacking process. In this work, 3-point bend tests are conducted to determine the die strength. Actual die stacking experiments have been carried out and the results show that the bottom die cracks when stacking the middle die, and the bottom die cracks when stacking the top die even using a lower stacking force. Consistent results are achieved among FEA simulation, die strength bend test, and actual die stack experimental results. A new bump layout design has been optimized with some dummy bumps added on the central area of the die to directly support bending force induced by die stacking. The new design significantly reduces die stress and deflection. Eventually, a successful die stacking process is achieved even using a larger stacking force. The optimal bump layout design also leads to a lower package warpage in solder reflow process compared to the original bump layout design.
Issue represent the mathematical model of thermal processes in piecewise homogeneous structure with the heating inclusion, which is an construction element of design High Power Light Emitting Diodes (LED's). Solut...
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Issue represent the mathematical model of thermal processes in piecewise homogeneous structure with the heating inclusion, which is an construction element of design High Power Light Emitting Diodes (LED's). Solution of model problem founding by analytical method, which ensures the accuracy of this interpretation. Having obtained the temperature distribution for this element thermal resistance obtained by the principle of electro-thermal simulation. Considered LED's electro-thermal scheme and show that one of its basic elements - heat resistance between the p-n junction and substrate is submitted to the proposed model.
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