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检索条件"任意字段=Conference on Design, Modeling, and Simulation in Microelectronics"

共 1419 条记录，以下是801-810 订阅

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Multiple-choice Hardware/Software Partitioning:Computing Model and Algorithms

Multiple-choice Hardware/Software Partitioning:Computing Mod...

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2010 2nd International conference on Computer Engineering and Technology(2010年第二届计算机工程与技术国际会议 ICCET 2010)

作者： Wu Jigang Qiqiang Sun Thambipillai Srikanthan School of Computer Science and Software Tianjin Polytechnic UniversityChina300160 School of Comput School of Software and Microelectronics Peking UniversityBeijingChina 102600 School of Computing Engineering Nanyang Technological UniversityRepublic of Singapore639798

ISBN: (纸本)9781424463473

Hardware/software (HW/SW) partitioning is one of the crucial steps of co-design systems. It determines which components of the system are implemented in hardware and which ones are in software. As hardware of larger area may provide higher implementing speed for a give component due to the parallelizable execution in hardware,one component may have different ways of hardware implementations. In this paper the computing model is proposed to cater for the multiplechoice HW/SW partitioning. On the new computing model an *** heuristic algorithm is developed,in which both speedup in hardware and communication penalty are taken into account. In addition,an exact algorithm is also presented based on dynamic programming to evaluate the approximate solutions produced by the heuristic algorithm for relatively small problems. simulation results show that the heuristic algorithm runs fast and is able to produce high-quality approximate solutions. The difference between the approximate solutions and the optimal ones is bounded by 0.5％,and it hardly increases with the increase in the problem size.

关键词： Hardware Partitioning algorithms Software algorithms Heuristic algorithms Software performance Dynamic programming Computational modeling Computer science Genetic engineering microelectronics

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Challenges in MEMS parametric macro-modeling based on mode superposition technique

Challenges in MEMS parametric macro-modeling based on mode s...

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2009 10th International conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems, EuroSimE 2009

作者： Kolchuzhin, Vladimir Dotzel, Wolfram Mehner, Jan Chemnitz University of Technology Department of Microsystems and Precision Engineering Reichenhainer Strasse 70 09126 Chemnitz Germany

ISBN: (纸本)9781424441617

Computational approaches, opportunities and challenges in reduced order modelling based on mode superposition method of the coupled electrostatic structural domains, including effective model generation and geometrical parameterization, as well as physical and system design of MEMS component are presented and discussed. ©2009 IEEE.

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modeling, simulation and calibration of the chip encapsulation molding process

Modeling, simulation and calibration of the chip encapsulati...

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2009 10th International conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems, EuroSimE 2009

作者： Roellig, Mike Meyer, Sebastian Thiele, Michael Rzepka, Sven Wolter, Klaus-Juergen Dresden Germany Technische Universitaet Dresden 4 AT Dresden Germany Qimonda Dresden GmbH and Co. OHG Dresden Germany

ISBN: (纸本)9781424441617

The transient process of filling the mold cavity in microelectronics packaging has been simulated applying the finite element method (FEM). The results have been compared to those of so-called 'short shot' experiments, in which the molding process is interrupted at predefined points in time. After determining the quantitative discrepancies between the simulation and the experimental results, conventional model calibration was performed covering the full dimensional, material, and load parameter space, in which the actual test conditions could have deviated from the target values considered in the first simulation run. This way, parameter deviations could be ruled out as main reason as most of the simulation inaccuracy persisted. Instead, a subsequent investigation revealed the following additional effects having caused the discrepancies: the effect of cavity vacuum, the systematic concentration of filler particles on top of the dies, the gas bubbles formed at the mold front by the chemical reactions, and the coasting flow of mold material after process interruption. Accounting for these effects as well, the simulation accuracy was improved substantially. It now allows the virtual design optimization of the microelectronics packages and the molding tool as well as that of process conditions and material selection prior to experimental tests boosting both, manufacturing efficiency and product reliability. ©2009 IEEE.

关键词： Finite element method

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Two-dimensional Computer modeling of Single Junction a-Si:H Solar Cells

Two-dimensional Computer Modeling of Single Junction a-Si:H ...

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34th IEEE Photovoltaic Specialists conference

作者： Lee, Changwoo Efstathiadis, Harry Reynolds, James E. Halder, Pradeep SUNY Albany Coll Nanoscale Sci & Engn Energy & Environm Applicat Ctr E2TAC Albany NY 12222 USA

ISBN: (纸本)9781424429493

A two dimensional physically-based computer simulation of single junction pin amorphous silicon solar cells is presented using Sentaurus, Technology Computer-Aided design (TCAD). The simulation program solves the Poisson, the continuity, and the current density equations by using a standard procedure for amorphous materials, including the continuous density of state model, Shockley-Read-Hall and Auger recombination mechanisms, and computes the generation function of electron-hole pairs from the optical parameters of each layer. The dependence of these optical parameters with the photon energy has been included, taking into account the doping level, thickness of each layer and their effect on cell efficiency. The simulator is applied to the analysis of a p-in single junction a-SiC:H/a-Si:H/a-Si:H solar cell, obtaining results comparable to one dimensional simulation results using AMPS (analysis of microelectronic and photonic structure)-1D. More advanced simulation models for novel solar cell devices such as tandem cells are in progress, with the aim of achieving an optimal design of solar cells based on amorphous materials or micro-/nanocrystalline layers.

关键词： microelectronics

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Aspect-based ABV for SystemC transaction level models

Aspect-based ABV for SystemC transaction level models

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21th International conference on microelectronics, ICM 2009

作者： Kallel, Meriam Lahbib, Younes Tourki, Rached Baganne, Adel Faculty of Sciences of Monastir 5019 Tunisia University of South Brittany BP 92116-56321 Lorient France UBS University Lab-STICC CNRS Laboratory Canada Electronics and Microelectronics Lab. Faculty of Sciences of Monastir Tunisia

ISBN: (纸本)9781424458165

Transaction level modeling (TLM) is increasingly being adopted to describe hardware designs at high abstraction levels. This paper proposes a framework that targets the assertion-based verification (ABV) of SystemC transaction level models during simulation. Aspect-oriented (AO) mechanisms are exploited to write temporal properties that fit TLM requirements. No modifications are needed in the design's SystemC code. Functional as well as performance properties are addressed. We demonstrate the effectiveness of our approach on TLM 2.0 standard compliant models. ©2009 IEEE.

关键词： Aspect oriented programming

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Several modeling issues in LED, 3D-SiP, and nano interconnects

Several modeling issues in LED, 3D-SiP, and nano interconnec...

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2009 10th International conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems, EuroSimE 2009

作者： Liu, Sheng Wang, Kai Gan, Zhiyin Luo, Xiaobing Song, Xiaohui Chen, Zhaohui Liu, Zongyuan Yan, Han Wei, Wei Wang, Pei School of Mechanical Science and Engineering Huazhong University of Science and Technology Wuhan 430074 China Division of MOEMS Wuhan National Laboratory for Optoelectronics Wuhan 430074 China School of Optoelectronics Science and Engineering Huazhong University of Science and Technology Wuhan 430074 China School of Energy and Power Engineering Huazhong University of Science and Technology Wuhan 430074 China Department of Electronic Science and Technology Huazhong University of Science and Technology Wuhan 430074 China Research Institute of Micro/Nano Science and Technology Shanghai Jiaotong University Shanghai 200240 China

ISBN: (纸本)9781424441617

Multi-physics multi-scale modeling issues in various stages of the LED manufacturing, 3D-SiP, and nano interconnects have been discussed. Molecular dynamics (MD) and finite element method (FEM) have been used to study the scale effect of the material properties and the prediction of the module behaviors which are critical to LED fabrication. We propose a new concept to integrate multi-physics/multi-scale modeling as a simulation platform to assist LED design and fabrication. For 3D-SIP, nonlinear thermal stresses and strains at the interfaces between copper/dielectric layer and dielectric layer/silicon of copper filled and polymer filled through silicon via have been studied by finite element simulation. The effects of different configurations including different diameters of copper via and polymer filled, aspect ratios (the thickness of silicon vs. the diameter of copper via) and different thickness of the dielectric layer on the stresses and strains state were analyzed. For nano interconnects, classic molecular dynamics are used to modeling the process of carbon nanotube bonding onto the metal electrodes, both local heating and wetting process are modeled. It is indicated that the simulation that relies on multi-physics/multiscale modeling has the potential to significantly reduce development costs and optimize the fabrication processes of LED, SIP and nano interconnects. ©2009 IEEE.

关键词： Light emitting diodes

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Reliability modeling on a MOSFET power package based on embedded die technology

Reliability modeling on a MOSFET power package based on embe...

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2009 10th International conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems, EuroSimE 2009

作者： Yang, Daoguo Kengen, Martien Peels, W.G.M. Heyes, David Driel, W.D.Van Operations Back-End Innovation NXP Semiconductors Nijmegen Netherlands IS and O CSC-Innovation NXP Semiconductors Nijmegen Netherlands BL Power Management NXP Semiconductors Netherlands

ISBN: (纸本)9781424441617

Embedding of discrete semiconductors intosubstrates has the advantages of achieving high degreeof miniaturization, good electrical performance and possible low cost. A MOSFET power package based on the embedded die technology was developed and the demonstrators were built. To reduce cost and timeto-market, thermo-mechanical virtual prototyping is applied to support the package development. 2D and3D parametric FE models were established to conduct numerical simulations to investigate the thermomechanical reliability performance under packaging processes and test conditions. The package design and material variations, such as the thicknesses of the Culayer and the resin in the RCC foil, the Bond Line Thickness (BL T), the thickness and material propertiesof prepreg, via dimensions and via-filling, etc., were included in the parametric models. The root cause for die cracking, delamination between the interface die/RCC foil, and cracking of Cu vias were analyzed based on the simulation results. Verification of the modeling results was conducted through comparison with the test results. The results indicate that the prediction from the FE modeling matches reasonably well with the test results. ©2009 IEEE.

关键词： Dies

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Mixed-mode simulation of single event upsets in modern SiGe BiCMOS mixed-signal circuits

Mixed-mode simulation of single event upsets in modern SiGe ...

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16th International conference on Mixed design of Integrated Circuits and Systems, MIXDES 2009

作者： Turowski, Marek Raman, Ashok Fedoseyev, Alex Huntsville AL United States

ISBN: (纸本)9788392875604

The latest enhancements to CFDRC NanoTCAD mixed-mode simulator, combining 3D physics-based device models and advanced circuit compact models (VBIC, Mextram) for advanced bipolar devices, as well as unique mixed-mode coupling of 3D TCAD models with the Cadence Spectre circuit simulator, have enabled simulations and in-operation analysis of ionizing radiation single event effects (SEEs) in modern highspeed SiGe BiCMOS technologies and integrated circuits. An example of simulation of SEEs affecting digital output of a 7.2GHz mixed-signal circuit are presented. Our mixed-mode modeling results compare very well with experimental data. © 2009 by Department of microelectronics & Computer Science.

关键词： Ionizing radiation

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Thermo-mechanical modeling of stress-induced-voiding in BEOL Cu interconnect structures

Thermo-mechanical modeling of stress-induced-voiding in BEOL...

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2009 10th International conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems, EuroSimE 2009

作者： Lofrano, Melina Wilson, Christopher J. KristofCroesl Vandeveldel, Bart MEC Kapeldreef75 B-3001 Leuven Belgium School of Electrical Electronic and Computer Engineering Newcastle University Newcastle upon Tyne United Kingdom

ISBN: (纸本)9781424441617

The temperature dependent driving force for stress induced voiding of Cu dual damascene interconnects has been studied using finite element modeling. Both2D axisymmetric and 3D models have been investigated. Interconnect test structures have be en simulated at temperatures ranging from 25 to 300Cand a stress free temperature for the structure is demonstrated, consistent with analytical modeling. Typical reliability test structures, symmetrical in design showed a lower in-plane stress gradient, suggesting a reduced driving force for void formation. Hence, they are not ideally suited for reliability assessment. This compares to more realistic narrow-to-wide chain asymmetric structures with a larger stress gradient leads to faster void growth. For the assessment of stress gradients in these asymmetrical structures, the build-up of a 3D-model was required and showed the limitationsof2D axisymmetric models for this application. The effect of low dielectric (k) materials on the stress distribution in Cu interconnects was analysed. When copper is integrated in low-k materials, a higher hydrostatic stress gradient is observed compared to the traditional Si02-based dielectrics. ©2009 IEEE.

关键词： Low-k dielectric

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Thermal modeling and Characterization of the Embedded Micro Wafer Level Package (EMWLP) at the Package- and System-Level

Thermal Modeling and Characterization of the Embedded Micro ...

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11th Electronics Packaging Technology conference

作者： Hoe, Yen Yi Germaine Tang Gongyue Sharma, Gaurav Pinjala, Damaragunath Rao, Vempati Srinivasa Chinq, Jong Ming Siang, Sharon Lim Pei Kumar, Aditya Wee, Ho Soon Zhang Xiaowu Kripesh, V. ASTAR Inst Microelect 11 Sci Pk RdSingapore Sci Pk 2 Singapore 117685 Singapore United Test & Assembly Ctr Singapore 554916 Singapore

ISBN: (纸本)9781424450992

In this paper, package-level thermal modeling of the embedded micro-wafer-level-packaging (EMWLP) package has been performed to extract the parametric trends for thermal design guidelines of an eccentric single active die embedded alongside an integrated passive device (IPD), as shown in Fig.1 (with optional heat sink as a cooling solution). Exploratory thermal resistance modeling of an embedded two-die-stack has also been conducted. The effect of the mold compound used in the thermal models is further considered under the following parameters: mold thickness and thermal conductivity (0.4 W/mK to 2.5 W/mK). The effects of heat spreaders and heat sinks on the package thermal resistance are also studied, with due consideration paid to the above mold parameters. Furthermore, experimental characterization has been conducted to validate the package-level simulation for the single active die model, conforming to the JEDEC JESD 51-2A Thermal Measurements in Natural Convection standard. Finally, simulation results for a general system-level thermal modeling in both cellphone as well as laptop systems are also performed. Thermal management solutions for both scenarios, such as thermal vias and heat spreaders, are studied, with an optimal cooling solution proposed.

关键词： Heat sinks

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